mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Allow xPortIsAuthorizedToAccessBuffer() API call only from mpu_wrappers_v2 (#992)
* Add support to call xPortxPortIsAuthorizedToAccessBuffer function only when using latest MPU wrappers * Fix build issue in ARM CM3 MPU port * Code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Soren Ptak <ptaksoren@gmail.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
parent
a455b86bd3
commit
39dbff7204
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@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
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#endif /* configENABLE_MPU == 1 */
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#endif /* configENABLE_MPU == 1 */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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/**
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/**
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* @brief This variable is set to pdTRUE when the scheduler is started.
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* @brief This variable is set to pdTRUE when the scheduler is started.
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*/
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*/
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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#endif
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#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/**
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/**
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* @brief Each task maintains its own interrupt status in the critical nesting
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* @brief Each task maintains its own interrupt status in the critical nesting
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@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configUSE_TICKLESS_IDLE == 1 )
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#if ( configUSE_TICKLESS_IDLE == 1 )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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__asm volatile ( "cpsie i" ::: "memory" );
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__asm volatile ( "cpsie i" ::: "memory" );
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}
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}
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}
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}
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#endif /* configUSE_TICKLESS_IDLE */
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -827,6 +829,7 @@ static void prvTaskExitError( void )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
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static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
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{
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{
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uint32_t ulAccessPermissions = 0;
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uint32_t ulAccessPermissions = 0;
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@ -843,10 +846,12 @@ static void prvTaskExitError( void )
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return ulAccessPermissions;
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return ulAccessPermissions;
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
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static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
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{
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{
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#if defined( __ARMCC_VERSION )
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#if defined( __ARMCC_VERSION )
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@ -935,10 +940,12 @@ static void prvTaskExitError( void )
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
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}
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}
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_FPU == 1 )
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#if ( configENABLE_FPU == 1 )
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static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
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static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
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{
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{
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#if ( configENABLE_TRUSTZONE == 1 )
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#if ( configENABLE_TRUSTZONE == 1 )
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@ -960,6 +967,7 @@ static void prvTaskExitError( void )
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* LSPEN = 1 ==> Enable lazy context save of FP state. */
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* LSPEN = 1 ==> Enable lazy context save of FP state. */
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*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
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*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
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}
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}
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#endif /* configENABLE_FPU */
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#endif /* configENABLE_FPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
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/* Initialize the critical nesting count ready for the first task. */
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/* Initialize the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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ulCriticalNesting = 0;
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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{
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{
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xSchedulerRunning = pdTRUE;
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xSchedulerRunning = pdTRUE;
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}
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}
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#endif
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#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
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/* Start the first task. */
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/* Start the first task. */
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vStartFirstTask();
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vStartFirstTask();
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@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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const struct xMEMORY_REGION * const xRegions,
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const struct xMEMORY_REGION * const xRegions,
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StackType_t * pxBottomOfStack,
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StackType_t * pxBottomOfStack,
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@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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lIndex++;
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lIndex++;
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}
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}
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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uint32_t ulBufferLength,
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uint32_t ulBufferLength,
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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return xAccessGranted;
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return xAccessGranted;
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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BaseType_t xPortIsInsideInterrupt( void )
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BaseType_t xPortIsInsideInterrupt( void )
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@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
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#endif /* configENABLE_MPU == 1 */
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#endif /* configENABLE_MPU == 1 */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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/**
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/**
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* @brief This variable is set to pdTRUE when the scheduler is started.
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* @brief This variable is set to pdTRUE when the scheduler is started.
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*/
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*/
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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#endif
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#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/**
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/**
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* @brief Each task maintains its own interrupt status in the critical nesting
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* @brief Each task maintains its own interrupt status in the critical nesting
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@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configUSE_TICKLESS_IDLE == 1 )
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#if ( configUSE_TICKLESS_IDLE == 1 )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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__asm volatile ( "cpsie i" ::: "memory" );
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__asm volatile ( "cpsie i" ::: "memory" );
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}
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}
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}
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}
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#endif /* configUSE_TICKLESS_IDLE */
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -827,6 +829,7 @@ static void prvTaskExitError( void )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
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static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
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{
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{
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uint32_t ulAccessPermissions = 0;
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uint32_t ulAccessPermissions = 0;
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@ -843,10 +846,12 @@ static void prvTaskExitError( void )
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return ulAccessPermissions;
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return ulAccessPermissions;
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
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static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
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{
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{
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#if defined( __ARMCC_VERSION )
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#if defined( __ARMCC_VERSION )
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@ -935,10 +940,12 @@ static void prvTaskExitError( void )
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
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portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
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}
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}
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_FPU == 1 )
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#if ( configENABLE_FPU == 1 )
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static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
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static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
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{
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{
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#if ( configENABLE_TRUSTZONE == 1 )
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#if ( configENABLE_TRUSTZONE == 1 )
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@ -960,6 +967,7 @@ static void prvTaskExitError( void )
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* LSPEN = 1 ==> Enable lazy context save of FP state. */
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* LSPEN = 1 ==> Enable lazy context save of FP state. */
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*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
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*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
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}
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}
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#endif /* configENABLE_FPU */
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#endif /* configENABLE_FPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
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/* Initialize the critical nesting count ready for the first task. */
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/* Initialize the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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ulCriticalNesting = 0;
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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{
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{
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xSchedulerRunning = pdTRUE;
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xSchedulerRunning = pdTRUE;
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}
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}
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#endif
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#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
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/* Start the first task. */
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/* Start the first task. */
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vStartFirstTask();
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vStartFirstTask();
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@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( configENABLE_MPU == 1 )
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void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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const struct xMEMORY_REGION * const xRegions,
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const struct xMEMORY_REGION * const xRegions,
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StackType_t * pxBottomOfStack,
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StackType_t * pxBottomOfStack,
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@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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lIndex++;
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lIndex++;
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}
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}
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configENABLE_MPU == 1 )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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uint32_t ulBufferLength,
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uint32_t ulBufferLength,
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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return xAccessGranted;
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return xAccessGranted;
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}
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}
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#endif /* configENABLE_MPU */
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#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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BaseType_t xPortIsInsideInterrupt( void )
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BaseType_t xPortIsInsideInterrupt( void )
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@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
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#endif /* configENABLE_MPU == 1 */
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#endif /* configENABLE_MPU == 1 */
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
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/**
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/**
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* @brief This variable is set to pdTRUE when the scheduler is started.
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* @brief This variable is set to pdTRUE when the scheduler is started.
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*/
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*/
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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#endif
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#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/**
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/**
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* @brief Each task maintains its own interrupt status in the critical nesting
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* @brief Each task maintains its own interrupt status in the critical nesting
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@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#if ( configUSE_TICKLESS_IDLE == 1 )
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#if ( configUSE_TICKLESS_IDLE == 1 )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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__asm volatile ( "cpsie i" ::: "memory" );
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__asm volatile ( "cpsie i" ::: "memory" );
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}
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}
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}
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}
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#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -264,14 +264,14 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION;
|
||||||
* switches can only occur when uxCriticalNesting is zero. */
|
* switches can only occur when uxCriticalNesting is zero. */
|
||||||
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This variable is set to pdTRUE when the scheduler is started.
|
* This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
||||||
|
@ -878,11 +878,11 @@ BaseType_t xPortStartScheduler( void )
|
||||||
/* Initialise the critical nesting count ready for the first task. */
|
/* Initialise the critical nesting count ready for the first task. */
|
||||||
uxCriticalNesting = 0;
|
uxCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
__asm volatile (
|
__asm volatile (
|
||||||
|
@ -1371,53 +1371,57 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
uint32_t ulBufferLength,
|
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
|
||||||
|
|
||||||
{
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
uint32_t ulBufferLength,
|
||||||
BaseType_t xAccessGranted = pdFALSE;
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
|
||||||
|
|
||||||
if( xSchedulerRunning == pdFALSE )
|
|
||||||
{
|
{
|
||||||
/* Grant access to all the kernel objects before the scheduler
|
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
||||||
* is started. It is necessary because there is no task running
|
BaseType_t xAccessGranted = pdFALSE;
|
||||||
* yet and therefore, we cannot use the permissions of any
|
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||||
* task. */
|
|
||||||
xAccessGranted = pdTRUE;
|
if( xSchedulerRunning == pdFALSE )
|
||||||
}
|
|
||||||
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
|
||||||
{
|
|
||||||
xAccessGranted = pdTRUE;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
|
||||||
{
|
{
|
||||||
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
/* Grant access to all the kernel objects before the scheduler
|
||||||
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
* is started. It is necessary because there is no task running
|
||||||
|
* yet and therefore, we cannot use the permissions of any
|
||||||
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
* task. */
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
||||||
{
|
{
|
||||||
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
|
||||||
{
|
{
|
||||||
xAccessGranted = pdTRUE;
|
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
||||||
break;
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
|
|
||||||
return xAccessGranted;
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
}
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configASSERT_DEFINED == 1 )
|
#if ( configASSERT_DEFINED == 1 )
|
||||||
|
|
|
@ -289,14 +289,14 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION;
|
||||||
* switches can only occur when uxCriticalNesting is zero. */
|
* switches can only occur when uxCriticalNesting is zero. */
|
||||||
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This variable is set to pdTRUE when the scheduler is started.
|
* This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
||||||
|
@ -963,11 +963,11 @@ BaseType_t xPortStartScheduler( void )
|
||||||
/* Initialise the critical nesting count ready for the first task. */
|
/* Initialise the critical nesting count ready for the first task. */
|
||||||
uxCriticalNesting = 0;
|
uxCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/* Ensure the VFP is enabled - it should be anyway. */
|
/* Ensure the VFP is enabled - it should be anyway. */
|
||||||
vPortEnableVFP();
|
vPortEnableVFP();
|
||||||
|
@ -1514,53 +1514,57 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
uint32_t ulBufferLength,
|
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
|
||||||
|
|
||||||
{
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
uint32_t ulBufferLength,
|
||||||
BaseType_t xAccessGranted = pdFALSE;
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
|
||||||
|
|
||||||
if( xSchedulerRunning == pdFALSE )
|
|
||||||
{
|
{
|
||||||
/* Grant access to all the kernel objects before the scheduler
|
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
||||||
* is started. It is necessary because there is no task running
|
BaseType_t xAccessGranted = pdFALSE;
|
||||||
* yet and therefore, we cannot use the permissions of any
|
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||||
* task. */
|
|
||||||
xAccessGranted = pdTRUE;
|
if( xSchedulerRunning == pdFALSE )
|
||||||
}
|
|
||||||
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
|
||||||
{
|
|
||||||
xAccessGranted = pdTRUE;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
|
||||||
{
|
{
|
||||||
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
/* Grant access to all the kernel objects before the scheduler
|
||||||
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
* is started. It is necessary because there is no task running
|
||||||
|
* yet and therefore, we cannot use the permissions of any
|
||||||
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
* task. */
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
||||||
{
|
{
|
||||||
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
|
||||||
{
|
{
|
||||||
xAccessGranted = pdTRUE;
|
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
||||||
break;
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
|
|
||||||
return xAccessGranted;
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
}
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configASSERT_DEFINED == 1 )
|
#if ( configASSERT_DEFINED == 1 )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -300,14 +300,14 @@ extern void xPortPendSVHandler( void ) PRIVILEGED_FUNCTION;
|
||||||
* variable. */
|
* variable. */
|
||||||
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This variable is set to pdTRUE when the scheduler is started.
|
* This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
|
||||||
|
@ -858,11 +858,11 @@ BaseType_t xPortStartScheduler( void )
|
||||||
/* Initialise the critical nesting count ready for the first task. */
|
/* Initialise the critical nesting count ready for the first task. */
|
||||||
uxCriticalNesting = 0;
|
uxCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/* Ensure the VFP is enabled - it should be anyway. */
|
/* Ensure the VFP is enabled - it should be anyway. */
|
||||||
vPortEnableVFP();
|
vPortEnableVFP();
|
||||||
|
@ -1244,53 +1244,57 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
uint32_t ulBufferLength,
|
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
|
||||||
|
|
||||||
{
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
uint32_t ulBufferLength,
|
||||||
BaseType_t xAccessGranted = pdFALSE;
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
|
||||||
|
|
||||||
if( xSchedulerRunning == pdFALSE )
|
|
||||||
{
|
{
|
||||||
/* Grant access to all the kernel objects before the scheduler
|
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
||||||
* is started. It is necessary because there is no task running
|
BaseType_t xAccessGranted = pdFALSE;
|
||||||
* yet and therefore, we cannot use the permissions of any
|
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||||
* task. */
|
|
||||||
xAccessGranted = pdTRUE;
|
if( xSchedulerRunning == pdFALSE )
|
||||||
}
|
|
||||||
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
|
||||||
{
|
|
||||||
xAccessGranted = pdTRUE;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
|
||||||
{
|
{
|
||||||
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
/* Grant access to all the kernel objects before the scheduler
|
||||||
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
* is started. It is necessary because there is no task running
|
||||||
|
* yet and therefore, we cannot use the permissions of any
|
||||||
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
* task. */
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
||||||
{
|
{
|
||||||
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
|
||||||
{
|
{
|
||||||
xAccessGranted = pdTRUE;
|
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
||||||
break;
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
|
|
||||||
return xAccessGranted;
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
}
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -496,14 +496,14 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV
|
||||||
#endif /* configENABLE_MPU == 1 */
|
#endif /* configENABLE_MPU == 1 */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This variable is set to pdTRUE when the scheduler is started.
|
* @brief This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Each task maintains its own interrupt status in the critical nesting
|
* @brief Each task maintains its own interrupt status in the critical nesting
|
||||||
|
@ -555,6 +555,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||||
|
|
||||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||||
{
|
{
|
||||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||||
|
@ -770,6 +771,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
||||||
__asm volatile ( "cpsie i" ::: "memory" );
|
__asm volatile ( "cpsie i" ::: "memory" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configUSE_TICKLESS_IDLE */
|
#endif /* configUSE_TICKLESS_IDLE */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -827,6 +829,7 @@ static void prvTaskExitError( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
uint32_t ulAccessPermissions = 0;
|
uint32_t ulAccessPermissions = 0;
|
||||||
|
@ -843,10 +846,12 @@ static void prvTaskExitError( void )
|
||||||
|
|
||||||
return ulAccessPermissions;
|
return ulAccessPermissions;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if defined( __ARMCC_VERSION )
|
#if defined( __ARMCC_VERSION )
|
||||||
|
@ -935,10 +940,12 @@ static void prvTaskExitError( void )
|
||||||
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_FPU == 1 )
|
#if ( configENABLE_FPU == 1 )
|
||||||
|
|
||||||
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
|
||||||
{
|
{
|
||||||
#if ( configENABLE_TRUSTZONE == 1 )
|
#if ( configENABLE_TRUSTZONE == 1 )
|
||||||
|
@ -960,6 +967,7 @@ static void prvTaskExitError( void )
|
||||||
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
* LSPEN = 1 ==> Enable lazy context save of FP state. */
|
||||||
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_FPU */
|
#endif /* configENABLE_FPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -1740,11 +1748,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/* Initialize the critical nesting count ready for the first task. */
|
/* Initialize the critical nesting count ready for the first task. */
|
||||||
ulCriticalNesting = 0;
|
ulCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||||
|
|
||||||
/* Start the first task. */
|
/* Start the first task. */
|
||||||
vStartFirstTask();
|
vStartFirstTask();
|
||||||
|
@ -1772,6 +1780,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( configENABLE_MPU == 1 )
|
||||||
|
|
||||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
const struct xMEMORY_REGION * const xRegions,
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
StackType_t * pxBottomOfStack,
|
StackType_t * pxBottomOfStack,
|
||||||
|
@ -1893,10 +1902,12 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
lIndex++;
|
lIndex++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#if ( configENABLE_MPU == 1 )
|
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t ulBufferLength,
|
uint32_t ulBufferLength,
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
|
@ -1949,7 +1960,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
|
|
||||||
return xAccessGranted;
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
#endif /* configENABLE_MPU */
|
|
||||||
|
#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsInsideInterrupt( void )
|
BaseType_t xPortIsInsideInterrupt( void )
|
||||||
|
|
|
@ -149,14 +149,14 @@ typedef void ( * portISR_t )( void );
|
||||||
* switches can only occur when uxCriticalNesting is zero. */
|
* switches can only occur when uxCriticalNesting is zero. */
|
||||||
PRIVILEGED_DATA static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
PRIVILEGED_DATA static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This variable is set to pdTRUE when the scheduler is started.
|
* This variable is set to pdTRUE when the scheduler is started.
|
||||||
*/
|
*/
|
||||||
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
|
||||||
|
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Setup the timer to generate the tick interrupts.
|
* Setup the timer to generate the tick interrupts.
|
||||||
|
@ -963,11 +963,11 @@ BaseType_t xPortStartScheduler( void )
|
||||||
/* Initialise the critical nesting count ready for the first task. */
|
/* Initialise the critical nesting count ready for the first task. */
|
||||||
uxCriticalNesting = 0;
|
uxCriticalNesting = 0;
|
||||||
|
|
||||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
{
|
{
|
||||||
xSchedulerRunning = pdTRUE;
|
xSchedulerRunning = pdTRUE;
|
||||||
}
|
}
|
||||||
#endif
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
|
|
||||||
/* Ensure the VFP is enabled - it should be anyway. */
|
/* Ensure the VFP is enabled - it should be anyway. */
|
||||||
vPortEnableVFP();
|
vPortEnableVFP();
|
||||||
|
@ -1499,54 +1499,58 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||||
uint32_t ulBufferLength,
|
|
||||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
|
||||||
|
|
||||||
{
|
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||||
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
uint32_t ulBufferLength,
|
||||||
BaseType_t xAccessGranted = pdFALSE;
|
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
|
||||||
|
{
|
||||||
|
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
||||||
|
BaseType_t xAccessGranted = pdFALSE;
|
||||||
|
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||||
|
|
||||||
|
|
||||||
if( xSchedulerRunning == pdFALSE )
|
if( xSchedulerRunning == pdFALSE )
|
||||||
{
|
|
||||||
/* Grant access to all the kernel objects before the scheduler
|
|
||||||
* is started. It is necessary because there is no task running
|
|
||||||
* yet and therefore, we cannot use the permissions of any
|
|
||||||
* task. */
|
|
||||||
xAccessGranted = pdTRUE;
|
|
||||||
}
|
|
||||||
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
|
||||||
{
|
|
||||||
xAccessGranted = pdTRUE;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
|
||||||
{
|
{
|
||||||
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
/* Grant access to all the kernel objects before the scheduler
|
||||||
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
* is started. It is necessary because there is no task running
|
||||||
|
* yet and therefore, we cannot use the permissions of any
|
||||||
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
* task. */
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
||||||
{
|
{
|
||||||
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
|
||||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
|
||||||
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
|
||||||
{
|
{
|
||||||
xAccessGranted = pdTRUE;
|
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
||||||
break;
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||||
|
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||||
|
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
||||||
|
{
|
||||||
|
xAccessGranted = pdTRUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return xAccessGranted;
|
||||||
}
|
}
|
||||||
|
|
||||||
return xAccessGranted;
|
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||||
}
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
__asm uint32_t prvPortGetIPSR( void )
|
__asm uint32_t prvPortGetIPSR( void )
|
||||||
|
|
Loading…
Reference in a new issue