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Allow xPortIsAuthorizedToAccessBuffer() API call only from mpu_wrappers_v2 (#992)
* Add support to call xPortxPortIsAuthorizedToAccessBuffer function only when using latest MPU wrappers * Fix build issue in ARM CM3 MPU port * Code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Soren Ptak <ptaksoren@gmail.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
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25 changed files with 555 additions and 287 deletions
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@ -264,14 +264,14 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION;
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* switches can only occur when uxCriticalNesting is zero. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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/*
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* This variable is set to pdTRUE when the scheduler is started.
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*/
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PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
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#endif
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/*
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* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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@ -878,11 +878,11 @@ BaseType_t xPortStartScheduler( void )
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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{
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xSchedulerRunning = pdTRUE;
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}
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#endif
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/* Start the first task. */
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__asm volatile (
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@ -1371,53 +1371,57 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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uint32_t ulBufferLength,
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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{
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uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
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BaseType_t xAccessGranted = pdFALSE;
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const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
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BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
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uint32_t ulBufferLength,
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uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
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if( xSchedulerRunning == pdFALSE )
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{
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/* Grant access to all the kernel objects before the scheduler
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* is started. It is necessary because there is no task running
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* yet and therefore, we cannot use the permissions of any
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* task. */
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xAccessGranted = pdTRUE;
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}
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else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
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{
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xAccessGranted = pdTRUE;
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}
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else
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{
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if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
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uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
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BaseType_t xAccessGranted = pdFALSE;
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const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
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if( xSchedulerRunning == pdFALSE )
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{
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ulBufferStartAddress = ( uint32_t ) pvBuffer;
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ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
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for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
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/* Grant access to all the kernel objects before the scheduler
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* is started. It is necessary because there is no task running
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* yet and therefore, we cannot use the permissions of any
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* task. */
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xAccessGranted = pdTRUE;
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}
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else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
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{
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xAccessGranted = pdTRUE;
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}
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else
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{
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if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
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{
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if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
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portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
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portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
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ulBufferStartAddress = ( uint32_t ) pvBuffer;
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ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
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for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
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{
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xAccessGranted = pdTRUE;
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break;
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if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
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portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
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xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
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portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
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{
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xAccessGranted = pdTRUE;
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break;
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}
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}
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}
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}
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return xAccessGranted;
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}
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return xAccessGranted;
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}
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/*-----------------------------------------------------------*/
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#if ( configASSERT_DEFINED == 1 )
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