mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Update the PIC24 MPLAB demo for use with the latest 3.25 version of the compiler.
This commit is contained in:
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27effd446c
commit
381785b968
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@ -1,6 +1,7 @@
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[HEADER]
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magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13}
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file_version=1.0
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device=PIC24FJ128GA010
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[PATH_INFO]
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BuildDirPolicy=BuildDirIsSourceDir
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dir_src=
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@ -17,7 +18,7 @@ filter_obj=*.o
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filter_lib=*.a
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filter_lkr=*.gld
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[CAT_SUBFOLDERS]
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subfolder_src=
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subfolder_src=FreeRTOS Source;Standard Demo Source
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subfolder_inc=
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subfolder_obj=
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subfolder_lib=
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@ -29,17 +30,17 @@ file_002=.
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file_003=.
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file_004=.
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file_005=.
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file_006=.
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file_007=.
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file_008=.
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file_009=.
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file_010=.
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file_011=.
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file_012=.
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file_013=.
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file_014=.
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file_015=.
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file_016=.
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file_006=Standard Demo Source
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file_007=Standard Demo Source
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file_008=Standard Demo Source
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file_009=Standard Demo Source
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file_010=FreeRTOS Source
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file_011=FreeRTOS Source
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file_012=Standard Demo Source
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file_013=FreeRTOS Source
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file_014=FreeRTOS Source
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file_015=FreeRTOS Source
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file_016=Standard Demo Source
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file_017=.
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file_018=.
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file_019=.
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@ -98,20 +99,20 @@ file_022=no
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file_000=main.c
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file_001=..\..\source\list.c
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file_002=..\..\source\queue.c
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file_003=..\..\source\tasks.c
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file_004=..\..\source\portable\MPLAB\PIC24_dsPIC\port.c
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file_005=..\..\source\portable\MemMang\heap_1.c
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file_003=ParTest\ParTest.c
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file_004=serial\serial.c
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file_005=lcd.c
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file_006=..\Common\Minimal\BlockQ.c
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file_007=..\..\source\croutine.c
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file_008=..\Common\Minimal\crflash.c
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file_009=ParTest\ParTest.c
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file_010=..\Common\Minimal\blocktim.c
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file_011=..\Common\Minimal\integer.c
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file_012=..\Common\Minimal\comtest.c
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file_013=serial\serial.c
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file_014=timertest.c
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file_015=lcd.c
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file_016=..\..\Source\portable\MPLAB\PIC24_dsPIC\portasm_PIC24.S
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file_007=..\Common\Minimal\blocktim.c
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file_008=..\Common\Minimal\comtest.c
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file_009=..\Common\Minimal\crflash.c
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file_010=..\..\source\croutine.c
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file_011=..\..\source\portable\MemMang\heap_1.c
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file_012=..\Common\Minimal\integer.c
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file_013=..\..\source\portable\MPLAB\PIC24_dsPIC\port.c
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file_014=..\..\Source\portable\MPLAB\PIC24_dsPIC\portasm_PIC24.S
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file_015=..\..\source\tasks.c
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file_016=timertest.c
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file_017=..\..\source\include\semphr.h
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file_018=..\..\source\include\task.h
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file_019=..\..\source\include\croutine.h
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@ -125,7 +126,7 @@ suite_state=
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TS{7D9C6ECE-785D-44CB-BA22-17BF2E119622}=-g
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TS{25AC22BD-2378-4FDB-BFB6-7345A15512D3}=-fno-omit-frame-pointer -g -Wall -DMPLAB_PIC24_PORT -mlarge-code -O1 -fno-schedule-insns -fno-schedule-insns2
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TS{25AC22BD-2378-4FDB-BFB6-7345A15512D3}_alt=yes
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TS{7DAC9A1D-4C45-45D6-B25A-D117C74E8F5A}=--defsym=__ICD2RAM=1 -Map="$(TARGETBASE).map" -o"$(TARGETBASE).$(TARGETSUFFIX)"
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TS{7DAC9A1D-4C45-45D6-B25A-D117C74E8F5A}=--heap=0 --defsym=__ICD2RAM=1 -o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)"
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TS{509E5861-1E2A-483B-8B6B-CA8DB7F2DD78}=
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[INSTRUMENTED_TRACE]
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enable=0
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@ -2,6 +2,6 @@
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MagicCookie={0b13fe8c-dfe0-40eb-8900-6712719559a7}
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Version=1.0
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[TOOL_LOC_STAMPS]
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tool_loc{DE18EB1A-B46B-486B-B96F-A811A635DFAC}=C:\Devtools\Microchip\MPLAB C30\bin\pic30-as.exe
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tool_loc{069BD372-6CA0-40D4-BF2F-5DC806D05083}=C:\Devtools\Microchip\MPLAB C30\bin\pic30-gcc.exe
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tool_loc{433C3D55-811D-409D-A6BF-159CF9355B42}=C:\Devtools\Microchip\MPLAB C30\bin\pic30-ld.exe
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tool_loc{DE18EB1A-B46B-486B-B96F-A811A635DFAC}=C:\devtools\Microchip\mplabc30\v3.25\bin\pic30-as.exe
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tool_loc{069BD372-6CA0-40D4-BF2F-5DC806D05083}=C:\devtools\Microchip\mplabc30\v3.25\bin\pic30-gcc.exe
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tool_loc{433C3D55-811D-409D-A6BF-159CF9355B42}=C:\devtools\Microchip\mplabc30\v3.25\bin\pic30-ld.exe
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@ -3,9 +3,10 @@
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*/
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OUTPUT_ARCH("24FJ128GA010")
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EXTERN(__resetPRI)
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EXTERN(__resetALT)
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CRT0_STARTUP(crt0_standard.o)
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CRT1_STARTUP(crt1_standard.o)
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OPTIONAL(-lpPIC24Fxxx)
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/*
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** Memory Regions
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@ -20,6 +21,10 @@ MEMORY
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config2 : ORIGIN = 0x157FC, LENGTH = 0x2
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config1 : ORIGIN = 0x157FE, LENGTH = 0x2
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}
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__CONFIG2 = 0x157FC;
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__CONFIG1 = 0x157FE;
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__IVT_BASE = 0x4;
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__AIVT_BASE = 0x104;
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__DATA_BASE = 0x800;
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@ -59,16 +64,65 @@ SECTIONS
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/*
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** User Code and Library Code
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**
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** This section must not be assigned to __CODE_BASE,
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** because CodeGuard(tm) sections may be located there.
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**
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** Note that input sections *(.text) are not mapped here.
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** The best-fit allocator locates them, so that .text
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** may flow around PSV sections as needed.
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*/
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.text __CODE_BASE :
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.text :
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{
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*(.init);
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*(.user_init);
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*(.handle);
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*(.libc) *(.libm) *(.libdsp); /* keep together in this order */
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*(.lib*);
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*(.text);
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} >program
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/*
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** User-Defined Section in Program Memory
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**
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** note: can specify an address using
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** the following syntax:
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**
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** usercode 0x1234 :
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** {
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** *(usercode);
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** } >program
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*/
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usercode :
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{
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*(usercode);
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} >program
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/*
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** User-Defined Constants in Program Memory
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**
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** For PSV type sections, the Load Memory Address (LMA)
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** should be specified as follows:
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**
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** userconst : AT(0x1234)
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** {
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** *(userconst);
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** } >program
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**
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** Note that mapping PSV sections in linker scripts
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** is not generally recommended.
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**
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** Because of page alignment restrictions, memory is
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** often used more efficiently when PSV sections
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** do not appear in the linker script.
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**
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** For more information on memory allocation,
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** please refer to chapter 10, 'Linker Processing'
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** in the Assembler, Linker manual (DS51317).
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*/
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/*
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** Configuration Words
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*/
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@ -184,7 +238,7 @@ SECTIONS
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ABSOLUTE(__DefaultInterrupt));
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LONG( DEFINED(__SPI1ErrInterrupt) ? ABSOLUTE(__SPI1ErrInterrupt) :
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ABSOLUTE(__DefaultInterrupt));
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LONG( DEFINED(__SPI1TInterrupt) ? ABSOLUTE(__SPI1TInterrupt) :
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LONG( DEFINED(__SPI1Interrupt) ? ABSOLUTE(__SPI1Interrupt) :
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ABSOLUTE(__DefaultInterrupt));
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LONG( DEFINED(__U1RXInterrupt) ? ABSOLUTE(__U1RXInterrupt) :
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ABSOLUTE(__DefaultInterrupt));
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LONG( DEFINED(__AltSPI1ErrInterrupt) ? ABSOLUTE(__AltSPI1ErrInterrupt) :
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(DEFINED(__SPI1ErrInterrupt) ? ABSOLUTE(__SPI1ErrInterrupt) :
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ABSOLUTE(__DefaultInterrupt)));
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LONG( DEFINED(__AltSPI1TInterrupt) ? ABSOLUTE(__AltSPI1TInterrupt) :
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(DEFINED(__SPI1TInterrupt) ? ABSOLUTE(__SPI1TInterrupt) :
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LONG( DEFINED(__AltSPI1Interrupt) ? ABSOLUTE(__AltSPI1Interrupt) :
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(DEFINED(__SPI1Interrupt) ? ABSOLUTE(__SPI1Interrupt) :
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ABSOLUTE(__DefaultInterrupt)));
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LONG( DEFINED(__AltU1RXInterrupt) ? ABSOLUTE(__AltU1RXInterrupt) :
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(DEFINED(__U1RXInterrupt) ? ABSOLUTE(__U1RXInterrupt) :
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_PMADDRbits = 0x604;
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PMDOUT1 = 0x604;
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_PMDOUT1 = 0x604;
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_PMDOUT1bits = 0x604;
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PMDOUT2 = 0x606;
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_PMDOUT2 = 0x606;
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PMDIN1 = 0x608;
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_PMDIN1 = 0x608;
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PMDIN2 = 0x60A;
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_PMDIN2 = 0x60A;
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PMPEN = 0x60C;
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_PMPEN = 0x60C;
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_PMPENbits = 0x60C;
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PMAEN = 0x60C;
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_PMAEN = 0x60C;
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_PMAENbits = 0x60C;
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PMSTAT = 0x60E;
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_PMSTAT = 0x60E;
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_PMSTATbits = 0x60E;
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_CRCCONbits = 0x640;
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CRCXOR = 0x642;
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_CRCXOR = 0x642;
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_CRCXORbits = 0x642;
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CRCDAT = 0x644;
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_CRCDAT = 0x644;
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CRCWDAT = 0x646;
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OSCCON = 0x742;
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_OSCCON = 0x742;
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_OSCCONbits = 0x742;
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OSCCONL = 0x742;
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_OSCCONL = 0x742;
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OSCCONH = 0x743;
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_OSCCONH = 0x743;
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CLKDIV = 0x744;
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_CLKDIV = 0x744;
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_CLKDIVbits = 0x744;
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PMD3 = 0x774;
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_PMD3 = 0x774;
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_PMD3bits = 0x774;
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/*
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** ======= Base Addresses for Various Peripherals ======
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*/
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IC1 = 0x140;
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_IC1 = 0x140;
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IC2 = 0x144;
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_IC2 = 0x144;
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IC3 = 0x148;
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_IC3 = 0x148;
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IC4 = 0x14C;
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_IC4 = 0x14C;
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IC5 = 0x150;
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_IC5 = 0x150;
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OC1 = 0x180;
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_OC1 = 0x180;
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OC2 = 0x186;
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_OC2 = 0x186;
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OC3 = 0x18C;
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_OC3 = 0x18C;
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OC4 = 0x192;
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_OC4 = 0x192;
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OC5 = 0x198;
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_OC5 = 0x198;
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SPI1 = 0x240;
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_SPI1 = 0x240;
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SPI2 = 0x260;
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_SPI2 = 0x260;
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UART1 = 0x220;
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_UART1 = 0x220;
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UART2 = 0x230;
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_UART2 = 0x230;
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