From 37678b06568fda7aaff090b77e8e34d6ab29ede4 Mon Sep 17 00:00:00 2001 From: Joe Benczarski Date: Fri, 27 Oct 2023 14:57:52 -0400 Subject: [PATCH] Support configurable RISC-V chip extension (#773) * Support configurable RISC-V chip extension Added the FREERTOS_RISCV_EXTENSION option to allow the user to select which chip extension they want included. Removed the port for pulpino to instead use the new option. * Add port GCC_RISC_V_GENERIC and IAR_RISC_V_GENERIC * Add two rics-v generic ports to support FREERTOS_RISCV_EXTENSION config --------- Co-authored-by: Joe Benczarski Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com> Co-authored-by: Ching-Hsin Lee Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Soren Ptak --- CMakeLists.txt | 2 ++ portable/CMakeLists.txt | 24 +++++++++++++++++++++++ portable/GCC/RISC-V/chip_extensions.cmake | 19 ++++++++++++++++++ portable/IAR/RISC-V/chip_extensions.cmake | 16 +++++++++++++++ 4 files changed, 61 insertions(+) create mode 100644 portable/GCC/RISC-V/chip_extensions.cmake create mode 100644 portable/IAR/RISC-V/chip_extensions.cmake diff --git a/CMakeLists.txt b/CMakeLists.txt index 984e36ecd..d9ddb7ed7 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -106,6 +106,7 @@ if(NOT FREERTOS_PORT) " GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n" " GCC_RISC_V - Compiler: GCC Target: RISC-V\n" " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n" + " GCC_RISC_V_GENERIC - Compiler: GCC Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" " GCC_RL78 - Compiler: GCC Target: Renesas RL78\n" " GCC_RX100 - Compiler: GCC Target: Renesas RX100\n" " GCC_RX200 - Compiler: GCC Target: Renesas RX200\n" @@ -156,6 +157,7 @@ if(NOT FREERTOS_PORT) " IAR_MSP430 - Compiler: IAR Target: MSP430\n" " IAR_MSP430X - Compiler: IAR Target: MSP430X\n" " IAR_RISC_V - Compiler: IAR Target: RISC-V\n" + " IAR_RISC_V_GENERIC - Compiler: IAR Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" " IAR_RL78 - Compiler: IAR Target: Renesas RL78\n" " IAR_RX100 - Compiler: IAR Target: Renesas RX100\n" " IAR_RX600 - Compiler: IAR Target: Renesas RX600\n" diff --git a/portable/CMakeLists.txt b/portable/CMakeLists.txt index 327e9236b..4d81ef6c0 100644 --- a/portable/CMakeLists.txt +++ b/portable/CMakeLists.txt @@ -1,3 +1,11 @@ +if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) + include( GCC/RISC-V/chip_extensions.cmake ) +endif() + +if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) + include( IAR/RISC-V/chip_extensions.cmake ) +endif() + # FreeRTOS internal cmake file. Do not use it in user top-level project if (FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") @@ -292,6 +300,10 @@ add_library(freertos_kernel_port STATIC GCC/RISC-V/port.c GCC/RISC-V/portASM.S> + $<$: + GCC/RISC-V/port.c + GCC/RISC-V/portASM.S> + # Renesas RL78 port for GCC $<$: GCC/RL78/port.c @@ -497,6 +509,10 @@ add_library(freertos_kernel_port STATIC IAR/RISC-V/port.c IAR/RISC-V/portASM.s> + $<$: + IAR/RISC-V/port.c + IAR/RISC-V/portASM.s> + # Renesas RL78 port for IAR EWRL78 $<$: IAR/RL78/port.c @@ -845,6 +861,10 @@ target_include_directories(freertos_kernel_port PUBLIC ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM> + $<$: + ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V + ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> + # Renesas RL78 port for GCC $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RL78> @@ -942,6 +962,10 @@ target_include_directories(freertos_kernel_port PUBLIC ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions> + $<$: + ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V + ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> + # Renesas RL78 port for IAR EWRL78 $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RL78> diff --git a/portable/GCC/RISC-V/chip_extensions.cmake b/portable/GCC/RISC-V/chip_extensions.cmake new file mode 100644 index 000000000..c0d2c0d86 --- /dev/null +++ b/portable/GCC/RISC-V/chip_extensions.cmake @@ -0,0 +1,19 @@ +if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) + set( VALID_CHIP_EXTENSIONS + "Pulpino_Vega_RV32M1RM" + "RISCV_MTIME_CLINT_no_extensions" + "RISCV_no_extensions" + "RV32I_CLINT_no_extensions" ) + + if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) + message(FATAL_ERROR + "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" + "Please specify it from top-level CMake file (example):\n" + " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" + " or from CMake command line option:\n" + " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" + "\n" + " Available extension options:\n" + " ${VALID_CHIP_EXTENSIONS} \n") + endif() +endif() diff --git a/portable/IAR/RISC-V/chip_extensions.cmake b/portable/IAR/RISC-V/chip_extensions.cmake new file mode 100644 index 000000000..110ec4a2e --- /dev/null +++ b/portable/IAR/RISC-V/chip_extensions.cmake @@ -0,0 +1,16 @@ +if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) + set( VALID_CHIP_EXTENSIONS + "RV32I_CLINT_no_extensions" ) + + if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) + message(FATAL_ERROR + "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" + "Please specify it from top-level CMake file (example):\n" + " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" + " or from CMake command line option:\n" + " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" + "\n" + " Available extension options:\n" + " ${VALID_CHIP_EXTENSIONS} \n") + endif() +endif()