Update the GCC Cortex-A9 port to introduce a version of the IRQ handler that saves the FPU registers.

FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S

@@ -289,6 +289,46 @@ switch_before_exit:
 	next. */
 	portRESTORE_CONTEXT
 
+
+/******************************************************************************
+ * If the application provides an implementation of vApplicationIRQHandler(),
+ * then it will get called directly without saving the FPU registers on
+ * interrupt entry, and this weak implementation of
+ * vApplicationIRQHandler() will not get called.
+ *
+ * If the application provides its own implementation of
+ * vApplicationFPUSafeIRQHandler() then this implementation of
+ * vApplicationIRQHandler() will be called, save the FPU registers, and then
+ * call vApplicationFPUSafeIRQHandler().
+ *
+ * Therefore, if the application writer wants FPU registers to be saved on
+ * interrupt entry their IRQ handler must be called
+ * vApplicationFPUSafeIRQHandler(), and if the application writer does not want
+ * FPU registers to be saved on interrupt entry their IRQ handler must be
+ * called vApplicationIRQHandler().
+ *****************************************************************************/
+
+.align 4
+.weak vApplicationIRQHandler
+.type vApplicationIRQHandler, %function
+vApplicationIRQHandler:
+	PUSH	{LR}
+	FMRX	R1,  FPSCR
+	VPUSH	{D0-D15}
+	VPUSH	{D16-D31}
+	PUSH	{R1}
+
+	LDR		r1, vApplicationFPUSafeIRQHandlerConst
+	BLX		r1
+
+	POP		{R0}
+	VPOP	{D16-D31}
+	VPOP	{D0-D15}
+	VMSR	FPSCR, R0
+
+	POP {PC}
+
+
 ulICCIARConst:	.word ulICCIAR
 ulICCEOIRConst:	.word ulICCEOIR
 ulICCPMRConst: .word ulICCPMR
@@ -299,6 +339,7 @@ ulMaxAPIPriorityMaskConst: .word ulMaxAPIPriorityMask
 vTaskSwitchContextConst: .word vTaskSwitchContext
 vApplicationIRQHandlerConst: .word vApplicationIRQHandler
 ulPortInterruptNestingConst: .word ulPortInterruptNesting
+vApplicationFPUSafeIRQHandlerConst: .word vApplicationFPUSafeIRQHandler
 
 .end