mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature.
This commit is contained in:
parent
3ab4d1f87f
commit
32592e1385
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@ -19,7 +19,7 @@
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A special exception to the GPL can be applied should you wish to distribute
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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can be applied.
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@ -37,13 +37,13 @@
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Please ensure to read the configuration and relevant port sections of the
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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online documentation.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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licensing and training services.
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*/
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*/
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@ -55,8 +55,8 @@
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#include "FreeRTOS.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "task.h"
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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defined. The value should also ensure backward compatibility.
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defined. The value should also ensure backward compatibility.
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FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
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FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 255
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#define configKERNEL_INTERRUPT_PRIORITY 255
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@ -83,9 +83,9 @@ const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
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/* Each task maintains its own interrupt status in the critical nesting
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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variable. */
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unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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/*
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/*
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* Setup the timer to generate the tick interrupts.
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* Setup the timer to generate the tick interrupts.
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*/
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*/
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static void prvSetupTimerInterrupt( void );
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static void prvSetupTimerInterrupt( void );
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@ -104,8 +104,8 @@ void vPortStartFirstTask( unsigned long ulValue ) __attribute__ (( naked ));
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/*
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/*
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* See header file for description.
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* See header file for description.
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*/
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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{
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@ -118,8 +118,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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*pxTopOfStack = 0; /* LR */
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*pxTopOfStack = 0; /* LR */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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*pxTopOfStack = 0x00000000; /* uxCriticalNesting. */
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return pxTopOfStack;
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return pxTopOfStack;
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}
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}
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@ -131,18 +130,15 @@ void vPortSVCHandler( void )
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r1, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" ldr r2, uxCriticalNestingConst2 \n" /* Restore the critical nesting count used by the task. */
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" str r1, [r2] \n"
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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" mov r0, #0 \n"
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" msr basepri, r0 \n"
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" orr r14, #0xd \n"
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" orr r14, #0xd \n"
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" bx r14 \n"
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" bx r14 \n"
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" \n"
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" \n"
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" .align 2 \n"
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" .align 2 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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"uxCriticalNestingConst2: .word uxCriticalNesting \n"
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);
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);
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -152,16 +148,19 @@ void vPortStartFirstTask( unsigned long ulValue )
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/* ulValue is used from the asm code, but the compiler does not know
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/* ulValue is used from the asm code, but the compiler does not know
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this so remove the warning. */
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this so remove the warning. */
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( void ) ulValue;
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( void ) ulValue;
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asm volatile(
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asm volatile(
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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" svc 0 \n" /* System call to start first task. */
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" ldr r0, [r0] \n"
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" ldr r0, [r0] \n"
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" svc 0 \n" /* System call to start first task. */
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);
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);
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/*
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/*
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* See header file for description.
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* See header file for description.
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*/
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*/
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portBASE_TYPE xPortStartScheduler( void )
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portBASE_TYPE xPortStartScheduler( void )
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{
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{
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@ -172,7 +171,10 @@ portBASE_TYPE xPortStartScheduler( void )
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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here already. */
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prvSetupTimerInterrupt();
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Start the first task. */
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/* Start the first task. */
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vPortStartFirstTask( *((unsigned portLONG *) 0 ) );
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vPortStartFirstTask( *((unsigned portLONG *) 0 ) );
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@ -192,10 +194,6 @@ void vPortYieldFromISR( void )
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{
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{
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/* Set a PendSV to request a context switch. */
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/* Set a PendSV to request a context switch. */
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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/* This function is also called in response to a Yield(), so we want
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the yield to occur immediately. */
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -221,41 +219,32 @@ void xPortPendSVHandler( void )
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/* This is a naked function. */
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/* This is a naked function. */
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__asm volatile
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__asm volatile
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(
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(
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" mrs r0, psp \n"
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" mrs r0, psp \n"
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" \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" ldr r2, [r3] \n"
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" \n"
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" \n"
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" ldr r1, uxCriticalNestingConst \n" /* Save the remaining registers and the critical nesting count onto the task stack. */
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" stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */
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" ldr r1, [r1] \n"
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" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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" stmdb r0!, {r1,r4-r11} \n"
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" \n"
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" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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" stmdb sp!, {r3, r14} \n"
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" \n"
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" mov r0, %0 \n"
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" stmdb sp!, {r3, r14} \n"
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" msr basepri, r0 \n"
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" bl vTaskSwitchContext \n"
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" bl vTaskSwitchContext \n"
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" ldmia sp!, {r3, r14} \n"
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" mov r0, #0 \n"
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" \n" /* Restore the context, including the critical nesting count. */
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" msr basepri, r0 \n"
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" ldr r1, [r3] \n"
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" ldmia sp!, {r3, r14} \n"
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" ldr r2, uxCriticalNestingConst \n"
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" \n" /* Restore the context, including the critical nesting count. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldr r1, [r3] \n"
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" ldmia r0!, {r1, r4-r11} \n" /* Pop the registers and the critical nesting count. */
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" str r1, [r2] \n" /* Save the new critical nesting value into ulCriticalNesting. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers. */
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" msr psp, r0 \n"
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" msr psp, r0 \n"
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" orr r14, #0xd \n"
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" bx r14 \n"
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" \n" /* Exit with interrupts in the state required by the task. */
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" \n"
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" cbnz r1, sv_disable_interrupts \n" /* If the nesting count is greater than 0 we need to exit with interrupts masked. */
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" .align 2 \n"
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" bx r14 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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" \n"
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::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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"sv_disable_interrupts: \n"
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" ldr r1, =ulKernelPriority \n"
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" ldr r1, [r1] \n"
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" msr basepri, r1 \n"
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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"uxCriticalNestingConst: .word uxCriticalNesting \n"
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);
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);
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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{
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{
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/* If using preemption, also force a context switch. */
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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#if configUSE_PREEMPTION == 1
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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#endif
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#endif
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vTaskIncrementTick();
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portSET_INTERRUPT_MASK_FROM_ISR();
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{
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vTaskIncrementTick();
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR();
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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/* Critical section management. */
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#define vPortSetInterruptMask() \
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/*
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* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
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* registers. r0 is clobbered.
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*/
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#define portSET_INTERRUPT_MASK() \
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__asm volatile \
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__asm volatile \
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( \
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( \
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" push { r0 } \n" \
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" mov r0, %0 \n" \
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" ldr r0, =ulKernelPriority \n" \
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" ldr r0, [r0] \n" \
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" msr basepri, r0 \n" \
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" msr basepri, r0 \n" \
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" pop { r0 } " \
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::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \
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)
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)
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/*-----------------------------------------------------------*/
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/*
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* Set basepri back to 0 without effective other registers.
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#define vPortClearInterruptMask() \
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* r0 is clobbered.
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__asm volatile \
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*/
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( \
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#define portCLEAR_INTERRUPT_MASK() \
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" push { r0 } \n" \
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__asm volatile \
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" mov r0, #0 \n" \
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( \
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" msr basepri, r0 \n" \
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" mov r0, #0 \n" \
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" pop { r0 } " \
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" msr basepri, r0 \n" \
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:::"r0" \
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)
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)
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/*-----------------------------------------------------------*/
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK()
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extern void vPortEnterCritical( void );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() vPortSetInterruptMask();
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#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask();
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#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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