From 3169c924b47ee9877d58a0dc18e1bbeacae4fd04 Mon Sep 17 00:00:00 2001 From: Maxim De Clercq Date: Thu, 8 Jan 2026 14:58:35 +0100 Subject: [PATCH] fix: Add big-endian support to ARM_CRx_No_GIC port This change makes sure the Data endianness bit is set in the SPSR register when the program is being compiled for big-endian. Signed-off-by: Maxim De Clercq --- .github/.cSpellWords.txt | 1 + portable/GCC/ARM_CRx_No_GIC/port.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/.github/.cSpellWords.txt b/.github/.cSpellWords.txt index 2fc0d1455..07af92a9a 100644 --- a/.github/.cSpellWords.txt +++ b/.github/.cSpellWords.txt @@ -29,6 +29,7 @@ APIC APROCFREQ APSR ARMCM +ARMEB Armv ARMVFP ASTRINGZ diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index bd5a19a49..81b16dcf6 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -61,7 +61,11 @@ #define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 ) /* Constants required to setup the initial task context. */ -#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */ +#ifdef __ARMEB__ + #define portINITIAL_SPSR ( ( StackType_t ) 0x21f ) /* System mode, ARM mode, IRQ enabled FIQ enabled, Big-endian. */ +#else + #define portINITIAL_SPSR ( ( StackType_t ) 0x01f ) /* System mode, ARM mode, IRQ enabled FIQ enabled, Little-endian. */ +#endif #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 ) #define portTHUMB_MODE_ADDRESS ( 0x01UL )