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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Update BSP and SDK for HiFive board (#645)
* Update BSP and SDK for HiFive board This commit also adds demo start and success/failure output messages.
This commit is contained in:
Gaurav-Aggarwal-AWS
GitHub
parent
b550e6090d
commit
2fedeff332
263 changed files with 36551 additions and 6623 deletions
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/* Copyright (c) 2020 SiFive Inc. */
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/* SPDX-License-Identifier: Apache-2.0 */
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OUTPUT_ARCH("riscv")
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/* RAM Read-Only Data Linker Script
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*
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* This linker script places application code and read-only data into writable
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* memories in an attempt to improve performance, since writable memories
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* are generally lower-latency. This linker script may cause your application
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* to overflow RAM, since it dramatically increases the quantity of data vying
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* for space there.
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*/
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ENTRY(_enter)
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MEMORY
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{
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itim (airwx) : ORIGIN = 0x8000000, LENGTH = 0x2000
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ram (arw!xi) : ORIGIN = 0x80000000, LENGTH = 0x4000
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rom (irx!wa) : ORIGIN = 0x20010000, LENGTH = 0x6a120
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}
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PHDRS
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{
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rom PT_LOAD;
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ram_init PT_LOAD;
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tls PT_TLS;
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ram PT_LOAD;
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itim_init PT_LOAD;
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text PT_LOAD;
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lim_init PT_LOAD;
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}
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SECTIONS
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{
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/* Each hart is allocated its own stack of size __stack_size. This value
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* can be overriden at build-time by adding the following to CFLAGS:
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*
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* -Xlinker --defsym=__stack_size=0xf00
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*
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* where 0xf00 can be replaced with a multiple of 16 of your choice.
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*
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* __stack_size is PROVIDE-ed as a symbol so that initialization code
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* initializes the stack pointers for each hart at the right offset from
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* the _sp symbol.
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*/
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__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
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PROVIDE(__stack_size = __stack_size);
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/* The size of the heap can be overriden at build-time by adding the
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* following to CFLAGS:
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*
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* -Xlinker --defsym=__heap_size=0xf00
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*
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* where 0xf00 can be replaced with the value of your choice.
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*
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* Altertatively, the heap can be grown to fill the entire remaining region
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* of RAM by adding the following to CFLAGS:
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*
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* -Xlinker --defsym=__heap_max=1
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*
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* Note that depending on the memory layout, the bitness (32/64bit) of the
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* target, and the code model in use, this might cause a relocation error.
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*/
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__heap_size = DEFINED(__heap_size) ? __heap_size : 0x800;
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/* The boot hart sets which hart runs the pre-main initialization routines,
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* including copying .data into RAM, zeroing the BSS region, running
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* constructors, etc. After initialization, the boot hart is also the only
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* hart which runs application code unless the application overrides the
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* secondary_main() function to start execution on secondary harts.
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*/
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PROVIDE(__metal_boot_hart = 0);
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/* The chicken bit is used by pre-main initialization to enable/disable
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* certain core features */
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PROVIDE(__metal_chicken_bit = 1);
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/* The memory_ecc_scrub bit is used by _entry code to enable/disable
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* memories scrubbing to zero */
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PROVIDE(__metal_eccscrub_bit = 0);
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/* The RAM memories map for ECC scrubbing */
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PROVIDE( metal_dtim_0_memory_start = 0x80000000 );
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PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 );
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PROVIDE( metal_itim_0_memory_start = 0x8000000 );
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PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x2000 );
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/* ROM SECTION
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*
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* The following sections contain data which lives in read-only memory, if
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* such memory is present in the design, for the entire duration of program
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* execution.
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*/
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.init : {
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/* The _enter symbol is placed in the .text.metal.init.enter section
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* and must be placed at the beginning of the program */
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KEEP (*(.text.metal.init.enter))
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KEEP (*(.text.metal.init.*))
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KEEP (*(SORT_NONE(.init)))
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KEEP (*(.text.libgloss.start))
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} >rom :rom
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.fini : {
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KEEP (*(SORT_NONE(.fini)))
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} >rom :rom
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.preinit_array : ALIGN(8) {
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >rom :rom
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.init_array : ALIGN(8) {
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
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PROVIDE_HIDDEN (__init_array_end = .);
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PROVIDE_HIDDEN ( metal_constructors_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.metal.init_array.*)));
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KEEP (*(.metal.init_array));
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PROVIDE_HIDDEN ( metal_constructors_end = .);
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} >rom :rom
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.fini_array : ALIGN(8) {
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
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KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
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PROVIDE_HIDDEN (__fini_array_end = .);
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PROVIDE_HIDDEN ( metal_destructors_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.metal.fini_array.*)));
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KEEP (*(.metal.fini_array));
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PROVIDE_HIDDEN ( metal_destructors_end = .);
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} >rom :rom
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.ctors : {
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*(.metal.ctors .metal.ctors.*))
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} >rom :rom
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.dtors : {
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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KEEP (*(.metal.dtors .metal.dtors.*))
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} >rom : rom
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/* ITIM SECTION
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*
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* The following sections contain data which is copied from read-only
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* memory into an instruction tightly-integrated memory (ITIM), if one
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* is present in the design, during pre-main program initialization.
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*
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* Generally, the data copied into the ITIM should be performance-critical
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* functions which benefit from low instruction-fetch latency.
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*/
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.itim : ALIGN(8) {
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*(.itim .itim.*)
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} >itim AT>rom :itim_init
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PROVIDE( metal_segment_itim_source_start = LOADADDR(.itim) );
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PROVIDE( metal_segment_itim_target_start = ADDR(.itim) );
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PROVIDE( metal_segment_itim_target_end = ADDR(.itim) + SIZEOF(.itim) );
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/* LIM SECTION
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*
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* The following sections contain data which is copied from read-only
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* memory into a loosely integrated memory (LIM), which is shared with L2
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* cache, during pre-main program initialization.
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*
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* Generally, the data copied into the LIM should be performance-critical
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* functions which benefit from low instruction-fetch latency.
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*/
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.lim : ALIGN(8) {
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*(.lim .lim.*)
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} >ram AT>rom :lim_init
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PROVIDE( metal_segment_lim_source_start = LOADADDR(.lim) );
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PROVIDE( metal_segment_lim_target_start = ADDR(.lim) );
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PROVIDE( metal_segment_lim_target_end = ADDR(.lim) + SIZEOF(.lim) );
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/* TEXT SECTION
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*
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* The following section contains the code of the program, excluding
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* everything that's been allocated into the ITIM/LIM already
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*/
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.text : {
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*(.text.unlikely .text.unlikely.*)
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*(.text.startup .text.startup.*)
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*(.text .text.*)
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*(.gnu.linkonce.t.*)
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} >rom :text
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/* RAM SECTION
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*
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* The following sections contain data which is copied from read-only
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* memory into a read-write-capable memory such as data tightly-integrated
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* memory (DTIM) or another main memory, as well as the BSS, stack, and
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* heap.
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*
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* You might notice that .data, .tdata, .tbss, .tbss_space, and .bss all
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* have an apparently unnecessary ALIGN at their top. This is because
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* the implementation of _start in Freedom Metal libgloss depends on the
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* ADDR and LOADADDR being 8-byte aligned.
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*/
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.data : ALIGN(8) {
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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. = ALIGN(8);
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PROVIDE( __global_pointer$ = . + 0x800 );
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*(.sdata .sdata.* .sdata2.*)
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*(.gnu.linkonce.s.*)
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/* Read-only data is placed in RAM to improve performance, since
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* read-only memory generally has higher latency than RAM */
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. = ALIGN(8);
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*(.srodata.cst16)
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*(.srodata.cst8)
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*(.srodata.cst4)
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*(.srodata.cst2)
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*(.srodata .srodata.*)
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. = ALIGN(8);
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*(.rdata)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.r.*)
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} >ram AT>rom :ram_init
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.tdata : ALIGN(8) {
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PROVIDE( __tls_base = . );
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*(.tdata .tdata.* .gnu.linkonce.td.*)
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} >ram AT>rom :tls :ram_init
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PROVIDE( __tdata_source = LOADADDR(.tdata) );
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PROVIDE( __tdata_size = SIZEOF(.tdata) );
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PROVIDE( metal_segment_data_source_start = LOADADDR(.data) );
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PROVIDE( metal_segment_data_target_start = ADDR(.data) );
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PROVIDE( metal_segment_data_target_end = ADDR(.tdata) + SIZEOF(.tdata) );
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.tbss : ALIGN(8) {
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*(.tbss .tbss.* .gnu.linkonce.tb.*)
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*(.tcommon .tcommon.*)
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PROVIDE( __tls_end = . );
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} >ram AT>ram :tls :ram
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PROVIDE( __tbss_size = SIZEOF(.tbss) );
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PROVIDE( __tls_size = __tls_end - __tls_base );
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.tbss_space : ALIGN(8) {
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. = . + __tbss_size;
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} >ram :ram
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.bss (NOLOAD): ALIGN(8) {
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*(.sbss*)
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*(.gnu.linkonce.sb.*)
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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} >ram :ram
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PROVIDE( metal_segment_bss_source_start = LOADADDR(.tbss) );
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PROVIDE( metal_segment_bss_target_start = ADDR(.tbss) );
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PROVIDE( metal_segment_bss_target_end = ADDR(.bss) + SIZEOF(.bss) );
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.stack (NOLOAD) : ALIGN(16) {
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PROVIDE(metal_segment_stack_begin = .);
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. += __stack_size; /* Hart 0 */
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PROVIDE( _sp = . );
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PROVIDE(metal_segment_stack_end = .);
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} >ram :ram
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.heap (NOLOAD) : ALIGN(8) {
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PROVIDE( __end = . );
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PROVIDE( __heap_start = . );
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PROVIDE( metal_segment_heap_target_start = . );
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/* If __heap_max is defined, grow the heap to use the rest of RAM,
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* otherwise set the heap size to __heap_size */
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. = DEFINED(__heap_max) ? MIN( LENGTH(ram) - ( . - ORIGIN(ram)) , 0x10000000) : __heap_size;
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PROVIDE( metal_segment_heap_target_end = . );
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PROVIDE( _heap_end = . );
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PROVIDE( __heap_end = . );
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} >ram :ram
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/* C++ exception handling information is
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* not useful with our current runtime environment,
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* and it consumes flash space. Discard it until
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* we have something that can use it
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*/
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/DISCARD/ : {
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*(.eh_frame .eh_frame.*)
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}
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}
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