diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c b/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
index 1cc8c9aa0..cb4a425ba 100644
--- a/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
+++ b/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
@@ -59,7 +59,7 @@
* in main.c. This file implements the simply blinky style version.
*
* NOTE 2: This file only contains the source code that is specific to the
- * full demo. Generic functions, such FreeRTOS hook functions, and functions
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions
* required to configure the hardware, are defined in main.c.
******************************************************************************
*
diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/main.c b/Demo/CORTEX_M0_STM32F0518_IAR/main.c
index d18f5114e..60f3c0caf 100644
--- a/Demo/CORTEX_M0_STM32F0518_IAR/main.c
+++ b/Demo/CORTEX_M0_STM32F0518_IAR/main.c
@@ -93,8 +93,8 @@ static void prvSetupHardware( void );
/* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. */
-void main_blinky( void );
-void main_full( void );
+extern void main_blinky( void );
+extern void main_full( void );
/*-----------------------------------------------------------*/
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvopt b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvopt
index 4129a7056..e8ee82a8a 100644
--- a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvopt
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvopt
@@ -248,8 +248,8 @@
0
0
0
- 161
- 174
+ 96
+ 117
0
.\main.c
main.c
@@ -282,6 +282,34 @@
.\RegTest.c
RegTest.c
+
+ 2
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 107
+ 129
+ 0
+ .\main_full.c
+ main_full.c
+
+
+ 2
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 180
+ 180
+ 0
+ .\main_blinky.c
+ main_blinky.c
+
@@ -323,10 +351,10 @@
1
0
0
- 0
+ 39
0
- 1215
- 1228
+ 430
+ 438
0
..\..\Source\queue.c
queue.c
@@ -339,8 +367,8 @@
0
0
0
- 0
- 0
+ 2042
+ 2055
0
..\..\Source\tasks.c
tasks.c
@@ -398,7 +426,7 @@
Common_Demo_Source
- 0
+ 1
0
0
@@ -465,8 +493,8 @@
0
0
0
- 0
- 0
+ 167
+ 180
0
..\Common\Minimal\countsem.c
countsem.c
@@ -521,8 +549,8 @@
0
0
0
- 0
- 0
+ 151
+ 164
0
..\Common\Minimal\integer.c
integer.c
@@ -562,13 +590,31 @@
0
100
- 0
+ 3
.\main.c
0
- 161
- 174
+ 96
+ 117
+
+
+ .\main_full.c
+ 0
+ 107
+ 129
+
+
+ .\main_blinky.c
+ 0
+ 180
+ 180
+
+
+ ..\..\Source\queue.c
+ 39
+ 430
+ 438
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvproj b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvproj
index c77a412e2..c3c2f3d3f 100644
--- a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvproj
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/RTOSDemo.uvproj
@@ -331,7 +331,7 @@
1
- 0
+ 1
0
0
0
@@ -416,6 +416,16 @@
1
.\RegTest.c
+
+ main_full.c
+ 1
+ .\main_full.c
+
+
+ main_blinky.c
+ 1
+ .\main_blinky.c
+
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/System_XMC4500.c b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/System_XMC4500.c
index d11f5918e..12b6f4b32 100644
--- a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/System_XMC4500.c
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/System_XMC4500.c
@@ -1,25 +1,26 @@
-/**************************************************************************//**
- * @file system_XMC4500.h
- * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File
- * for the Infineon XMC4500 Device Series
- * @version V2.1
- * @date 20. December 2011
+/******************************************************************************
+ * @file system_XMC4500.c
+ * @brief Device specific initialization for the XMC4500-Series according to CMSIS
+ * @version V2.2
+ * @date 20. January 2012
*
* @note
- * Copyright (C) 2011 ARM Limited. All rights reserved.
+ * Copyright (C) 2011 Infineon Technologies AG. All rights reserved.
+
*
* @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
+ * Infineon Technologies AG (Infineon) is supplying this software for use with Infineon’s microcontrollers.
+ * This file can be freely distributed within development tools that are supporting such microcontrollers.
+
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
+ *
******************************************************************************/
#include "System_XMC4500.h"
@@ -32,20 +33,15 @@
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
-uint32_t SystemCoreClock = CLOCK_OSC_HP;/*!< System Clock Frequency (Core Clock)*/
-
-
-/*----------------------------------------------------------------------------
- static functions declarations
- *----------------------------------------------------------------------------*/
-static int SystemClockSetup(void);
-static void USBClockSetup(void);
+/*!< System Clock Frequency (Core Clock)*/
+uint32_t SystemCoreClock = CLOCK_OSC_HP;
/*----------------------------------------------------------------------------
Keil pragma to prevent warnings
*----------------------------------------------------------------------------*/
+#if defined(__ARMCC_VERSION)
#pragma diag_suppress 177
-
+#endif
/*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
@@ -114,12 +110,20 @@ static void USBClockSetup(void);
//
*/
-#define SCU_CLOCKOUT_SETUP 0
+#define SCU_CLOCKOUT_SETUP 0 // recommended to keep disabled
#define SCU_CLOCKOUT_SOURCE 0x00000000
#define SCU_CLOCKOUT_PIN 0x00000000
+/*----------------------------------------------------------------------------
+ static functions declarations
+ *----------------------------------------------------------------------------*/
+#if (SCU_CLOCK_SETUP == 1)
+static int SystemClockSetup(void);
+#endif
-
+#if (SCU_USB_CLOCK_SETUP == 1)
+static void USBClockSetup(void);
+#endif
/**
* @brief Setup the microcontroller system.
@@ -131,43 +135,57 @@ static void USBClockSetup(void);
void SystemInit(void)
{
/* Setup the WDT */
- #if WDT_SETUP
- WDT->CTR &= ~WDTENB_nVal;
- #endif
+#if (WDT_SETUP == 1)
+WDT->CTR &= ~WDTENB_nVal;
+#endif
-/* enable coprocessor FPU */
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */
- (3UL << 11*2) ); /* set CP11 Full Access */
- #endif
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */
+ (3UL << 11*2) ); /* set CP11 Full Access */
+#endif
/* Disable branch prediction - PCON.PBS = 1 */
- PREF->PCON |= (PREF_PCON_PBS_Msk << PREF_PCON_PBS_Pos);
+PREF->PCON |= (PREF_PCON_PBS_Msk);
+
+/* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */
+SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk);
/* Setup the clockout */
- #if SCU_CLOCKOUT_SETUP
- SCU_CLK->EXTCLKCR |= SCU_CLOCKOUT_SOURCE;
- if (SCU_CLOCKOUT_PIN) {
- PORT0->IOCR8 = 0x00000088; /*P0.8 --> ALT1 select + HWSEL */
- PORT0->HWSEL &= (~PORT0_HWSEL_HW8_Msk);
- }
- else PORT1->IOCR12 = 0x88000000; /*P1.15--> ALT1 select */
- #endif
+/* README README README README README README README README README README */
+/*
+ * Please use the CLOCKOUT feature with diligence. Use this only if you know
+ * what you are doing.
+ *
+ * You must be aware that the settings below can potentially be in conflict
+ * with DAVE code generation engine preferences.
+ *
+ * Even worse, the setting below configures the ports as output ports while in
+ * reality, the board on which this chip is mounted may have a source driving
+ * the ports.
+ *
+ * So use this feature only when you are absolutely sure that the port must
+ * indeed be configured as an output AND you are NOT linking this startup code
+ * with code that was generated by DAVE code engine.
+ */
+#if (SCU_CLOCKOUT_SETUP == 1)
+SCU_CLK->EXTCLKCR |= SCU_CLOCKOUT_SOURCE;
+
+if (SCU_CLOCKOUT_PIN) {
+ PORT0->IOCR8 = 0x00000088; /*P0.8 --> ALT1 select + HWSEL */
+ PORT0->HWSEL &= (~PORT0_HWSEL_HW8_Msk);
+ }
+else PORT1->IOCR12 = 0x88000000; /*P1.15--> ALT1 select */
+#endif
/* Setup the System clock */
- #if SCU_CLOCK_SETUP
- SystemClockSetup();
- #endif
-
-/*----------------------------------------------------------------------------
- Clock Variable definitions
- *----------------------------------------------------------------------------*/
- SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/
+#if (SCU_CLOCK_SETUP == 1)
+SystemClockSetup();
+#endif
/* Setup the USB PL */
- #if SCU_USB_CLOCK_SETUP
- USBClockSetup();
- #endif
+#if (SCU_USB_CLOCK_SETUP == 1)
+USBClockSetup();
+#endif
}
@@ -184,7 +202,7 @@ void SystemCoreClockUpdate(void)
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
- SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/
+SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/
}
@@ -195,111 +213,153 @@ void SystemCoreClockUpdate(void)
* @param None
* @retval None
*/
+#if (SCU_CLOCK_SETUP == 1)
static int SystemClockSetup(void)
{
/* enable PLL first */
- SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk);
+ SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk |
+ SCU_PLL_PLLCON0_PLLPWD_Msk);
/* Enable OSC_HP */
if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)
{
-
- SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4); /*enable the OSC_HP*/
- /* setup OSC WDG devider */
+ /* Enable the OSC_HP*/
+ SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4);
+ /* Setup OSC WDG devider */
SCU_OSC->OSCHPCTRL |= (OSCHPWDGDIV<<16);
- /* select external OSC as PLL input */
+ /* Select external OSC as PLL input */
SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk;
- /* restart OSC Watchdog */
+ /* Restart OSC Watchdog */
SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk;
do
{
- ; /* here a timeout need to be added */
- }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)));
+ ; /* here a timeout need to be added */
+ }while(!( (SCU_PLL->PLLSTAT) &
+ (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |
+ SCU_PLL_PLLSTAT_PLLSP_Msk)
+ )
+ );
}
/* Setup Main PLL */
- /* select FOFI as system clock */
- if(SCU_CLK->SYSCLKCR != 0X000000)SCU_CLK->SYSCLKCR = 0x00000000; /*Select FOFI*/
- /* Go to bypass the Main PLL */
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk;
- /* disconnect OSC_HP to PLL */
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk;
- /* Setup devider settings for main PLL */
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_1<<16) | (PLL_PDIV<<24));
- /* we may have to set OSCDISCDIS */
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk;
- /* connect OSC_HP to PLL */
- SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk;
- /* restart PLL Lock detection */
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk;
- /* wait for PLL Lock */
- while (!(SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk));
- /* Go back to the Main PLL */
- SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk;
+ /* Select FOFI as system clock */
+ if(SCU_CLK->SYSCLKCR != 0X000000)
+ SCU_CLK->SYSCLKCR = 0x00000000; /*Select FOFI*/
- /*********************************************************
- here we need to setup the system clock divider
- *********************************************************/
+ /* Go to bypass the Main PLL */
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk;
+
+ /* disconnect OSC_HP to PLL */
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk;
+
+ /* Setup devider settings for main PLL */
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) |
+ (PLL_K2DIV_STEP_1<<16) | (PLL_PDIV<<24));
+
+ /* we may have to set OSCDISCDIS */
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk;
+
+ /* connect OSC_HP to PLL */
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk;
+
+ /* restart PLL Lock detection */
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk;
+
+ /* wait for PLL Lock */
+ while (!(SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk));
+
+ /* Go back to the Main PLL */
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk;
+
+ /*********************************************************
+ here we need to setup the system clock divider
+ *********************************************************/
SCU_CLK->CPUCLKCR = SCU_CPUCLKCR_DIV;
SCU_CLK->PBCLKCR = SCU_PBCLKCR_DIV;
SCU_CLK->CCUCLKCR = SCU_CCUCLKCR_DIV;
- /* Switch system clock to PLL */
- SCU_CLK->SYSCLKCR |= 0x00010000;
+ /* Switch system clock to PLL */
+ SCU_CLK->SYSCLKCR |= 0x00010000;
- /*********************************************************
- here the ramp up of the system clock starts
- *********************************************************/
- /* Delay for next K2 step ~50µs */
- /********************************/
- SysTick->LOAD = ((1250+100) & SysTick_LOAD_RELOAD_Msk) - 1;/* set reload register */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ /*********************************************************
+ here the ramp up of the system clock starts
+ *********************************************************/
+ /* Delay for next K2 step ~50µs */
+ /********************************/
+ /* Set reload register */
+ SysTick->LOAD = ((1250+100) & SysTick_LOAD_RELOAD_Msk) - 1;
- while (SysTick->VAL >= 100); /* wait for ~50µs */
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */
- /********************************/
+ /* Load the SysTick Counter Value */
+ SysTick->VAL = 0;
- /* Setup devider settings for main PLL */
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_2<<16) | (PLL_PDIV<<24));
+ /* Enable SysTick IRQ and SysTick Timer */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ SysTick_CTRL_ENABLE_Msk;
+
+ /* wait for ~50µs */
+ while (SysTick->VAL >= 100);
- /* Delay for next K2 step ~50µs */
- /********************************/
- SysTick->LOAD = ((3000+100) & SysTick_LOAD_RELOAD_Msk) - 1;
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ /* Stop SysTick Timer */
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+ /********************************/
- while (SysTick->VAL >= 100); /* wait for ~50µs */
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */
- /********************************/
+ /* Setup devider settings for main PLL */
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) |
+ (PLL_K2DIV_STEP_2<<16) | (PLL_PDIV<<24));
- /* Setup devider settings for main PLL */
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_3<<16) | (PLL_PDIV<<24));
+ /* Delay for next K2 step ~50µs */
+ /********************************/
+ SysTick->LOAD = ((3000+100) & SysTick_LOAD_RELOAD_Msk) - 1;
- /* Delay for next K2 step ~50µs */
- /********************************/
- SysTick->LOAD = ((4800+100) & SysTick_LOAD_RELOAD_Msk) - 1;
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ /* Load the SysTick Counter Value */
+ SysTick->VAL = 0;
- while (SysTick->VAL >= 100); /* wait for ~50µs */
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */
- /********************************/
+ /* Enable SysTick IRQ and SysTick Timer */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
+
+ /* Wait for ~50µs */
+ while (SysTick->VAL >= 100);
- /* Setup devider settings for main PLL */
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV<<16) | (PLL_PDIV<<24));
+ /* Stop SysTick Timer */
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+ /********************************/
- SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk | SCU_TRAP_TRAPCLR_SVCOLCKT_Msk; /* clear request for System OCS Watchdog Trap and System VCO Lock Trap */
+ /* Setup devider settings for main PLL */
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) |
+ (PLL_K2DIV_STEP_3<<16) | (PLL_PDIV<<24));
- return(1);
+ /* Delay for next K2 step ~50µs */
+ /********************************/
+ SysTick->LOAD = ((4800+100) & SysTick_LOAD_RELOAD_Msk) - 1;
+
+ /* Load the SysTick Counter Value */
+ SysTick->VAL = 0;
+
+ /* Enable SysTick IRQ and SysTick Timer */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
+
+ /* Wait for ~50µs */
+ while (SysTick->VAL >= 100);
+
+ /* Stop SysTick Timer */
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+ /********************************/
+
+ /* Setup devider settings for main PLL */
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV<<16) |
+ (PLL_PDIV<<24));
+
+ /* clear request for System OCS Watchdog Trap and System VCO Lock Trap */
+ SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk |
+ SCU_TRAP_TRAPCLR_SVCOLCKT_Msk;
+
+ return(1);
}
+#endif
/**
* @brief -
@@ -307,13 +367,17 @@ static int SystemClockSetup(void)
* @param None
* @retval None
*/
+#if(SCU_USB_CLOCK_SETUP == 1)
static void USBClockSetup(void)
{
/* enable PLL first */
- SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk);
+ SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk |
+ SCU_PLL_USBPLLCON_PLLPWD_Msk);
/* check and if not already running enable OSC_HP */
- if(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)))
+ if(!((SCU_PLL->PLLSTAT) &
+ (SCU_PLL_PLLSTAT_PLLHV_Msk |
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)))
{
if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)
{
@@ -328,29 +392,28 @@ static void USBClockSetup(void)
do
{
- ; /* here a timeout need to be added */
- }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)));
+ ; /* here a timeout need to be added */
+ }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk |
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)));
}
}
/* Setup USB PLL */
- /* Go to bypass the Main PLL */
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk;
- /* disconnect OSC_FI to PLL */
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk;
- /* Setup devider settings for main PLL */
- SCU_PLL->USBPLLCON = ((USBPLL_NDIV<<8) | (USBPLL_PDIV<<24));
- /* we may have to set OSCDISCDIS */
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk;
- /* connect OSC_FI to PLL */
- SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk;
- /* restart PLL Lock detection */
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk;
- /* wait for PLL Lock */
- while (!(SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk));
-
-}
-
-
+ /* Go to bypass the Main PLL */
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk;
+ /* disconnect OSC_FI to PLL */
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk;
+ /* Setup devider settings for main PLL */
+ SCU_PLL->USBPLLCON = ((USBPLL_NDIV<<8) | (USBPLL_PDIV<<24));
+ /* we may have to set OSCDISCDIS */
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk;
+ /* connect OSC_FI to PLL */
+ SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk;
+ /* restart PLL Lock detection */
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk;
+ /* wait for PLL Lock */
+ while (!(SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk));
+ }
+#endif
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main.c b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main.c
index 738438f0f..03994e084 100644
--- a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main.c
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main.c
@@ -51,33 +51,16 @@
licensing and training services.
*/
-/*
- * main() creates all the demo application tasks and a software timer, then
- * starts the scheduler. The web documentation provides more details of the
- * standard demo application tasks, which provide no particular functionality,
- * but do provide a good example of how to use the FreeRTOS API.
+/******************************************************************************
+ * This project provides two demo applications. A simple blinky style project,
+ * and a more comprehensive test and demo application. The
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to
+ * select between the two. The simply blinky demo is implemented and described
+ * in main_blinky.c. The more comprehensive test and demo application is
+ * implemented and described in main_full.c.
*
- * In addition to the standard demo tasks, the following tasks and tests are
- * defined and/or created within this file:
- *
- * "Reg test" tasks - These fill both the core and floating point registers with
- * known values, then check that each register maintains its expected value for
- * the lifetime of the task. Each task uses a different set of values. The reg
- * test tasks execute with a very low priority, so get preempted very
- * frequently. A register containing an unexpected value is indicative of an
- * error in the context switching mechanism.
- *
- * "Check" timer - The check software timer period is initially set to three
- * seconds. The callback function associated with the check software timer
- * checks that all the standard demo tasks, and the register check tasks, are
- * not only still executing, but are executing without reporting any errors. If
- * the check software timer discovers that a task has either stalled, or
- * reported an error, then it changes its own execution period from the initial
- * three seconds, to just 200ms. The check software timer callback function
- * also toggles the single LED each time it is called. This provides a visual
- * indication of the system status: If the LED toggles every three seconds,
- * then no issues have been discovered. If the LED toggles every 200ms, then
- * an issue has been discovered with at least one task.
+ * This file implements the code that is not demo specific, including the
+ * hardware setup and FreeRTOS hook functions.
*
*
* Additional code:
@@ -97,48 +80,14 @@
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
-#include "timers.h"
-#include "semphr.h"
-
-/* Standard demo application includes. */
-#include "flop.h"
-#include "integer.h"
-#include "PollQ.h"
-#include "semtest.h"
-#include "dynamic.h"
-#include "BlockQ.h"
-#include "blocktim.h"
-#include "countsem.h"
-#include "GenQTest.h"
-#include "recmutex.h"
-#include "death.h"
/* Hardware includes. */
#include "XMC4500.h"
#include "System_XMC4500.h"
-/* Priorities for the demo application tasks. */
-#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )
-#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
-#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
-
-/* To toggle the single LED */
-#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )
-
-/* A block time of zero simply means "don't block". */
-#define mainDONT_BLOCK ( 0UL )
-
-/* The period after which the check timer will expire, in ms, provided no errors
-have been reported by any of the standard demo tasks. ms are converted to the
-equivalent in ticks using the portTICK_RATE_MS constant. */
-#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )
-
-/* The period at which the check timer will expire, in ms, if an error has been
-reported in one of the standard demo tasks. ms are converted to the equivalent
-in ticks using the portTICK_RATE_MS constant. */
-#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )
+/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
+or 0 to run the more comprehensive test and demo application. */
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
/*-----------------------------------------------------------*/
@@ -147,180 +96,33 @@ in ticks using the portTICK_RATE_MS constant. */
*/
static void prvSetupHardware( void );
-/*
- * The check timer callback function, as described at the top of this file.
+/*
+ * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
+ * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
*/
-static void prvCheckTimerCallback( xTimerHandle xTimer );
-
-/*
- * Register check tasks, and the tasks used to write over and check the contents
- * of the FPU registers, as described at the top of this file. The nature of
- * these files necessitates that they are written in an assembly file.
- */
-extern void vRegTest1Task( void *pvParameters );
-extern void vRegTest2Task( void *pvParameters );
-
-/*-----------------------------------------------------------*/
-
-/* The following two variables are used to communicate the status of the
-register check tasks to the check software timer. If the variables keep
-incrementing, then the register check tasks has not discovered any errors. If
-a variable stops incrementing, then an error has been found. */
-volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
+extern void main_blinky( void );
+extern void main_full( void );
/*-----------------------------------------------------------*/
int main( void )
{
-xTimerHandle xCheckTimer = NULL;
-
- /* Configure the hardware ready to run the test. */
+ /* Prepare the hardware to run this demo. */
prvSetupHardware();
- /* Start all the other standard demo/test tasks. The have not particular
- functionality, but do demonstrate how to use the FreeRTOS API and test the
- kernel port. */
- vStartIntegerMathTasks( tskIDLE_PRIORITY );
- vStartDynamicPriorityTasks();
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
- vCreateBlockTimeTasks();
- vStartCountingSemaphoreTasks();
- vStartGenericQueueTasks( tskIDLE_PRIORITY );
- vStartRecursiveMutexTasks();
- vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
- vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
- vStartMathTasks( mainFLOP_TASK_PRIORITY );
-
- /* Create the register check tasks, as described at the top of this
- file */
- xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );
- xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );
-
- /* Create the software timer that performs the 'check' functionality,
- as described at the top of this file. */
- xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */
- ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */
- pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
- ( void * ) 0, /* The ID is not used, so can be set to anything. */
- prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */
- );
-
- if( xCheckTimer != NULL )
+ /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top
+ of this file. */
+ #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1
{
- xTimerStart( xCheckTimer, mainDONT_BLOCK );
+ main_blinky();
}
-
- /* The set of tasks created by the following function call have to be
- created last as they keep account of the number of tasks they expect to see
- running. */
- vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
-
- /* Start the scheduler. */
- vTaskStartScheduler();
-
- /* If all is well, the scheduler will now be running, and the following line
- will never be reached. If the following line does execute, then there was
- insufficient FreeRTOS heap memory available for the idle and/or timer tasks
- to be created. See the memory management section on the FreeRTOS web site
- for more details. */
- for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckTimerCallback( xTimerHandle xTimer )
-{
-static long lChangedTimerPeriodAlready = pdFALSE;
-static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
-unsigned long ulErrorFound = pdFALSE;
-
- /* Check all the demo tasks (other than the flash tasks) to ensure
- that they are all still running, and that none have detected an error. */
-
- if( xAreMathsTaskStillRunning() != pdTRUE )
+ #else
{
- ulErrorFound = pdTRUE;
+ main_full();
}
+ #endif
- if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if( xAreBlockingQueuesStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if( xIsCreateTaskStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if( xArePollingQueuesStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- if( xAreSemaphoreTasksStillRunning() != pdTRUE )
- {
- ulErrorFound = pdTRUE;
- }
-
- /* Check that the register test 1 task is still running. */
- if( ulLastRegTest1Value == ulRegTest1LoopCounter )
- {
- ulErrorFound = pdTRUE;
- }
- ulLastRegTest1Value = ulRegTest1LoopCounter;
-
- /* Check that the register test 2 task is still running. */
- if( ulLastRegTest2Value == ulRegTest2LoopCounter )
- {
- ulErrorFound = pdTRUE;
- }
- ulLastRegTest2Value = ulRegTest2LoopCounter;
-
- /* Toggle the check LED to give an indication of the system status. If
- the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then
- everything is ok. A faster toggle indicates an error. */
- mainTOGGLE_LED();
-
- /* Have any errors been latch in ulErrorFound? If so, shorten the
- period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.
- This will result in an increase in the rate at which mainCHECK_LED
- toggles. */
- if( ulErrorFound != pdFALSE )
- {
- if( lChangedTimerPeriodAlready == pdFALSE )
- {
- lChangedTimerPeriodAlready = pdTRUE;
-
- /* This call to xTimerChangePeriod() uses a zero block time.
- Functions called from inside of a timer callback function must
- *never* attempt to block. */
- xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );
- }
- }
+ return 0;
}
/*-----------------------------------------------------------*/
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_blinky.c
new file mode 100644
index 000000000..be344d5e9
--- /dev/null
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_blinky.c
@@ -0,0 +1,233 @@
+/*
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
+
+
+ ***************************************************************************
+ * *
+ * FreeRTOS tutorial books are available in pdf and paperback. *
+ * Complete, revised, and edited pdf reference manuals are also *
+ * available. *
+ * *
+ * Purchasing FreeRTOS documentation will not only help you, by *
+ * ensuring you get running as quickly as possible and with an *
+ * in-depth knowledge of how to use FreeRTOS, it will also help *
+ * the FreeRTOS project to continue with its mission of providing *
+ * professional grade, cross platform, de facto standard solutions *
+ * for microcontrollers - completely free of charge! *
+ * *
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
+ * *
+ * Thank you for using FreeRTOS, and thank you for your support! *
+ * *
+ ***************************************************************************
+
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
+ >>>NOTE<<< The modification to the GPL is included to allow you to
+ distribute a combined work that includes FreeRTOS without being obliged to
+ provide the source code for proprietary components outside of the FreeRTOS
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details. You should have received a copy of the GNU General Public
+ License and the FreeRTOS license exception along with FreeRTOS; if not it
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained
+ by writing to Richard Barry, contact details for whom are available on the
+ FreeRTOS WEB site.
+
+ 1 tab == 4 spaces!
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+/******************************************************************************
+ * NOTE 1: This project provides two demo applications. A simple blinky style
+ * project, and a more comprehensive test and demo application. The
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
+ * in main.c. This file implements the simply blinky style version.
+ *
+ * NOTE 2: This file only contains the source code that is specific to the
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions
+ * required to configure the hardware, are defined in main.c.
+ ******************************************************************************
+ *
+ * main_blinky() creates one queue, and two tasks. It then starts the
+ * scheduler.
+ *
+ * The Queue Send Task:
+ * The queue send task is implemented by the prvQueueSendTask() function in
+ * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
+ * block for 200 milliseconds, before sending the value 100 to the queue that
+ * was created within main_blinky(). Once the value is sent, the task loops
+ * back around to block for another 200 milliseconds.
+ *
+ * The Queue Receive Task:
+ * The queue receive task is implemented by the prvQueueReceiveTask() function
+ * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
+ * blocks on attempts to read data from the queue that was created within
+ * main_blinky(). When data is received, the task checks the value of the
+ * data, and if the value equals the expected 100, toggles the LED. The 'block
+ * time' parameter passed to the queue receive function specifies that the
+ * task should be held in the Blocked state indefinitely to wait for data to
+ * be available on the queue. The queue receive task will only leave the
+ * Blocked state when the queue send task writes to the queue. As the queue
+ * send task writes to the queue every 200 milliseconds, the queue receive
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles
+ * the LED every 200 milliseconds.
+ */
+
+/* Standard includes. */
+#include
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* Hardware includes. */
+#include "XMC4500.h"
+#include "System_XMC4500.h"
+
+/* Priorities at which the tasks are created. */
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
+
+/* The rate at which data is sent to the queue. The 200ms value is converted
+to ticks using the portTICK_RATE_MS constant. */
+#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )
+
+/* The number of items the queue can hold. This is 1 as the receive task
+will remove items as they are added, meaning the send task should always find
+the queue empty. */
+#define mainQUEUE_LENGTH ( 1 )
+
+/* Values passed to the two tasks just to check the task parameter
+functionality. */
+#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )
+#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )
+
+/* To toggle the single LED */
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * The tasks as described in the comments at the top of this file.
+ */
+static void prvQueueReceiveTask( void *pvParameters );
+static void prvQueueSendTask( void *pvParameters );
+
+/*
+ * Called by main() to create the simply blinky style application if
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
+ */
+void main_blinky( void );
+
+/*
+ * The hardware only has a single LED. Simply toggle it.
+ */
+extern void vMainToggleLED( void );
+
+/*-----------------------------------------------------------*/
+
+/* The queue used by both tasks. */
+static xQueueHandle xQueue = NULL;
+
+/*-----------------------------------------------------------*/
+
+void main_blinky( void )
+{
+ /* Create the queue. */
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
+
+ if( xQueue != NULL )
+ {
+ /* Start the two tasks as described in the comments at the top of this
+ file. */
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
+ ( signed char * ) "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
+ ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
+ NULL ); /* The task handle is not required, so NULL is passed. */
+
+ xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );
+
+ /* Start the tasks and timer running. */
+ vTaskStartScheduler();
+ }
+
+ /* If all is well, the scheduler will now be running, and the following
+ line will never be reached. If the following line does execute, then
+ there was insufficient FreeRTOS heap memory available for the idle and/or
+ timer tasks to be created. See the memory management section on the
+ FreeRTOS web site for more details. */
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+static void prvQueueSendTask( void *pvParameters )
+{
+portTickType xNextWakeTime;
+const unsigned long ulValueToSend = 100UL;
+
+ /* Check the task parameter is as expected. */
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );
+
+ /* Initialise xNextWakeTime - this only needs to be done once. */
+ xNextWakeTime = xTaskGetTickCount();
+
+ for( ;; )
+ {
+ /* Place this task in the blocked state until it is time to run again.
+ The block time is specified in ticks, the constant used converts ticks
+ to ms. While in the Blocked state this task will not consume any CPU
+ time. */
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
+
+ /* Send to the queue - causing the queue receive task to unblock and
+ toggle the LED. 0 is used as the block time so the sending operation
+ will not block - it shouldn't need to block as the queue should always
+ be empty at this point in the code. */
+ xQueueSend( xQueue, &ulValueToSend, 0U );
+ }
+}
+/*-----------------------------------------------------------*/
+
+static void prvQueueReceiveTask( void *pvParameters )
+{
+unsigned long ulReceivedValue;
+
+ /* Check the task parameter is as expected. */
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );
+
+ for( ;; )
+ {
+ /* Wait until something arrives in the queue - this task will block
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
+ FreeRTOSConfig.h. */
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
+
+ /* To get here something must have been received from the queue, but
+ is it the expected value? If it is, toggle the LED. */
+ if( ulReceivedValue == 100UL )
+ {
+ mainTOGGLE_LED();
+ ulReceivedValue = 0U;
+ }
+ }
+}
+/*-----------------------------------------------------------*/
+
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_full.c
new file mode 100644
index 000000000..e13986b11
--- /dev/null
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/main_full.c
@@ -0,0 +1,318 @@
+/*
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
+
+
+ ***************************************************************************
+ * *
+ * FreeRTOS tutorial books are available in pdf and paperback. *
+ * Complete, revised, and edited pdf reference manuals are also *
+ * available. *
+ * *
+ * Purchasing FreeRTOS documentation will not only help you, by *
+ * ensuring you get running as quickly as possible and with an *
+ * in-depth knowledge of how to use FreeRTOS, it will also help *
+ * the FreeRTOS project to continue with its mission of providing *
+ * professional grade, cross platform, de facto standard solutions *
+ * for microcontrollers - completely free of charge! *
+ * *
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
+ * *
+ * Thank you for using FreeRTOS, and thank you for your support! *
+ * *
+ ***************************************************************************
+
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
+ >>>NOTE<<< The modification to the GPL is included to allow you to
+ distribute a combined work that includes FreeRTOS without being obliged to
+ provide the source code for proprietary components outside of the FreeRTOS
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details. You should have received a copy of the GNU General Public
+ License and the FreeRTOS license exception along with FreeRTOS; if not it
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained
+ by writing to Richard Barry, contact details for whom are available on the
+ FreeRTOS WEB site.
+
+ 1 tab == 4 spaces!
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+/******************************************************************************
+ * NOTE 1: This project provides two demo applications. A simple blinky style
+ * project, and a more comprehensive test and demo application. The
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
+ * in main.c. This file implements the comprehensive test and demo version.
+ *
+ * NOTE 2: This file only contains the source code that is specific to the
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions
+ * required to configure the hardware, are defined in main.c.
+ ******************************************************************************
+ *
+ * main_full() creates all the demo application tasks and a software timer, then
+ * starts the scheduler. The web documentation provides more details of the
+ * standard demo application tasks, which provide no particular functionality,
+ * but do provide a good example of how to use the FreeRTOS API.
+ *
+ * In addition to the standard demo tasks, the following tasks and tests are
+ * defined and/or created within this file:
+ *
+ * "Reg test" tasks - These fill both the core and floating point registers with
+ * known values, then check that each register maintains its expected value for
+ * the lifetime of the task. Each task uses a different set of values. The reg
+ * test tasks execute with a very low priority, so get preempted very
+ * frequently. A register containing an unexpected value is indicative of an
+ * error in the context switching mechanism.
+ *
+ * "Check" timer - The check software timer period is initially set to three
+ * seconds. The callback function associated with the check software timer
+ * checks that all the standard demo tasks, and the register check tasks, are
+ * not only still executing, but are executing without reporting any errors. If
+ * the check software timer discovers that a task has either stalled, or
+ * reported an error, then it changes its own execution period from the initial
+ * three seconds, to just 200ms. The check software timer callback function
+ * also toggles the single LED each time it is called. This provides a visual
+ * indication of the system status: If the LED toggles every three seconds,
+ * then no issues have been discovered. If the LED toggles every 200ms, then
+ * an issue has been discovered with at least one task.
+ */
+
+/* Standard includes. */
+#include
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "timers.h"
+#include "semphr.h"
+
+/* Standard demo application includes. */
+#include "flop.h"
+#include "integer.h"
+#include "PollQ.h"
+#include "semtest.h"
+#include "dynamic.h"
+#include "BlockQ.h"
+#include "blocktim.h"
+#include "countsem.h"
+#include "GenQTest.h"
+#include "recmutex.h"
+#include "death.h"
+
+/* Hardware includes. */
+#include "XMC4500.h"
+#include "System_XMC4500.h"
+
+/* Priorities for the demo application tasks. */
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
+
+/* To toggle the single LED */
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )
+
+/* A block time of zero simply means "don't block". */
+#define mainDONT_BLOCK ( 0UL )
+
+/* The period after which the check timer will expire, in ms, provided no errors
+have been reported by any of the standard demo tasks. ms are converted to the
+equivalent in ticks using the portTICK_RATE_MS constant. */
+#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )
+
+/* The period at which the check timer will expire, in ms, if an error has been
+reported in one of the standard demo tasks. ms are converted to the equivalent
+in ticks using the portTICK_RATE_MS constant. */
+#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * The check timer callback function, as described at the top of this file.
+ */
+static void prvCheckTimerCallback( xTimerHandle xTimer );
+
+/*
+ * Register check tasks, and the tasks used to write over and check the contents
+ * of the FPU registers, as described at the top of this file. The nature of
+ * these files necessitates that they are written in an assembly file.
+ */
+extern void vRegTest1Task( void *pvParameters );
+extern void vRegTest2Task( void *pvParameters );
+
+/*-----------------------------------------------------------*/
+
+/* The following two variables are used to communicate the status of the
+register check tasks to the check software timer. If the variables keep
+incrementing, then the register check tasks has not discovered any errors. If
+a variable stops incrementing, then an error has been found. */
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
+
+/*-----------------------------------------------------------*/
+
+void main_full( void )
+{
+xTimerHandle xCheckTimer = NULL;
+
+ /* Start all the other standard demo/test tasks. The have not particular
+ functionality, but do demonstrate how to use the FreeRTOS API and test the
+ kernel port. */
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );
+ vStartDynamicPriorityTasks();
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
+ vCreateBlockTimeTasks();
+ vStartCountingSemaphoreTasks();
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );
+ vStartRecursiveMutexTasks();
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );
+
+ /* Create the register check tasks, as described at the top of this
+ file */
+ xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );
+ xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );
+
+ /* Create the software timer that performs the 'check' functionality,
+ as described at the top of this file. */
+ xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */
+ ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */
+ pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
+ ( void * ) 0, /* The ID is not used, so can be set to anything. */
+ prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */
+ );
+
+ if( xCheckTimer != NULL )
+ {
+ xTimerStart( xCheckTimer, mainDONT_BLOCK );
+ }
+
+ /* The set of tasks created by the following function call have to be
+ created last as they keep account of the number of tasks they expect to see
+ running. */
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
+
+ /* Start the scheduler. */
+ vTaskStartScheduler();
+
+ /* If all is well, the scheduler will now be running, and the following line
+ will never be reached. If the following line does execute, then there was
+ insufficient FreeRTOS heap memory available for the idle and/or timer tasks
+ to be created. See the memory management section on the FreeRTOS web site
+ for more details. */
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+static void prvCheckTimerCallback( xTimerHandle xTimer )
+{
+static long lChangedTimerPeriodAlready = pdFALSE;
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
+unsigned long ulErrorFound = pdFALSE;
+
+ /* Check all the demo tasks (other than the flash tasks) to ensure
+ that they are all still running, and that none have detected an error. */
+
+ if( xAreMathsTaskStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xIsCreateTaskStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xArePollingQueuesStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = pdTRUE;
+ }
+
+ /* Check that the register test 1 task is still running. */
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )
+ {
+ ulErrorFound = pdTRUE;
+ }
+ ulLastRegTest1Value = ulRegTest1LoopCounter;
+
+ /* Check that the register test 2 task is still running. */
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )
+ {
+ ulErrorFound = pdTRUE;
+ }
+ ulLastRegTest2Value = ulRegTest2LoopCounter;
+
+ /* Toggle the check LED to give an indication of the system status. If
+ the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then
+ everything is ok. A faster toggle indicates an error. */
+ mainTOGGLE_LED();
+
+ /* Have any errors been latch in ulErrorFound? If so, shorten the
+ period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.
+ This will result in an increase in the rate at which mainCHECK_LED
+ toggles. */
+ if( ulErrorFound != pdFALSE )
+ {
+ if( lChangedTimerPeriodAlready == pdFALSE )
+ {
+ lChangedTimerPeriodAlready = pdTRUE;
+
+ /* This call to xTimerChangePeriod() uses a zero block time.
+ Functions called from inside of a timer callback function must
+ *never* attempt to block. */
+ xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );
+ }
+ }
+}
+/*-----------------------------------------------------------*/
+
diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/startup_XMC4500.s b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/startup_XMC4500.s
index 0db35b283..0f409e2c8 100644
--- a/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/startup_XMC4500.s
+++ b/Demo/CORTEX_M4F_Infineon_XMC4500_Keil/startup_XMC4500.s
@@ -2,8 +2,8 @@
; * @file startup_XMC4500.s
; * @brief CMSIS Cortex-M4 Core Device Startup File for
; * Infineon XMC4500 Device Series
-; * @version V1.02
-; * @date 6. December 2011
+; * @version V1.03
+; * @date 16. Jan. 2012
; *
; * @note
; * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
@@ -56,15 +56,15 @@ __heap_limit
;* ================== START OF VECTOR TABLE DEFINITION ====================== */
;* Vector Table - This gets programed into VTOR register */
AREA RESET, DATA, READONLY
- EXPORT __cs3_interrupt_vector_cortex_m
- EXPORT __cs3_interrupt_vector_cortex_m_End
- EXPORT __cs3_interrupt_vector_cortex_m_Size
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
-__cs3_interrupt_vector_cortex_m
+__Vectors
DCD __initial_sp ;* Top of Stack */
- DCD Reset_Handler ;* Reset Handler */
+ DCD Reset_Handler ;* Reset Handler */
DCD NMI_Handler ;* NMI Handler */
DCD HardFault_Handler ;* Hard Fault Handler */
DCD MemManage_Handler ;* MPU Fault Handler */
@@ -92,9 +92,9 @@ __cs3_interrupt_vector_cortex_m
DCD ERU1_3_IRQHandler ;* Handler name for SR ERU1_3 */
DCD 0 ;* Not Available */
DCD 0 ;* Not Available */
- DCD 0 ;* Not Available */
+ DCD 0 ;* Not Available */
DCD PMU0_0_IRQHandler ;* Handler name for SR PMU0_0 */
- DCD 0 ;* Not Available */
+ DCD 0 ;* Not Available */
DCD VADC0_C0_0_IRQHandler ;* Handler name for SR VADC0_C0_0 */
DCD VADC0_C0_1_IRQHandler ;* Handler name for SR VADC0_C0_1 */
DCD VADC0_C0_2_IRQHandler ;* Handler name for SR VADC0_C0_1 */
@@ -193,9 +193,9 @@ __cs3_interrupt_vector_cortex_m
DCD 0 ;* Not Available */
DCD GPDMA1_0_IRQHandler ;* Handler name for SR GPDMA1_0 */
DCD 0 ;* Not Available */
-__cs3_interrupt_vector_cortex_m_End
+__Vectors_End
-__cs3_interrupt_vector_cortex_m_Size EQU __cs3_interrupt_vector_cortex_m_End - __cs3_interrupt_vector_cortex_m
+__Vectors_Size EQU __Vectors_End - __Vectors
;* ================== END OF VECTOR TABLE DEFINITION ======================= */
@@ -207,37 +207,51 @@ __cs3_interrupt_vector_cortex_m_Size EQU __cs3_interrupt_vector_cortex_m_End -
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
- IMPORT __main
+ IMPORT __main
- ;* Remap vector table
- LDR R0, =__cs3_interrupt_vector_cortex_m
- LDR R1, =0xE000ED08 ;*VTOR register
- STR R0,[R1]
+ ; Remap vector table
+ LDR R0, =__Vectors
+ LDR R1, =0xE000ED08 ;*VTOR register
+ STR R0,[R1]
+
+ ; switch off branch prediction required in A11 step to use cached memory
+ LDR R0,=0x58004000 ;PREF_PCON
+ LDR R1,[R0]
+ ORR R1,R1,#0x00010000
+ STR R1,[R0]
- ;enable un-aligned memory access
- LDR R1, =0xE000ED14
- LDR.W R0,[R1,#0x0]
- BIC R0,R0,#0x8
- STR.W R0,[R1,#0x0]
+ ; Clear existing parity errors if any required in A11 step
+ LDR R0,=0x50004150 ;SCU_GCU_PEFLAG
+ LDR R1,=0xFFFFFFFF
+ STR R1,[R0]
+
+ ; Disable parity required in A11 step
+ LDR R0,=0x5000413C ; SCU_GCU_PEEN
+ MOV R1,#0
+ STR R1,[R0]
+
+ ;enable un-aligned memory access
+ LDR R1, =0xE000ED14
+ LDR.W R0,[R1,#0x0]
+ BIC R0,R0,#0x8
+ STR.W R0,[R1,#0x0]
- ;* C routines are likely to be called. Setup the stack now
- LDR SP,=__initial_sp
+ ;* C routines are likely to be called. Setup the stack now
+ LDR SP,=__initial_sp
- LDR R0, = SystemInit
- BLX R0
-
+ LDR R0, = SystemInit
+ BLX R0
+
- ;* Reset stack pointer before zipping off to user application
- LDR SP,=__initial_sp
-
- LDR R0, =__main
- BX R0
-
- ENDP
-
+ ;* Reset stack pointer before zipping off to user application
+ LDR SP,=__initial_sp
+ LDR R0, =__main
+ BX R0
+
+ ENDP
;* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */
@@ -291,107 +305,107 @@ SysTick_Handler PROC
;* ============= START OF INTERRUPT HANDLER DEFINITION ====================== */
;* IRQ Handlers */
- EXPORT SCU_0_IRQHandler [WEAK]
- EXPORT ERU0_0_IRQHandler [WEAK]
- EXPORT ERU0_1_IRQHandler [WEAK]
- EXPORT ERU0_2_IRQHandler [WEAK]
- EXPORT ERU0_3_IRQHandler [WEAK]
- EXPORT ERU1_0_IRQHandler [WEAK]
- EXPORT ERU1_1_IRQHandler [WEAK]
- EXPORT ERU1_2_IRQHandler [WEAK]
- EXPORT ERU1_3_IRQHandler [WEAK]
- EXPORT PMU0_0_IRQHandler [WEAK]
- EXPORT VADC0_C0_0_IRQHandler [WEAK]
- EXPORT VADC0_C0_1_IRQHandler [WEAK]
- EXPORT VADC0_C0_2_IRQHandler [WEAK]
- EXPORT VADC0_C0_3_IRQHandler [WEAK]
- EXPORT VADC0_G0_0_IRQHandler [WEAK]
- EXPORT VADC0_G0_1_IRQHandler [WEAK]
- EXPORT VADC0_G0_2_IRQHandler [WEAK]
- EXPORT VADC0_G0_3_IRQHandler [WEAK]
- EXPORT VADC0_G1_0_IRQHandler [WEAK]
- EXPORT VADC0_G1_1_IRQHandler [WEAK]
- EXPORT VADC0_G1_2_IRQHandler [WEAK]
- EXPORT VADC0_G1_3_IRQHandler [WEAK]
- EXPORT VADC0_G2_0_IRQHandler [WEAK]
- EXPORT VADC0_G2_1_IRQHandler [WEAK]
- EXPORT VADC0_G2_2_IRQHandler [WEAK]
- EXPORT VADC0_G2_3_IRQHandler [WEAK]
- EXPORT VADC0_G3_0_IRQHandler [WEAK]
- EXPORT VADC0_G3_1_IRQHandler [WEAK]
- EXPORT VADC0_G3_2_IRQHandler [WEAK]
- EXPORT VADC0_G3_3_IRQHandler [WEAK]
- EXPORT DSD0_0_IRQHandler [WEAK]
- EXPORT DSD0_1_IRQHandler [WEAK]
- EXPORT DSD0_2_IRQHandler [WEAK]
- EXPORT DSD0_3_IRQHandler [WEAK]
- EXPORT DSD0_4_IRQHandler [WEAK]
- EXPORT DSD0_5_IRQHandler [WEAK]
- EXPORT DSD0_6_IRQHandler [WEAK]
- EXPORT DSD0_7_IRQHandler [WEAK]
- EXPORT DAC0_0_IRQHandler [WEAK]
- EXPORT DAC0_1_IRQHandler [WEAK]
- EXPORT CCU40_0_IRQHandler [WEAK]
- EXPORT CCU40_1_IRQHandler [WEAK]
- EXPORT CCU40_2_IRQHandler [WEAK]
- EXPORT CCU40_3_IRQHandler [WEAK]
- EXPORT CCU41_0_IRQHandler [WEAK]
- EXPORT CCU41_1_IRQHandler [WEAK]
- EXPORT CCU41_2_IRQHandler [WEAK]
- EXPORT CCU41_3_IRQHandler [WEAK]
- EXPORT CCU42_0_IRQHandler [WEAK]
- EXPORT CCU42_1_IRQHandler [WEAK]
- EXPORT CCU42_2_IRQHandler [WEAK]
- EXPORT CCU42_3_IRQHandler [WEAK]
- EXPORT CCU43_0_IRQHandler [WEAK]
- EXPORT CCU43_1_IRQHandler [WEAK]
- EXPORT CCU43_2_IRQHandler [WEAK]
- EXPORT CCU43_3_IRQHandler [WEAK]
- EXPORT CCU80_0_IRQHandler [WEAK]
- EXPORT CCU80_1_IRQHandler [WEAK]
- EXPORT CCU80_2_IRQHandler [WEAK]
- EXPORT CCU80_3_IRQHandler [WEAK]
- EXPORT CCU81_0_IRQHandler [WEAK]
- EXPORT CCU81_1_IRQHandler [WEAK]
- EXPORT CCU81_2_IRQHandler [WEAK]
- EXPORT CCU81_3_IRQHandler [WEAK]
- EXPORT POSIF0_0_IRQHandler [WEAK]
- EXPORT POSIF0_1_IRQHandler [WEAK]
- EXPORT POSIF1_0_IRQHandler [WEAK]
- EXPORT POSIF1_1_IRQHandler [WEAK]
- EXPORT CAN0_0_IRQHandler [WEAK]
- EXPORT CAN0_1_IRQHandler [WEAK]
- EXPORT CAN0_2_IRQHandler [WEAK]
- EXPORT CAN0_3_IRQHandler [WEAK]
- EXPORT CAN0_4_IRQHandler [WEAK]
- EXPORT CAN0_5_IRQHandler [WEAK]
- EXPORT CAN0_6_IRQHandler [WEAK]
- EXPORT CAN0_7_IRQHandler [WEAK]
- EXPORT USIC0_0_IRQHandler [WEAK]
- EXPORT USIC0_1_IRQHandler [WEAK]
- EXPORT USIC0_2_IRQHandler [WEAK]
- EXPORT USIC0_3_IRQHandler [WEAK]
- EXPORT USIC0_4_IRQHandler [WEAK]
- EXPORT USIC0_5_IRQHandler [WEAK]
- EXPORT USIC1_0_IRQHandler [WEAK]
- EXPORT USIC1_1_IRQHandler [WEAK]
- EXPORT USIC1_2_IRQHandler [WEAK]
- EXPORT USIC1_3_IRQHandler [WEAK]
- EXPORT USIC1_4_IRQHandler [WEAK]
- EXPORT USIC1_5_IRQHandler [WEAK]
- EXPORT USIC2_0_IRQHandler [WEAK]
- EXPORT USIC2_1_IRQHandler [WEAK]
- EXPORT USIC2_2_IRQHandler [WEAK]
- EXPORT USIC2_3_IRQHandler [WEAK]
- EXPORT USIC2_4_IRQHandler [WEAK]
- EXPORT USIC2_5_IRQHandler [WEAK]
- EXPORT LEDTS0_0_IRQHandler [WEAK]
- EXPORT FCE0_0_IRQHandler [WEAK]
- EXPORT GPDMA0_0_IRQHandler [WEAK]
- EXPORT SDMMC0_0_IRQHandler [WEAK]
- EXPORT USB0_0_IRQHandler [WEAK]
- EXPORT ETH0_0_IRQHandler [WEAK]
- EXPORT GPDMA1_0_IRQHandler [WEAK]
+ EXPORT SCU_0_IRQHandler [WEAK]
+ EXPORT ERU0_0_IRQHandler [WEAK]
+ EXPORT ERU0_1_IRQHandler [WEAK]
+ EXPORT ERU0_2_IRQHandler [WEAK]
+ EXPORT ERU0_3_IRQHandler [WEAK]
+ EXPORT ERU1_0_IRQHandler [WEAK]
+ EXPORT ERU1_1_IRQHandler [WEAK]
+ EXPORT ERU1_2_IRQHandler [WEAK]
+ EXPORT ERU1_3_IRQHandler [WEAK]
+ EXPORT PMU0_0_IRQHandler [WEAK]
+ EXPORT VADC0_C0_0_IRQHandler [WEAK]
+ EXPORT VADC0_C0_1_IRQHandler [WEAK]
+ EXPORT VADC0_C0_2_IRQHandler [WEAK]
+ EXPORT VADC0_C0_3_IRQHandler [WEAK]
+ EXPORT VADC0_G0_0_IRQHandler [WEAK]
+ EXPORT VADC0_G0_1_IRQHandler [WEAK]
+ EXPORT VADC0_G0_2_IRQHandler [WEAK]
+ EXPORT VADC0_G0_3_IRQHandler [WEAK]
+ EXPORT VADC0_G1_0_IRQHandler [WEAK]
+ EXPORT VADC0_G1_1_IRQHandler [WEAK]
+ EXPORT VADC0_G1_2_IRQHandler [WEAK]
+ EXPORT VADC0_G1_3_IRQHandler [WEAK]
+ EXPORT VADC0_G2_0_IRQHandler [WEAK]
+ EXPORT VADC0_G2_1_IRQHandler [WEAK]
+ EXPORT VADC0_G2_2_IRQHandler [WEAK]
+ EXPORT VADC0_G2_3_IRQHandler [WEAK]
+ EXPORT VADC0_G3_0_IRQHandler [WEAK]
+ EXPORT VADC0_G3_1_IRQHandler [WEAK]
+ EXPORT VADC0_G3_2_IRQHandler [WEAK]
+ EXPORT VADC0_G3_3_IRQHandler [WEAK]
+ EXPORT DSD0_0_IRQHandler [WEAK]
+ EXPORT DSD0_1_IRQHandler [WEAK]
+ EXPORT DSD0_2_IRQHandler [WEAK]
+ EXPORT DSD0_3_IRQHandler [WEAK]
+ EXPORT DSD0_4_IRQHandler [WEAK]
+ EXPORT DSD0_5_IRQHandler [WEAK]
+ EXPORT DSD0_6_IRQHandler [WEAK]
+ EXPORT DSD0_7_IRQHandler [WEAK]
+ EXPORT DAC0_0_IRQHandler [WEAK]
+ EXPORT DAC0_1_IRQHandler [WEAK]
+ EXPORT CCU40_0_IRQHandler [WEAK]
+ EXPORT CCU40_1_IRQHandler [WEAK]
+ EXPORT CCU40_2_IRQHandler [WEAK]
+ EXPORT CCU40_3_IRQHandler [WEAK]
+ EXPORT CCU41_0_IRQHandler [WEAK]
+ EXPORT CCU41_1_IRQHandler [WEAK]
+ EXPORT CCU41_2_IRQHandler [WEAK]
+ EXPORT CCU41_3_IRQHandler [WEAK]
+ EXPORT CCU42_0_IRQHandler [WEAK]
+ EXPORT CCU42_1_IRQHandler [WEAK]
+ EXPORT CCU42_2_IRQHandler [WEAK]
+ EXPORT CCU42_3_IRQHandler [WEAK]
+ EXPORT CCU43_0_IRQHandler [WEAK]
+ EXPORT CCU43_1_IRQHandler [WEAK]
+ EXPORT CCU43_2_IRQHandler [WEAK]
+ EXPORT CCU43_3_IRQHandler [WEAK]
+ EXPORT CCU80_0_IRQHandler [WEAK]
+ EXPORT CCU80_1_IRQHandler [WEAK]
+ EXPORT CCU80_2_IRQHandler [WEAK]
+ EXPORT CCU80_3_IRQHandler [WEAK]
+ EXPORT CCU81_0_IRQHandler [WEAK]
+ EXPORT CCU81_1_IRQHandler [WEAK]
+ EXPORT CCU81_2_IRQHandler [WEAK]
+ EXPORT CCU81_3_IRQHandler [WEAK]
+ EXPORT POSIF0_0_IRQHandler [WEAK]
+ EXPORT POSIF0_1_IRQHandler [WEAK]
+ EXPORT POSIF1_0_IRQHandler [WEAK]
+ EXPORT POSIF1_1_IRQHandler [WEAK]
+ EXPORT CAN0_0_IRQHandler [WEAK]
+ EXPORT CAN0_1_IRQHandler [WEAK]
+ EXPORT CAN0_2_IRQHandler [WEAK]
+ EXPORT CAN0_3_IRQHandler [WEAK]
+ EXPORT CAN0_4_IRQHandler [WEAK]
+ EXPORT CAN0_5_IRQHandler [WEAK]
+ EXPORT CAN0_6_IRQHandler [WEAK]
+ EXPORT CAN0_7_IRQHandler [WEAK]
+ EXPORT USIC0_0_IRQHandler [WEAK]
+ EXPORT USIC0_1_IRQHandler [WEAK]
+ EXPORT USIC0_2_IRQHandler [WEAK]
+ EXPORT USIC0_3_IRQHandler [WEAK]
+ EXPORT USIC0_4_IRQHandler [WEAK]
+ EXPORT USIC0_5_IRQHandler [WEAK]
+ EXPORT USIC1_0_IRQHandler [WEAK]
+ EXPORT USIC1_1_IRQHandler [WEAK]
+ EXPORT USIC1_2_IRQHandler [WEAK]
+ EXPORT USIC1_3_IRQHandler [WEAK]
+ EXPORT USIC1_4_IRQHandler [WEAK]
+ EXPORT USIC1_5_IRQHandler [WEAK]
+ EXPORT USIC2_0_IRQHandler [WEAK]
+ EXPORT USIC2_1_IRQHandler [WEAK]
+ EXPORT USIC2_2_IRQHandler [WEAK]
+ EXPORT USIC2_3_IRQHandler [WEAK]
+ EXPORT USIC2_4_IRQHandler [WEAK]
+ EXPORT USIC2_5_IRQHandler [WEAK]
+ EXPORT LEDTS0_0_IRQHandler [WEAK]
+ EXPORT FCE0_0_IRQHandler [WEAK]
+ EXPORT GPDMA0_0_IRQHandler [WEAK]
+ EXPORT SDMMC0_0_IRQHandler [WEAK]
+ EXPORT USB0_0_IRQHandler [WEAK]
+ EXPORT ETH0_0_IRQHandler [WEAK]
+ EXPORT GPDMA1_0_IRQHandler [WEAK]
SCU_0_IRQHandler
@@ -500,13 +514,13 @@ GPDMA1_0_IRQHandler
;* ============= END OF INTERRUPT HANDLER DEFINITION ======================== */
;* Definition of the default weak SystemInit_DAVE3 function.
-;* This function will be called by the CMSIS SystemInit function.
-;* If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3
-;* which will overule this weak definition
+;* This function will be called by the CMSIS SystemInit function.
+;* If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3
+;* which will overule this weak definition
;*SystemInit_DAVE3
-;* NOP
-;* BX LR
+;* NOP
+;* BX LR
;*******************************************************************************
; User Stack and Heap initialization