mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Add SAM4L demo.
This commit is contained in:
Richard Barry
parent
3762630f27
commit
2cf9f1ac8c
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Microsoft Visual Studio Solution File, Format Version 11.00
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# Atmel Studio Solution File, Format Version 11.00
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Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "FreeRTOS_Demo", ".\FreeRTOS_Demo.cproj", "{DFC77570-BC67-4EE7-8143-C34E75167169}"
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EndProject
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Global
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GlobalSection(SolutionConfigurationPlatforms) = preSolution
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Debug|ARM = Debug|ARM
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Release|ARM = Release|ARM
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EndGlobalSection
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GlobalSection(ProjectConfigurationPlatforms) = postSolution
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{DFC77570-BC67-4EE7-8143-C34E75167169}.Debug|ARM.ActiveCfg = Debug|ARM
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{DFC77570-BC67-4EE7-8143-C34E75167169}.Debug|ARM.Build.0 = Debug|ARM
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{DFC77570-BC67-4EE7-8143-C34E75167169}.Release|ARM.ActiveCfg = Release|ARM
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{DFC77570-BC67-4EE7-8143-C34E75167169}.Release|ARM.Build.0 = Release|ARM
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EndGlobalSection
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GlobalSection(SolutionProperties) = preSolution
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HideSolutionNode = FALSE
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EndGlobalSection
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EndGlobal
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868
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/FreeRTOS_Demo.cproj
Normal file
868
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/FreeRTOS_Demo.cproj
Normal file
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<?xml version="1.0" encoding="utf-8"?>
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<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
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<PropertyGroup>
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<SchemaVersion>2.0</SchemaVersion>
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<ProjectVersion>6.0</ProjectVersion>
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<ToolchainName>com.Atmel.ARMGCC</ToolchainName>
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<ProjectGuid>{dfc77570-bc67-4ee7-8143-c34e75167169}</ProjectGuid>
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<avrdevice>ATSAM4LC4C</avrdevice>
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<avrdeviceseries>sam4l</avrdeviceseries>
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<OutputType>Executable</OutputType>
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<Language>C</Language>
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<OutputFileName>$(MSBuildProjectName)</OutputFileName>
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<OutputFileExtension>.elf</OutputFileExtension>
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<OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
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<AssemblyName>FreeRTOS_Demo</AssemblyName>
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<Name>FreeRTOS_Demo</Name>
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<RootNamespace>FreeRTOS_Demo</RootNamespace>
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<ToolchainFlavour>Native</ToolchainFlavour>
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<KeepTimersRunning>true</KeepTimersRunning>
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<OverrideVtor>false</OverrideVtor>
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<OverrideVtorValue />
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<eraseonlaunchrule>1</eraseonlaunchrule>
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<AsfVersion>3.5.1</AsfVersion>
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<AsfFrameworkConfig>
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<framework-data>
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<options>
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<option id="common.boards" value="Add" config="" content-id="Atmel.ASF" />
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<option id="common.services.basic.clock" value="Add" config="" content-id="Atmel.ASF" />
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<option id="common.services.ioport" value="Add" config="" content-id="Atmel.ASF" />
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<option id="common.services.basic.sleepmgr" value="Add" config="" content-id="Atmel.ASF" />
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<option id="sam.drivers.ast" value="Add" config="" content-id="Atmel.ASF" />
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<option id="sam.drivers.bpm" value="Add" config="" content-id="Atmel.ASF" />
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</options>
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<configurations>
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<configuration key="config.compiler.armgcc.create_aux" value="no" default="no" content-id="Atmel.ASF" />
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<configuration key="config.compiler.iarewarm.create_aux" value="no" default="no" content-id="Atmel.ASF" />
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<configuration key="config.compiler.as5_arm.create_aux" value="no" default="no" content-id="Atmel.ASF" />
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</configurations>
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<files>
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<file path="src/asf/common/boards/board.h" framework="" version="3.5.1" source="common/boards/board.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/dfll.h" framework="" version="3.5.1" source="common/services/clock/dfll.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/genclk.h" framework="" version="3.5.1" source="common/services/clock/genclk.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/osc.h" framework="" version="3.5.1" source="common/services/clock/osc.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/pll.h" framework="" version="3.5.1" source="common/services/clock/pll.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/dfll.c" framework="" version="3.5.1" source="common/services/clock/sam4l/dfll.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/dfll.h" framework="" version="3.5.1" source="common/services/clock/sam4l/dfll.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/genclk.h" framework="" version="3.5.1" source="common/services/clock/sam4l/genclk.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/osc.c" framework="" version="3.5.1" source="common/services/clock/sam4l/osc.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/osc.h" framework="" version="3.5.1" source="common/services/clock/sam4l/osc.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/pll.c" framework="" version="3.5.1" source="common/services/clock/sam4l/pll.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/pll.h" framework="" version="3.5.1" source="common/services/clock/sam4l/pll.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/sysclk.c" framework="" version="3.5.1" source="common/services/clock/sam4l/sysclk.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sam4l/sysclk.h" framework="" version="3.5.1" source="common/services/clock/sam4l/sysclk.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/clock/sysclk.h" framework="" version="3.5.1" source="common/services/clock/sysclk.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/ioport/ioport.h" framework="" version="3.5.1" source="common/services/ioport/ioport.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/ioport/sam/ioport_gpio.h" framework="" version="3.5.1" source="common/services/ioport/sam/ioport_gpio.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/sleepmgr/sam4l/sleepmgr.c" framework="" version="3.5.1" source="common/services/sleepmgr/sam4l/sleepmgr.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/sleepmgr/sam4l/sleepmgr.h" framework="" version="3.5.1" source="common/services/sleepmgr/sam4l/sleepmgr.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/services/sleepmgr/sleepmgr.h" framework="" version="3.5.1" source="common/services/sleepmgr/sleepmgr.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/utils/interrupt.h" framework="" version="3.5.1" source="common/utils/interrupt.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/utils/interrupt/interrupt_sam_nvic.c" framework="" version="3.5.1" source="common/utils/interrupt/interrupt_sam_nvic.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/utils/interrupt/interrupt_sam_nvic.h" framework="" version="3.5.1" source="common/utils/interrupt/interrupt_sam_nvic.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/common/utils/parts.h" framework="" version="3.5.1" source="common/utils/parts.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/boards/sam4l_ek/init.c" framework="" version="3.5.1" source="sam/boards/sam4l_ek/init.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/boards/sam4l_ek/sam4l_ek.h" framework="" version="3.5.1" source="sam/boards/sam4l_ek/sam4l_ek.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/drivers/bpm/bpm.c" framework="" version="3.5.1" source="sam/drivers/bpm/bpm.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/drivers/bpm/bpm.h" framework="" version="3.5.1" source="sam/drivers/bpm/bpm.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/drivers/bpm/sleep.h" framework="" version="3.5.1" source="sam/drivers/bpm/sleep.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/drivers/flashcalw/flashcalw.c" framework="" version="3.5.1" source="sam/drivers/flashcalw/flashcalw.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/drivers/flashcalw/flashcalw.h" framework="" version="3.5.1" source="sam/drivers/flashcalw/flashcalw.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/lcdca_example.c" framework="" version="3.5.1" source="sam/drivers/lcdca/example/lcdca_example.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/config/conf_board.h" framework="" version="3.5.1" source="sam/drivers/lcdca/example/sam4lc4c_sam4l_ek/conf_board.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/config/conf_clock.h" framework="" version="3.5.1" source="sam/drivers/lcdca/example/sam4lc4c_sam4l_ek/conf_clock.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/config/conf_example.h" framework="" version="3.5.1" source="sam/drivers/lcdca/example/sam4lc4c_sam4l_ek/conf_example.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/config/conf_sleepmgr.h" framework="" version="3.5.1" source="sam/drivers/lcdca/example/sam4lc4c_sam4l_ek/conf_sleepmgr.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/include/sam4l.h" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/include/sam4l.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/include/sam4l_patch_asf.h" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/include/sam4l_patch_asf.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/source/templates/exceptions.c" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/source/templates/exceptions.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/source/templates/exceptions.h" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/source/templates/exceptions.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/source/templates/gcc/startup_sam4l.c" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/source/templates/gcc/startup_sam4l.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/cmsis/sam4l/source/templates/system_sam4l.h" framework="" version="3.5.1" source="sam/utils/cmsis/sam4l/source/templates/system_sam4l.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/compiler.h" framework="" version="3.5.1" source="sam/utils/compiler.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/header_files/io.h" framework="" version="3.5.1" source="sam/utils/header_files/io.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/linker_scripts/sam4l/sam4l4/gcc/flash.ld" framework="" version="3.5.1" source="sam/utils/linker_scripts/sam4l/sam4l4/gcc/flash.ld" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/make/Makefile.in" framework="" version="3.5.1" source="sam/utils/make/Makefile.in" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/preprocessor/mrepeat.h" framework="" version="3.5.1" source="sam/utils/preprocessor/mrepeat.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/preprocessor/preprocessor.h" framework="" version="3.5.1" source="sam/utils/preprocessor/preprocessor.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/preprocessor/stringz.h" framework="" version="3.5.1" source="sam/utils/preprocessor/stringz.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/preprocessor/tpaste.h" framework="" version="3.5.1" source="sam/utils/preprocessor/tpaste.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/status_codes.h" framework="" version="3.5.1" source="sam/utils/status_codes.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/sam/utils/syscalls/gcc/syscalls.c" framework="" version="3.5.1" source="sam/utils/syscalls/gcc/syscalls.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf" framework="" version="3.5.1" source="thirdparty/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Include/arm_math.h" framework="" version="3.5.1" source="thirdparty/CMSIS/Include/arm_math.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Include/core_cm4.h" framework="" version="3.5.1" source="thirdparty/CMSIS/Include/core_cm4.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Include/core_cm4_simd.h" framework="" version="3.5.1" source="thirdparty/CMSIS/Include/core_cm4_simd.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Include/core_cmFunc.h" framework="" version="3.5.1" source="thirdparty/CMSIS/Include/core_cmFunc.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Include/core_cmInstr.h" framework="" version="3.5.1" source="thirdparty/CMSIS/Include/core_cmInstr.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/Lib/GCC/libarm_cortexM4l_math.a" framework="" version="3.5.1" source="thirdparty/CMSIS/Lib/GCC/libarm_cortexM4l_math.a" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/README.txt" framework="" version="3.5.1" source="thirdparty/CMSIS/README.txt" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/CMSIS/license.txt" framework="" version="3.5.1" source="thirdparty/CMSIS/license.txt" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/timers.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\timers.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/tasks.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\tasks.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/queue.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\queue.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/list.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\list.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/FreeRTOS_CLI.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\FreeRTOS_CLI.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/portable/memmang/heap_4.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\portable\memmang\heap_4.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/portable/gcc/arm_cm3/port.c" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\portable\gcc\arm_cm3\port.c" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/readme.txt" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\readme.txt" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/ATMEL-disclaimer.txt" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\ATMEL-disclaimer.txt" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/mpu_wrappers.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\mpu_wrappers.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/semphr.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\semphr.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/FreeRTOS.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\FreeRTOS.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/portable.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\portable.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/queue.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\queue.h" changed="False" content-id="Atmel.ASF" />
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<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/list.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\list.h" changed="False" content-id="Atmel.ASF" />
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||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/timers.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\timers.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/StackMacros.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\StackMacros.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/projdefs.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\projdefs.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/task.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\task.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/portable/gcc/arm_cm3/portmacro.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\portable\gcc\arm_cm3\portmacro.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/FreeRTOS_CLI.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\FreeRTOS_CLI.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/thirdparty/freertos/freertos-7.3.0/source/include/croutine.h" framework="" version="" source="thirdparty\freertos\freertos-7.3.0\source\include\croutine.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/sam/drivers/ast/ast.c" framework="" version="" source="sam\drivers\ast\ast.c" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/asf/sam/drivers/ast/ast.h" framework="" version="" source="sam\drivers\ast\ast.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
<file path="src/config/conf_ast.h" framework="" version="" source="sam\drivers\ast\module_config\conf_ast.h" changed="False" content-id="Atmel.ASF" />
|
||||||
|
</files>
|
||||||
|
<documentation help="http://asf.atmel.com/docs/3.5.1/sam.drivers.lcdca.example.sam4l_ek/html/index.html" />
|
||||||
|
</framework-data>
|
||||||
|
</AsfFrameworkConfig>
|
||||||
|
<avrtoolinterface>SWD</avrtoolinterface>
|
||||||
|
<avrtool>com.atmel.avrdbg.tool.samice</avrtool>
|
||||||
|
<com_atmel_avrdbg_tool_samice>
|
||||||
|
<ToolType>com.atmel.avrdbg.tool.samice</ToolType>
|
||||||
|
<ToolName>J-Link-OB-SAM3U128</ToolName>
|
||||||
|
<ToolNumber>000480008423</ToolNumber>
|
||||||
|
<KeepTimersRunning>true</KeepTimersRunning>
|
||||||
|
<OverrideVtor>false</OverrideVtor>
|
||||||
|
<OverrideVtorValue>
|
||||||
|
</OverrideVtorValue>
|
||||||
|
<Channel>
|
||||||
|
<host>127.0.0.1</host>
|
||||||
|
<port>4788</port>
|
||||||
|
<ssl>False</ssl>
|
||||||
|
</Channel>
|
||||||
|
<ToolOptions>
|
||||||
|
<InterfaceName>SWD</InterfaceName>
|
||||||
|
<InterfaceProperties>
|
||||||
|
<JtagDbgClock>4000000</JtagDbgClock>
|
||||||
|
<JtagProgClock>1000000</JtagProgClock>
|
||||||
|
<IspClock>150000</IspClock>
|
||||||
|
<JtagInChain>false</JtagInChain>
|
||||||
|
<JtagEnableExtResetOnStartSession>false</JtagEnableExtResetOnStartSession>
|
||||||
|
<JtagDevicesBefore>0</JtagDevicesBefore>
|
||||||
|
<JtagDevicesAfter>0</JtagDevicesAfter>
|
||||||
|
<JtagInstrBitsBefore>0</JtagInstrBitsBefore>
|
||||||
|
<JtagInstrBitsAfter>0</JtagInstrBitsAfter>
|
||||||
|
<SwdClock>4000000</SwdClock>
|
||||||
|
</InterfaceProperties>
|
||||||
|
</ToolOptions>
|
||||||
|
</com_atmel_avrdbg_tool_samice>
|
||||||
|
</PropertyGroup>
|
||||||
|
<PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
|
||||||
|
<ToolchainSettings>
|
||||||
|
<ArmGcc>
|
||||||
|
<armgcc.common.general.symbols>__ATSAM4LC4C__</armgcc.common.general.symbols>
|
||||||
|
<armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
|
||||||
|
<armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
|
||||||
|
<armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
|
||||||
|
<armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
|
||||||
|
<armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
|
||||||
|
<armgcc.compiler.symbols.DefSymbols>
|
||||||
|
<ListValues>
|
||||||
|
<Value>BOARD=SAM4L_EK</Value>
|
||||||
|
<Value>ARM_MATH_CM4=true</Value>
|
||||||
|
<Value>__ATSAM4LC4C__</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.compiler.symbols.DefSymbols>
|
||||||
|
<armgcc.compiler.directories.DefaultIncludePath>False</armgcc.compiler.directories.DefaultIncludePath>
|
||||||
|
<armgcc.compiler.directories.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.compiler.directories.IncludePaths>
|
||||||
|
<armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
|
||||||
|
<armgcc.compiler.optimization.OtherFlags>-fdata-sections</armgcc.compiler.optimization.OtherFlags>
|
||||||
|
<armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
|
||||||
|
<armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
|
||||||
|
<armgcc.linker.libraries.Libraries>
|
||||||
|
<ListValues>
|
||||||
|
<Value>arm_cortexM4l_math</Value>
|
||||||
|
<Value>m</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.linker.libraries.Libraries>
|
||||||
|
<armgcc.linker.libraries.LibrarySearchPaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../cmsis/linkerScripts</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.linker.libraries.LibrarySearchPaths>
|
||||||
|
<armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
|
||||||
|
<armgcc.linker.miscellaneous.LinkerFlags>-T../src/asf/sam/utils/linker_scripts/sam4l/sam4l4/gcc/flash.ld -Wl,--cref -Wl,--entry=Reset_Handler -mthumb</armgcc.linker.miscellaneous.LinkerFlags>
|
||||||
|
<armgcc.assembler.general.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.assembler.general.IncludePaths>
|
||||||
|
<armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM4=true -DBOARD=SAM4L_EK -D__ATSAM4LC4C__</armgcc.preprocessingassembler.general.AssemblerFlags>
|
||||||
|
<armgcc.preprocessingassembler.general.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.preprocessingassembler.general.IncludePaths>
|
||||||
|
</ArmGcc>
|
||||||
|
</ToolchainSettings>
|
||||||
|
</PropertyGroup>
|
||||||
|
<PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
|
||||||
|
<ToolchainSettings>
|
||||||
|
<ArmGcc>
|
||||||
|
<armgcc.common.general.symbols>__ATSAM4LC4C__</armgcc.common.general.symbols>
|
||||||
|
<armgcc.common.outputfiles.hex>True</armgcc.common.outputfiles.hex>
|
||||||
|
<armgcc.common.outputfiles.lss>True</armgcc.common.outputfiles.lss>
|
||||||
|
<armgcc.common.outputfiles.eep>True</armgcc.common.outputfiles.eep>
|
||||||
|
<armgcc.common.outputfiles.bin>True</armgcc.common.outputfiles.bin>
|
||||||
|
<armgcc.common.outputfiles.srec>True</armgcc.common.outputfiles.srec>
|
||||||
|
<armgcc.compiler.symbols.DefSymbols>
|
||||||
|
<ListValues>
|
||||||
|
<Value>BOARD=SAM4L_EK</Value>
|
||||||
|
<Value>ARM_MATH_CM4=true</Value>
|
||||||
|
<Value>__SAM4LC4C__</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.compiler.symbols.DefSymbols>
|
||||||
|
<armgcc.compiler.directories.DefaultIncludePath>False</armgcc.compiler.directories.DefaultIncludePath>
|
||||||
|
<armgcc.compiler.directories.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
<Value>../../../Source/include</Value>
|
||||||
|
<Value>../../../Source/portable/GCC/ARM_CM3</Value>
|
||||||
|
<Value>../../Common/include</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.compiler.directories.IncludePaths>
|
||||||
|
<armgcc.compiler.optimization.OtherFlags>-fdata-sections</armgcc.compiler.optimization.OtherFlags>
|
||||||
|
<armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
|
||||||
|
<armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
|
||||||
|
<armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
|
||||||
|
<armgcc.compiler.miscellaneous.OtherFlags>-std=gnu99 -Wmissing-field-initializers</armgcc.compiler.miscellaneous.OtherFlags>
|
||||||
|
<armgcc.linker.libraries.Libraries>
|
||||||
|
<ListValues>
|
||||||
|
<Value>arm_cortexM4l_math</Value>
|
||||||
|
<Value>m</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.linker.libraries.Libraries>
|
||||||
|
<armgcc.linker.libraries.LibrarySearchPaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../cmsis/linkerScripts</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.linker.libraries.LibrarySearchPaths>
|
||||||
|
<armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
|
||||||
|
<armgcc.linker.miscellaneous.LinkerFlags>-T../src/asf/sam/utils/linker_scripts/sam4l/sam4l4/gcc/flash.ld -Wl,--cref -Wl,--entry=Reset_Handler -mthumb</armgcc.linker.miscellaneous.LinkerFlags>
|
||||||
|
<armgcc.assembler.general.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.assembler.general.IncludePaths>
|
||||||
|
<armgcc.assembler.debugging.DebugLevel>Default (-g)</armgcc.assembler.debugging.DebugLevel>
|
||||||
|
<armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM4=true -DBOARD=SAM4L_EK -D__ATSAM4LC4C__</armgcc.preprocessingassembler.general.AssemblerFlags>
|
||||||
|
<armgcc.preprocessingassembler.general.IncludePaths>
|
||||||
|
<ListValues>
|
||||||
|
<Value>../src/asf/sam/utils/preprocessor</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/lcdca/example/sam4lc4c_sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/include</Value>
|
||||||
|
<Value>../src/asf/common/services/sleepmgr</Value>
|
||||||
|
<Value>../src/asf/sam/utils</Value>
|
||||||
|
<Value>../src/asf/common/boards</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/flashcalw</Value>
|
||||||
|
<Value>../src/asf/sam/boards</Value>
|
||||||
|
<Value>../src/asf/common/services/clock</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/bpm</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Include</Value>
|
||||||
|
<Value>../src/asf/sam/boards/sam4l_ek</Value>
|
||||||
|
<Value>../src/asf/sam/utils/header_files</Value>
|
||||||
|
<Value>../src/asf/common/services/ioport</Value>
|
||||||
|
<Value>../src/asf/sam/utils/cmsis/sam4l/source/templates</Value>
|
||||||
|
<Value>../src/asf/common/utils</Value>
|
||||||
|
<Value>../src/asf/thirdparty/CMSIS/Lib/GCC</Value>
|
||||||
|
<Value>../src</Value>
|
||||||
|
<Value>../src/config</Value>
|
||||||
|
<Value>../src/asf/sam/drivers/ast</Value>
|
||||||
|
</ListValues>
|
||||||
|
</armgcc.preprocessingassembler.general.IncludePaths>
|
||||||
|
<armgcc.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcc.preprocessingassembler.debugging.DebugLevel>
|
||||||
|
</ArmGcc>
|
||||||
|
</ToolchainSettings>
|
||||||
|
</PropertyGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<Folder Include="src\" />
|
||||||
|
<Folder Include="src\asf\" />
|
||||||
|
<Folder Include="src\asf\common\" />
|
||||||
|
<Folder Include="src\asf\common\boards\" />
|
||||||
|
<Folder Include="src\asf\common\services\" />
|
||||||
|
<Folder Include="src\asf\common\services\clock\" />
|
||||||
|
<Folder Include="src\asf\common\services\clock\sam4l\" />
|
||||||
|
<Folder Include="src\asf\common\services\ioport\" />
|
||||||
|
<Folder Include="src\asf\common\services\ioport\sam\" />
|
||||||
|
<Folder Include="src\asf\common\services\sleepmgr\" />
|
||||||
|
<Folder Include="src\asf\common\services\sleepmgr\sam4l\" />
|
||||||
|
<Folder Include="src\asf\common\utils\" />
|
||||||
|
<Folder Include="src\asf\common\utils\interrupt\" />
|
||||||
|
<Folder Include="src\asf\sam\" />
|
||||||
|
<Folder Include="src\asf\sam\boards\" />
|
||||||
|
<Folder Include="src\asf\sam\boards\sam4l_ek\" />
|
||||||
|
<Folder Include="src\asf\sam\drivers\" />
|
||||||
|
<Folder Include="src\asf\sam\drivers\ast\" />
|
||||||
|
<Folder Include="src\asf\sam\drivers\bpm\" />
|
||||||
|
<Folder Include="src\asf\sam\drivers\flashcalw\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\sam4l\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\sam4l\include\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\sam4l\source\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\sam4l\source\templates\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\cmsis\sam4l\source\templates\gcc\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\header_files\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\linker_scripts\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\linker_scripts\sam4l\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\linker_scripts\sam4l\sam4l4\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\linker_scripts\sam4l\sam4l4\gcc\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\make\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\preprocessor\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\syscalls\" />
|
||||||
|
<Folder Include="src\asf\sam\utils\syscalls\gcc\" />
|
||||||
|
<Folder Include="src\asf\thirdparty\" />
|
||||||
|
<Folder Include="src\asf\thirdparty\CMSIS\" />
|
||||||
|
<Folder Include="src\asf\thirdparty\CMSIS\Include\" />
|
||||||
|
<Folder Include="src\asf\thirdparty\CMSIS\Lib\" />
|
||||||
|
<Folder Include="src\asf\thirdparty\CMSIS\Lib\GCC\" />
|
||||||
|
<Folder Include="src\Common-Demo-Source\" />
|
||||||
|
<Folder Include="src\Common-Demo-Source\include\" />
|
||||||
|
<Folder Include="src\config\" />
|
||||||
|
<Folder Include="src\FreeRTOS-Source" />
|
||||||
|
<Folder Include="src\FreeRTOS-Source\include" />
|
||||||
|
<Folder Include="src\FreeRTOS-Source\portable" />
|
||||||
|
<Folder Include="src\Standard Demo Tasks" />
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\linker_scripts\sam4l\sam4l4\gcc\flash.ld">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\asf\sam\utils\make\Makefile.in">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\CMSIS END USER LICENCE AGREEMENT.pdf">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Lib\GCC\libarm_cortexM4l_math.a">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\README.txt">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
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|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\utils\parts.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\sleepmgr\sleepmgr.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\config\conf_board.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\osc.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\cmsis\sam4l\source\templates\exceptions.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Include\arm_math.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\utils\interrupt.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\compiler.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\drivers\bpm\bpm.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\cmsis\sam4l\include\sam4l.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\config\conf_example.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\cmsis\sam4l\include\sam4l_patch_asf.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\preprocessor\tpaste.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\pll.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sam4l\sysclk.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\status_codes.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\header_files\io.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sam4l\dfll.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\drivers\bpm\sleep.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Include\core_cmFunc.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sysclk.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sam4l\osc.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\cmsis\sam4l\source\templates\system_sam4l.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\utils\interrupt\interrupt_sam_nvic.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\genclk.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\sleepmgr\sam4l\sleepmgr.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\boards\board.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\ioport\ioport.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\drivers\flashcalw\flashcalw.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Include\core_cm4_simd.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\config\conf_sleepmgr.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Include\core_cmInstr.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\preprocessor\stringz.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\preprocessor\preprocessor.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\config\conf_clock.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\dfll.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\thirdparty\CMSIS\Include\core_cm4.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sam4l\genclk.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\ioport\sam\ioport_gpio.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\utils\preprocessor\mrepeat.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\common\services\clock\sam4l\pll.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<None Include="src\asf\sam\boards\sam4l_ek\sam4l_ek.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
</ItemGroup>
|
||||||
|
<ItemGroup>
|
||||||
|
<Compile Include="..\..\Source\include\FreeRTOS.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\FreeRTOS.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\list.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\list.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\mpu_wrappers.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\mpu_wrappers.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\portable.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\portable.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\projdefs.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\projdefs.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\queue.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\queue.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\semphr.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\semphr.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\StackMacros.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\StackMacros.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\task.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\task.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\include\timers.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\include\timers.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\list.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\list.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\portable\GCC\ARM_CM3\port.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\portable\port.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\portable\GCC\ARM_CM3\portmacro.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\portable\portmacro.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\portable\MemMang\heap_4.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\portable\heap_4.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\queue.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\queue.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\tasks.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\tasks.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\..\Source\timers.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\FreeRTOS-Source\timers.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\BlockQ.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\BlockQ.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\blocktim.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\blocktim.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\comtest.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\comtest.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\dynamic.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\dynamic.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\GenQTest.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\GenQTest.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\PollQ.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\PollQ.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\recmutex.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\recmutex.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\include\semtest.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\include\semtest.h</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\BlockQ.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\BlockQ.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\blocktim.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\blocktim.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\countsem.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\countsem.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\dynamic.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\dynamic.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\GenQTest.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\GenQTest.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\PollQ.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\PollQ.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\recmutex.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\recmutex.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="..\Common\Minimal\semtest.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
<Link>src\Common-Demo-Source\semtest.c</Link>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\config\FreeRTOSConfig.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\drivers\ast\ast.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\main.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\main_full.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\main_low_power.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\ParTest.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\SAM4L_low_power_tick_management.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<None Include="src\asf\sam\drivers\ast\ast.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\config\conf_ast.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<None Include="src\asf.h">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</None>
|
||||||
|
<Compile Include="src\asf\common\services\clock\sam4l\dfll.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\common\services\clock\sam4l\osc.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\common\services\clock\sam4l\pll.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\common\services\clock\sam4l\sysclk.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\common\services\sleepmgr\sam4l\sleepmgr.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\common\utils\interrupt\interrupt_sam_nvic.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\boards\sam4l_ek\init.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\drivers\bpm\bpm.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\drivers\flashcalw\flashcalw.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\utils\cmsis\sam4l\source\templates\exceptions.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\utils\cmsis\sam4l\source\templates\gcc\startup_sam4l.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
<Compile Include="src\asf\sam\utils\syscalls\gcc\syscalls.c">
|
||||||
|
<SubType>compile</SubType>
|
||||||
|
</Compile>
|
||||||
|
</ItemGroup>
|
||||||
|
<Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
|
||||||
|
</Project>
|
||||||
31
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/jlink.config
Normal file
31
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/jlink.config
Normal file
|
|
@ -0,0 +1,31 @@
|
||||||
|
[BREAKPOINTS]
|
||||||
|
ShowInfoWin = 1
|
||||||
|
EnableFlashBP = 2
|
||||||
|
BPDuringExecution = 0
|
||||||
|
[CFI]
|
||||||
|
CFISize = 0x00
|
||||||
|
CFIAddr = 0x00
|
||||||
|
[CPU]
|
||||||
|
OverrideMemMap = 0
|
||||||
|
AllowSimulation = 1
|
||||||
|
ScriptFile=""
|
||||||
|
[FLASH]
|
||||||
|
MinNumBytesFlashDL = 0
|
||||||
|
SkipProgOnCRCMatch = 1
|
||||||
|
VerifyDownload = 1
|
||||||
|
AllowCaching = 1
|
||||||
|
EnableFlashDL = 2
|
||||||
|
Override = 0
|
||||||
|
Device="UNSPECIFIED"
|
||||||
|
[GENERAL]
|
||||||
|
WorkRAMSize = 0x00
|
||||||
|
WorkRAMAddr = 0x00
|
||||||
|
[SWO]
|
||||||
|
SWOLogFile=""
|
||||||
|
[MEM]
|
||||||
|
RdOverrideOrMask = 0x00
|
||||||
|
RdOverrideAndMask = 0xFFFFFFFF
|
||||||
|
RdOverrideAddr = 0xFFFFFFFF
|
||||||
|
WrOverrideOrMask = 0x00
|
||||||
|
WrOverrideAndMask = 0xFFFFFFFF
|
||||||
|
WrOverrideAddr = 0xFFFFFFFF
|
||||||
123
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c
Normal file
123
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c
Normal file
|
|
@ -0,0 +1,123 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Simple IO routines to control the LEDs.
|
||||||
|
*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Scheduler includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
|
||||||
|
/* Demo includes. */
|
||||||
|
#include "partest.h"
|
||||||
|
|
||||||
|
/* Library includes. */
|
||||||
|
#include <board.h>
|
||||||
|
#include <asf.h>
|
||||||
|
|
||||||
|
/* The number of LEDs available to the user on the evaluation kit. */
|
||||||
|
#define partestNUM_LEDS ( LED_COUNT )
|
||||||
|
static portBASE_TYPE xLEDState = pdFALSE;
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vParTestInitialise( void )
|
||||||
|
{
|
||||||
|
/* In this case, the LED pin is configured in the board_init() function. */
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
|
||||||
|
{
|
||||||
|
if( uxLED < partestNUM_LEDS )
|
||||||
|
{
|
||||||
|
/* Turn the LED on. */
|
||||||
|
taskENTER_CRITICAL();
|
||||||
|
{
|
||||||
|
ioport_set_pin_level( LED0_GPIO, xValue );
|
||||||
|
xLEDState = xValue;
|
||||||
|
}
|
||||||
|
taskEXIT_CRITICAL();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||||
|
{
|
||||||
|
vParTestSetLED( uxLED, !xLEDState );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -0,0 +1,395 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Standard includes. */
|
||||||
|
#include "limits.h"
|
||||||
|
|
||||||
|
/* FreeRTOS includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
|
||||||
|
/* Library includes. */
|
||||||
|
#include <asf.h>
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* When configCREATE_LOW_POWER_DEMO is set to 1 then the tick interrupt
|
||||||
|
* is generated by the AST. The AST configuration and handling functions are
|
||||||
|
* defined in this file.
|
||||||
|
*
|
||||||
|
* When configCREATE_LOW_POWER_DEMO is set to 0 the tick interrupt is
|
||||||
|
* generated by the standard FreeRTOS Cortex-M port layer, which uses the
|
||||||
|
* SysTick timer.
|
||||||
|
*/
|
||||||
|
#if configCREATE_LOW_POWER_DEMO == 1
|
||||||
|
|
||||||
|
/* Constants required to pend a PendSV interrupt from the tick ISR if the
|
||||||
|
preemptive scheduler is being used. These are just standard bits and registers
|
||||||
|
within the Cortex-M core itself. */
|
||||||
|
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
|
||||||
|
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||||
|
|
||||||
|
/* The alarm used to generate interrupts in the asynchronous timer. */
|
||||||
|
#define portAST_ALARM_CHANNEL 0
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The tick interrupt is generated by the asynchronous timer. The default tick
|
||||||
|
* interrupt handler cannot be used (even with the AST being handled from the
|
||||||
|
* tick hook function) because the default tick interrupt accesses the SysTick
|
||||||
|
* registers when configUSE_TICKLESS_IDLE set to 1. AST_ALARM_Handler() is the
|
||||||
|
* default name for the AST alarm interrupt. This definition overrides the
|
||||||
|
* default implementation that is weakly defined in the interrupt vector table
|
||||||
|
* file.
|
||||||
|
*/
|
||||||
|
void AST_ALARM_Handler(void);
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Calculate how many clock increments make up a single tick period. */
|
||||||
|
static const uint32_t ulAlarmValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
|
||||||
|
|
||||||
|
/* Holds the maximum number of ticks that can be suppressed - which is
|
||||||
|
basically how far into the future an interrupt can be generated. Set
|
||||||
|
during initialisation. */
|
||||||
|
static portTickType xMaximumPossibleSuppressedTicks = 0;
|
||||||
|
|
||||||
|
/* Flag set from the tick interrupt to allow the sleep processing to know if
|
||||||
|
sleep mode was exited because of an AST interrupt or a different interrupt. */
|
||||||
|
static volatile uint32_t ulTickFlag = pdFALSE;
|
||||||
|
|
||||||
|
/* The AST counter is stopped temporarily each time it is re-programmed. The
|
||||||
|
following variable offsets the AST counter alarm value by the number of AST
|
||||||
|
counts that would typically be missed while the counter was stopped to compensate
|
||||||
|
for the lost time. _RB_ Value needs calculating correctly. */
|
||||||
|
static uint32_t ulStoppedTimerCompensation = 10 / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* The tick interrupt handler. This is always the same other than the part that
|
||||||
|
clears the interrupt, which is specific to the clock being used to generate the
|
||||||
|
tick. */
|
||||||
|
void AST_ALARM_Handler(void)
|
||||||
|
{
|
||||||
|
/* If using preemption, also force a context switch by pending the PendSV
|
||||||
|
interrupt. */
|
||||||
|
#if configUSE_PREEMPTION == 1
|
||||||
|
{
|
||||||
|
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Protect incrementing the tick with an interrupt safe critical section. */
|
||||||
|
( void ) portSET_INTERRUPT_MASK_FROM_ISR();
|
||||||
|
{
|
||||||
|
vTaskIncrementTick();
|
||||||
|
|
||||||
|
/* Just completely clear the interrupt mask on exit by passing 0 because
|
||||||
|
it is known that this interrupt will only ever execute with the lowest
|
||||||
|
possible interrupt priority. */
|
||||||
|
}
|
||||||
|
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
|
||||||
|
|
||||||
|
/* The CPU woke because of a tick. */
|
||||||
|
ulTickFlag = pdTRUE;
|
||||||
|
|
||||||
|
/* If this is the first tick since exiting tickless mode then the AST needs
|
||||||
|
to be reconfigured to generate interrupts at the defined tick frequency. */
|
||||||
|
ast_write_alarm0_value( AST, ulAlarmValueForOneTick );
|
||||||
|
|
||||||
|
/* Ensure the interrupt is clear before exiting. */
|
||||||
|
ast_clear_interrupt_flag( AST, AST_INTERRUPT_ALARM );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Override the default definition of vPortSetupTimerInterrupt() that is weakly
|
||||||
|
defined in the FreeRTOS Cortex-M3 port layer layer with a version that
|
||||||
|
configures the asynchronous timer (AST) to generate the tick interrupt. */
|
||||||
|
void vPortSetupTimerInterrupt( void )
|
||||||
|
{
|
||||||
|
struct ast_config ast_conf;
|
||||||
|
|
||||||
|
/* Ensure the AST can bring the CPU out of sleep mode. */
|
||||||
|
sleepmgr_lock_mode( SLEEPMGR_RET );
|
||||||
|
|
||||||
|
/* Ensure the 32KHz oscillator is enabled. */
|
||||||
|
if( osc_is_ready( OSC_ID_OSC32 ) == pdFALSE )
|
||||||
|
{
|
||||||
|
osc_enable( OSC_ID_OSC32 );
|
||||||
|
osc_wait_ready( OSC_ID_OSC32 );
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable the AST itself. */
|
||||||
|
ast_enable( AST );
|
||||||
|
|
||||||
|
ast_conf.mode = AST_COUNTER_MODE; /* Simple up counter. */
|
||||||
|
ast_conf.osc_type = AST_OSC_32KHZ;
|
||||||
|
ast_conf.psel = 0; /* No prescale so the actual frequency is 32KHz/2. */
|
||||||
|
ast_conf.counter = 0;
|
||||||
|
ast_set_config( AST, &ast_conf );
|
||||||
|
|
||||||
|
/* The AST alarm interrupt is used as the tick interrupt. Ensure the alarm
|
||||||
|
status starts clear. */
|
||||||
|
ast_clear_interrupt_flag( AST, AST_INTERRUPT_ALARM );
|
||||||
|
|
||||||
|
/* Enable wakeup from alarm 0 in the AST and power manager. */
|
||||||
|
ast_enable_wakeup( AST, AST_WAKEUP_ALARM );
|
||||||
|
bpm_enable_wakeup_source( BPM, ( 1 << BPM_BKUPWEN_AST ) );
|
||||||
|
|
||||||
|
/* Tick interrupt MUST execute at the lowest interrupt priority. */
|
||||||
|
NVIC_SetPriority( AST_ALARM_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
|
||||||
|
ast_enable_interrupt( AST, AST_INTERRUPT_ALARM );
|
||||||
|
NVIC_ClearPendingIRQ( AST_ALARM_IRQn );
|
||||||
|
NVIC_EnableIRQ( AST_ALARM_IRQn );
|
||||||
|
|
||||||
|
/* Automatically clear the counter on interrupt. */
|
||||||
|
ast_enable_counter_clear_on_alarm( AST, portAST_ALARM_CHANNEL );
|
||||||
|
|
||||||
|
/* Start with the tick active and generating a tick with regular period. */
|
||||||
|
ast_write_alarm0_value( AST, ulAlarmValueForOneTick );
|
||||||
|
ast_write_counter_value( AST, 0 );
|
||||||
|
|
||||||
|
/* See the comments where xMaximumPossibleSuppressedTicks is declared. */
|
||||||
|
xMaximumPossibleSuppressedTicks = ULONG_MAX / ulAlarmValueForOneTick;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void prvDisableAST( void )
|
||||||
|
{
|
||||||
|
while( ast_is_busy( AST ) )
|
||||||
|
{
|
||||||
|
/* Nothing to do here, just waiting. */
|
||||||
|
}
|
||||||
|
AST->AST_CR &= ~( AST_CR_EN );
|
||||||
|
while( ast_is_busy( AST ) )
|
||||||
|
{
|
||||||
|
/* Nothing to do here, just waiting. */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void prvEnableAST( void )
|
||||||
|
{
|
||||||
|
while( ast_is_busy( AST ) )
|
||||||
|
{
|
||||||
|
/* Nothing to do here, just waiting. */
|
||||||
|
}
|
||||||
|
AST->AST_CR |= AST_CR_EN;
|
||||||
|
while( ast_is_busy( AST ) )
|
||||||
|
{
|
||||||
|
/* Nothing to do here, just waiting. */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Override the default definition of vPortSuppressTicksAndSleep() that is weakly
|
||||||
|
defined in the FreeRTOS Cortex-M3 port layer layer with a version that manages
|
||||||
|
the asynchronous timer (AST), as the tick is generated from the low power AST
|
||||||
|
and not the SysTick as would normally be the case on a Cortex-M. */
|
||||||
|
void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
|
||||||
|
{
|
||||||
|
uint32_t ulAlarmValue, ulCompleteTickPeriods;
|
||||||
|
eSleepModeStatus eSleepAction;
|
||||||
|
portTickType xModifiableIdleTime;
|
||||||
|
|
||||||
|
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
|
||||||
|
|
||||||
|
/* Make sure the AST reload value does not overflow the counter. */
|
||||||
|
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
|
||||||
|
{
|
||||||
|
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Calculate the reload value required to wait xExpectedIdleTime tick
|
||||||
|
periods. -1 is used because this code will execute part way through one of
|
||||||
|
the tick periods, and the fraction of a tick period is accounted for
|
||||||
|
later. */
|
||||||
|
ulAlarmValue = ( ulAlarmValueForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||||
|
if( ulAlarmValue > ulStoppedTimerCompensation )
|
||||||
|
{
|
||||||
|
/* Compensate for the fact that the AST is going to be stopped
|
||||||
|
momentarily. */
|
||||||
|
ulAlarmValue -= ulStoppedTimerCompensation;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Stop the AST momentarily. The time the AST is stopped for is accounted
|
||||||
|
for as best it can be, but using the tickless mode will inevitably result in
|
||||||
|
some tiny drift of the time maintained by the kernel with respect to
|
||||||
|
calendar time. */
|
||||||
|
prvDisableAST();
|
||||||
|
|
||||||
|
/* Enter a critical section but don't use the taskENTER_CRITICAL() method as
|
||||||
|
that will mask interrupts that should exit sleep mode. */
|
||||||
|
__asm volatile( "cpsid i \n\t"
|
||||||
|
"dsb \n\t" );
|
||||||
|
|
||||||
|
/* The tick flag is set to false before sleeping. If it is true when sleep
|
||||||
|
mode is exited then sleep mode was probably exited because the tick was
|
||||||
|
suppressed for the entire xExpectedIdleTime period. */
|
||||||
|
ulTickFlag = pdFALSE;
|
||||||
|
|
||||||
|
/* If a context switch is pending then abandon the low power entry as
|
||||||
|
the context switch might have been pended by an external interrupt that
|
||||||
|
requires processing. */
|
||||||
|
eSleepAction = eTaskConfirmSleepModeStatus();
|
||||||
|
if( eSleepAction == eAbortSleep )
|
||||||
|
{
|
||||||
|
/* Restart tick. */
|
||||||
|
prvEnableAST();
|
||||||
|
|
||||||
|
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||||
|
above. */
|
||||||
|
__asm volatile( "cpsie i" );
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Adjust the alarm value to take into account that the current time
|
||||||
|
slice is already partially complete. */
|
||||||
|
ulAlarmValue -= ast_read_counter_value( AST );
|
||||||
|
ast_write_alarm0_value( AST, ulAlarmValue );
|
||||||
|
|
||||||
|
/* Restart the AST. */
|
||||||
|
prvEnableAST();
|
||||||
|
|
||||||
|
/* Allow the application to define some pre-sleep processing. */
|
||||||
|
xModifiableIdleTime = xExpectedIdleTime;
|
||||||
|
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||||
|
|
||||||
|
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
|
||||||
|
means the application defined code has already executed the WAIT
|
||||||
|
instruction. */
|
||||||
|
if( xModifiableIdleTime > 0 )
|
||||||
|
{
|
||||||
|
/* Sleep until something happens. */
|
||||||
|
sleepmgr_enter_sleep();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Allow the application to define some post sleep processing. */
|
||||||
|
configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||||
|
|
||||||
|
/* Stop AST. Again, the time the SysTick is stopped for is accounted
|
||||||
|
for as best it can be, but using the tickless mode will inevitably
|
||||||
|
result in some tiny drift of the time maintained by the kernel with
|
||||||
|
respect to calendar time. */
|
||||||
|
prvDisableAST();
|
||||||
|
|
||||||
|
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||||
|
above. */
|
||||||
|
#warning The sleep manager will have re-enabled interrupts already, does this matter?
|
||||||
|
__asm volatile( "cpsie i" );
|
||||||
|
|
||||||
|
if( ulTickFlag != pdFALSE )
|
||||||
|
{
|
||||||
|
/* The tick interrupt has already executed, although because this
|
||||||
|
function is called with the scheduler suspended the actual tick
|
||||||
|
processing will not occur until after this function has exited.
|
||||||
|
Reset the alarm value with whatever remains of this tick period. */
|
||||||
|
ulAlarmValue = ulAlarmValueForOneTick - ast_read_counter_value( AST );
|
||||||
|
ast_write_alarm0_value( AST, ulAlarmValue );
|
||||||
|
|
||||||
|
/* The tick interrupt handler will already have pended the tick
|
||||||
|
processing in the kernel. As the pending tick will be processed as
|
||||||
|
soon as this function exits, the tick value maintained by the tick
|
||||||
|
is stepped forward by one less than the time spent sleeping. The
|
||||||
|
actual stepping of the tick appears later in this function. */
|
||||||
|
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Something other than the tick interrupt ended the sleep. How
|
||||||
|
many complete tick periods passed while the processor was
|
||||||
|
sleeping? */
|
||||||
|
ulCompleteTickPeriods = ast_read_counter_value( AST ) / ulAlarmValueForOneTick;
|
||||||
|
|
||||||
|
/* The alarm value is set to whatever fraction of a single tick
|
||||||
|
period remains. */
|
||||||
|
ulAlarmValue = ast_read_counter_value( AST ) - ( ulCompleteTickPeriods * ulAlarmValueForOneTick );
|
||||||
|
ast_write_alarm0_value( AST, ulAlarmValue );
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Restart the AST so it runs up to the alarm value. The alarm value
|
||||||
|
will get set to the value required to generate exactly one tick period
|
||||||
|
the next time the AST interrupt executes. */
|
||||||
|
prvEnableAST();
|
||||||
|
|
||||||
|
/* Wind the tick forward by the number of tick periods that the CPU
|
||||||
|
remained in a low power state. */
|
||||||
|
vTaskStepTick( ulCompleteTickPeriods );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* configCREATE_LOW_POWER_DEMO == 1 */
|
||||||
|
|
||||||
92
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf.h
Normal file
92
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf.h
Normal file
|
|
@ -0,0 +1,92 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Autogenerated API include file for the Atmel Software Framework (ASF)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef ASF_H
|
||||||
|
#define ASF_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This file includes all API header files for the selected drivers from ASF.
|
||||||
|
* Note: There might be duplicate includes required by more than one driver.
|
||||||
|
*
|
||||||
|
* The file is automatically generated and will be re-written when
|
||||||
|
* running the ASF driver selector tool. Any changes will be discarded.
|
||||||
|
*/
|
||||||
|
|
||||||
|
// From module: AST - Asynchronous Timer
|
||||||
|
#include <ast.h>
|
||||||
|
|
||||||
|
// From module: Common SAM compiler driver
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <status_codes.h>
|
||||||
|
|
||||||
|
// From module: FLASHCALW Controller Software Driver
|
||||||
|
#include <flashcalw.h>
|
||||||
|
|
||||||
|
// From module: Generic board support
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
// From module: IOPORT - General purpose I/O service
|
||||||
|
#include <ioport.h>
|
||||||
|
|
||||||
|
// From module: Interrupt management - SAM3 implementation
|
||||||
|
#include <interrupt.h>
|
||||||
|
|
||||||
|
// From module: Part identification macros
|
||||||
|
#include <parts.h>
|
||||||
|
|
||||||
|
// From module: Power Management
|
||||||
|
#include <bpm.h>
|
||||||
|
#include <sleep.h>
|
||||||
|
|
||||||
|
// From module: SAM4L startup code
|
||||||
|
#include <exceptions.h>
|
||||||
|
#include <system_sam4l.h>
|
||||||
|
|
||||||
|
// From module: Sleep manager - SAM4L implementation
|
||||||
|
#include <sam4l/sleepmgr.h>
|
||||||
|
#include <sleepmgr.h>
|
||||||
|
|
||||||
|
// From module: System Clock Control - SAM4L implementation
|
||||||
|
#include <sysclk.h>
|
||||||
|
|
||||||
|
#endif // ASF_H
|
||||||
|
|
@ -0,0 +1,328 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Standard board header file.
|
||||||
|
*
|
||||||
|
* This file includes the appropriate board header file according to the
|
||||||
|
* defined board (parameter BOARD).
|
||||||
|
*
|
||||||
|
* Copyright (c) 2009-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _BOARD_H_
|
||||||
|
#define _BOARD_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_common_boards Generic board support
|
||||||
|
*
|
||||||
|
* The generic board support module includes board-specific definitions
|
||||||
|
* and function prototypes, such as the board initialization function.
|
||||||
|
*
|
||||||
|
* \{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name Base Boards
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
|
||||||
|
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
|
||||||
|
#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board.
|
||||||
|
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
|
||||||
|
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
|
||||||
|
#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board.
|
||||||
|
#define UC3L_EK 7 //!< AT32UC3L-EK board.
|
||||||
|
#define XPLAIN 8 //!< ATxmega128A1 Xplain board.
|
||||||
|
#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board.
|
||||||
|
#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board.
|
||||||
|
#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board.
|
||||||
|
#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board.
|
||||||
|
#define STK600_RCUC3D 16 //!< STK600 RCUC3D board.
|
||||||
|
#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board.
|
||||||
|
#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board.
|
||||||
|
#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board.
|
||||||
|
#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board
|
||||||
|
#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board
|
||||||
|
#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board
|
||||||
|
#define STK600_RC044X 24 //!< STK600 with RC044X routing card board.
|
||||||
|
#define STK600_RCUC3B0 25 //!< STK600 RCUC3B0 board.
|
||||||
|
#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board.
|
||||||
|
#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board.
|
||||||
|
#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board.
|
||||||
|
#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board.
|
||||||
|
#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards
|
||||||
|
#define RZ600 31 //!< AT32UC3A RZ600 MCU board
|
||||||
|
#define SAM3S_EK 32 //!< SAM3S-EK board.
|
||||||
|
#define SAM3U_EK 33 //!< SAM3U-EK board.
|
||||||
|
#define SAM3X_EK 34 //!< SAM3X-EK board.
|
||||||
|
#define SAM3N_EK 35 //!< SAM3N-EK board.
|
||||||
|
#define SAM3S_EK2 36 //!< SAM3S-EK2 board.
|
||||||
|
#define SAM4S_EK 37 //!< SAM4S-EK board.
|
||||||
|
#define STK600_RCUC3A0 38 //!< STK600 RCUC3A0 board.
|
||||||
|
#define STK600_MEGA 39 //!< STK600 MEGA board.
|
||||||
|
#define MEGA_1284P_XPLAINED 40 //!< ATmega1284P Xplained board.
|
||||||
|
#define SAM4S_XPLAINED 41 //!< SAM4S Xplained board.
|
||||||
|
#define ATXMEGA128A1_QT600 42 //!< QT600 ATXMEGA128A1 MCU board.
|
||||||
|
#define ARDUINO_DUE_X 43 //!< Arduino Due/X board.
|
||||||
|
#define STK600_RCUC3L3 44 //!< ATUCL3 STK600 board
|
||||||
|
#define SAM4L_EK 45 //!< SAM4L-EK board.
|
||||||
|
#define STK600_MEGA_RF 46 //!< STK600 MEGA RF EVK board.
|
||||||
|
#define XMEGA_C3_XPLAINED 47 //!< ATxmega384C3 Xplained board.
|
||||||
|
#define STK600_RC032X 48 //!< STK600 with RC032X routing card board.
|
||||||
|
#define SAM4S_EK2 49 //!< SAM4S-EK2 board.
|
||||||
|
#define XMEGA_E5_XPLAINED 50 //!< ATxmega32E5 Xplained board.
|
||||||
|
#define SAM4E_EK 51 //!< SAM4E-EK board.
|
||||||
|
#define ATMEGA256RFR2_XPLAINED_PRO 52 //!< ATmega256RFR2 Xplained Pro board.
|
||||||
|
#define SAM4S_XPLAINED_PRO 53 //!< SAM4S Xplained Pro board.
|
||||||
|
#define SAM4L_XPLAINED_PRO 54 //!< SAM4L Xplained Pro board.
|
||||||
|
#define ATMEGA256RFR2_ZIGBIT 55 //!< ATmega256RFR2 zigbit
|
||||||
|
#define XMEGA_RF233_ZIGBIT 56 //!< ATxmega256A3U with AT86RF233 zigbit
|
||||||
|
#define XMEGA_RF212B_ZIGBIT 57 //!< ATxmega256A3U with AT86RF212B zigbit
|
||||||
|
#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices
|
||||||
|
#define AVR_SIMULATOR_UC3 98 //!< AVR SIMULATOR for AVR UC3 device family.
|
||||||
|
#define USER_BOARD 99 //!< User-reserved board (if any).
|
||||||
|
#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader)
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name Extension Boards
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define EXT1102 1 //!< AT32UC3B EXT1102 board
|
||||||
|
#define MC300 2 //!< AT32UC3 MC300 board
|
||||||
|
#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1
|
||||||
|
#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2
|
||||||
|
#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board
|
||||||
|
#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board
|
||||||
|
#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A"
|
||||||
|
#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600
|
||||||
|
#define RZ600_AT86RF230B 9 //!< AT86RF230B RF board in RZ600
|
||||||
|
#define RZ600_AT86RF212 10 //!< AT86RF212 RF board in RZ600
|
||||||
|
#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard
|
||||||
|
#define SECURITY_XPLAINED 12 //!< Xplained ATSHA204 board
|
||||||
|
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#if BOARD == EVK1100
|
||||||
|
# include "evk1100/evk1100.h"
|
||||||
|
#elif BOARD == EVK1101
|
||||||
|
# include "evk1101/evk1101.h"
|
||||||
|
#elif BOARD == UC3C_EK
|
||||||
|
# include "uc3c_ek/uc3c_ek.h"
|
||||||
|
#elif BOARD == EVK1104
|
||||||
|
# include "evk1104/evk1104.h"
|
||||||
|
#elif BOARD == EVK1105
|
||||||
|
# include "evk1105/evk1105.h"
|
||||||
|
#elif BOARD == STK600_RCUC3L0
|
||||||
|
# include "stk600/rcuc3l0/stk600_rcuc3l0.h"
|
||||||
|
#elif BOARD == UC3L_EK
|
||||||
|
# include "uc3l_ek/uc3l_ek.h"
|
||||||
|
#elif BOARD == STK600_RCUC3L4
|
||||||
|
# include "stk600/rcuc3l4/stk600_rcuc3l4.h"
|
||||||
|
#elif BOARD == XPLAIN
|
||||||
|
# include "xplain/xplain.h"
|
||||||
|
#elif BOARD == STK600_MEGA
|
||||||
|
/*No header-file to include*/
|
||||||
|
#elif BOARD == STK600_MEGA_RF
|
||||||
|
# include "stk600.h"
|
||||||
|
#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO
|
||||||
|
# include "atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h"
|
||||||
|
#elif BOARD == ATMEGA256RFR2_ZIGBIT
|
||||||
|
# include "atmega256rfr2_zigbit/atmega256rfr2_zigbit.h"
|
||||||
|
#elif BOARD == STK600_RC032X
|
||||||
|
# include "stk600/rc032x/stk600_rc032x.h"
|
||||||
|
#elif BOARD == STK600_RC044X
|
||||||
|
# include "stk600/rc044x/stk600_rc044x.h"
|
||||||
|
#elif BOARD == STK600_RC064X
|
||||||
|
# include "stk600/rc064x/stk600_rc064x.h"
|
||||||
|
#elif BOARD == STK600_RC100X
|
||||||
|
# include "stk600/rc100x/stk600_rc100x.h"
|
||||||
|
#elif BOARD == UC3_A3_XPLAINED
|
||||||
|
# include "uc3_a3_xplained/uc3_a3_xplained.h"
|
||||||
|
#elif BOARD == UC3_L0_XPLAINED
|
||||||
|
# include "uc3_l0_xplained/uc3_l0_xplained.h"
|
||||||
|
#elif BOARD == STK600_RCUC3B0
|
||||||
|
# include "stk600/rcuc3b0/stk600_rcuc3b0.h"
|
||||||
|
#elif BOARD == STK600_RCUC3D
|
||||||
|
# include "stk600/rcuc3d/stk600_rcuc3d.h"
|
||||||
|
#elif BOARD == STK600_RCUC3C0
|
||||||
|
# include "stk600/rcuc3c0/stk600_rcuc3c0.h"
|
||||||
|
#elif BOARD == XMEGA_B1_XPLAINED
|
||||||
|
# include "xmega_b1_xplained/xmega_b1_xplained.h"
|
||||||
|
#elif BOARD == STK600_RC064X_LCDX
|
||||||
|
# include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h"
|
||||||
|
#elif BOARD == STK600_RC100X_LCDX
|
||||||
|
# include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h"
|
||||||
|
#elif BOARD == XMEGA_A1_XPLAINED
|
||||||
|
# include "xmega_a1_xplained/xmega_a1_xplained.h"
|
||||||
|
#elif BOARD == UC3_L0_XPLAINED_BC
|
||||||
|
# include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h"
|
||||||
|
#elif BOARD == SAM3S_EK
|
||||||
|
# include "sam3s_ek/sam3s_ek.h"
|
||||||
|
# include "system_sam3s.h"
|
||||||
|
#elif BOARD == SAM3S_EK2
|
||||||
|
# include "sam3s_ek2/sam3s_ek2.h"
|
||||||
|
# include "system_sam3sd8.h"
|
||||||
|
#elif BOARD == SAM3U_EK
|
||||||
|
# include "sam3u_ek/sam3u_ek.h"
|
||||||
|
# include "system_sam3u.h"
|
||||||
|
#elif BOARD == SAM3X_EK
|
||||||
|
# include "sam3x_ek/sam3x_ek.h"
|
||||||
|
# include "system_sam3x.h"
|
||||||
|
#elif BOARD == SAM3N_EK
|
||||||
|
# include "sam3n_ek/sam3n_ek.h"
|
||||||
|
# include "system_sam3n.h"
|
||||||
|
#elif BOARD == SAM4S_EK
|
||||||
|
# include "sam4s_ek/sam4s_ek.h"
|
||||||
|
# include "system_sam4s.h"
|
||||||
|
#elif BOARD == SAM4S_XPLAINED
|
||||||
|
# include "sam4s_xplained/sam4s_xplained.h"
|
||||||
|
# include "system_sam4s.h"
|
||||||
|
#elif BOARD == SAM4S_EK2
|
||||||
|
# include "sam4s_ek2/sam4s_ek2.h"
|
||||||
|
# include "system_sam4s.h"
|
||||||
|
#elif BOARD == MEGA_1284P_XPLAINED
|
||||||
|
/*No header-file to include*/
|
||||||
|
#elif BOARD == ARDUINO_DUE_X
|
||||||
|
# include "arduino_due_x/arduino_due_x.h"
|
||||||
|
# include "system_sam3x.h"
|
||||||
|
#elif BOARD == SAM4L_EK
|
||||||
|
# include "sam4l_ek/sam4l_ek.h"
|
||||||
|
#elif BOARD == SAM4E_EK
|
||||||
|
# include "sam4e_ek/sam4e_ek.h"
|
||||||
|
#elif BOARD == MEGA1284P_XPLAINED_BC
|
||||||
|
# include "mega1284p_xplained_bc/mega1284p_xplained_bc.h"
|
||||||
|
#elif BOARD == UC3_L0_QT600
|
||||||
|
# include "uc3_l0_qt600/uc3_l0_qt600.h"
|
||||||
|
#elif BOARD == XMEGA_A3BU_XPLAINED
|
||||||
|
# include "xmega_a3bu_xplained/xmega_a3bu_xplained.h"
|
||||||
|
#elif BOARD == XMEGA_E5_XPLAINED
|
||||||
|
# include "xmega_e5_xplained/xmega_e5_xplained.h"
|
||||||
|
#elif BOARD == UC3B_BOARD_CONTROLLER
|
||||||
|
# include "uc3b_board_controller/uc3b_board_controller.h"
|
||||||
|
#elif BOARD == RZ600
|
||||||
|
# include "rz600/rz600.h"
|
||||||
|
#elif BOARD == STK600_RCUC3A0
|
||||||
|
# include "stk600/rcuc3a0/stk600_rcuc3a0.h"
|
||||||
|
#elif BOARD == ATXMEGA128A1_QT600
|
||||||
|
# include "atxmega128a1_qt600/atxmega128a1_qt600.h"
|
||||||
|
#elif BOARD == STK600_RCUC3L3
|
||||||
|
# include "stk600/rcuc3l3/stk600_rcuc3l3.h"
|
||||||
|
#elif BOARD == SAM4S_XPLAINED_PRO
|
||||||
|
# include "sam4s_xplained_pro/sam4s_xplained_pro.h"
|
||||||
|
#elif BOARD == SAM4L_XPLAINED_PRO
|
||||||
|
# include "sam4l_xplained_pro/sam4l_xplained_pro.h"
|
||||||
|
#elif BOARD == SIMULATOR_XMEGA_A1
|
||||||
|
# include "simulator/xmega_a1/simulator_xmega_a1.h"
|
||||||
|
#elif BOARD == XMEGA_C3_XPLAINED
|
||||||
|
# include "xmega_c3_xplained/xmega_c3_xplained.h"
|
||||||
|
#elif BOARD == XMEGA_RF233_ZIGBIT
|
||||||
|
# include "xmega_rf233_zigbit/xmega_rf233_zigbit.h"
|
||||||
|
#elif BOARD == XMEGA_RF212B_ZIGBIT
|
||||||
|
# include "xmega_rf212b_zigbit/xmega_rf212b_zigbit.h"
|
||||||
|
#elif BOARD == AVR_SIMULATOR_UC3
|
||||||
|
# include "avr_simulator_uc3/avr_simulator_uc3.h"
|
||||||
|
#elif BOARD == USER_BOARD
|
||||||
|
// User-reserved area: #include the header file of your board here (if any).
|
||||||
|
# include "user_board.h"
|
||||||
|
#elif BOARD == DUMMY_BOARD
|
||||||
|
# include "dummy/dummy_board.h"
|
||||||
|
#else
|
||||||
|
# error No known Atmel board defined
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (defined EXT_BOARD)
|
||||||
|
# if EXT_BOARD == MC300
|
||||||
|
# include "mc300/mc300.h"
|
||||||
|
# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \
|
||||||
|
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \
|
||||||
|
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \
|
||||||
|
(EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \
|
||||||
|
(EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \
|
||||||
|
(EXT_BOARD == SENSORS_XPLAINED_BREADBOARD)
|
||||||
|
# include "sensors_xplained/sensors_xplained.h"
|
||||||
|
# elif EXT_BOARD == RZ600_AT86RF231
|
||||||
|
# include "at86rf231/at86rf231.h"
|
||||||
|
# elif EXT_BOARD == RZ600_AT86RF230B
|
||||||
|
# include "at86rf230b/at86rf230b.h"
|
||||||
|
# elif EXT_BOARD == RZ600_AT86RF212
|
||||||
|
# include "at86rf212/at86rf212.h"
|
||||||
|
# elif EXT_BOARD == SECURITY_XPLAINED
|
||||||
|
# include "security_xplained.h"
|
||||||
|
# elif EXT_BOARD == USER_EXT_BOARD
|
||||||
|
// User-reserved area: #include the header file of your extension board here
|
||||||
|
// (if any).
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__))
|
||||||
|
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
|
||||||
|
|
||||||
|
/*! \brief This function initializes the board target resources
|
||||||
|
*
|
||||||
|
* This function should be called to ensure proper initialization of the target
|
||||||
|
* board hardware connected to the part.
|
||||||
|
*/
|
||||||
|
extern void board_init(void);
|
||||||
|
|
||||||
|
#endif // #ifdef __AVR32_ABI_COMPILER__
|
||||||
|
#else
|
||||||
|
/*! \brief This function initializes the board target resources
|
||||||
|
*
|
||||||
|
* This function should be called to ensure proper initialization of the target
|
||||||
|
* board hardware connected to the part.
|
||||||
|
*/
|
||||||
|
extern void board_init(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif // _BOARD_H_
|
||||||
|
|
@ -0,0 +1,399 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief DFLL management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CLK_DFLL_H_INCLUDED
|
||||||
|
#define CLK_DFLL_H_INCLUDED
|
||||||
|
|
||||||
|
#include <parts.h>
|
||||||
|
#include "conf_clock.h"
|
||||||
|
|
||||||
|
#if UC3L
|
||||||
|
# include "uc3l/dfll.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/dfll.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported chip type
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup clk_group
|
||||||
|
* \defgroup dfll_group DFLL Management
|
||||||
|
*
|
||||||
|
* A Digital Frequency Locked Loop can be used to generate a highly
|
||||||
|
* accurate frequency from a slower-running reference clock, in much the
|
||||||
|
* same way as a PLL. DFLLs typically have shorter startup times and
|
||||||
|
* less jitter. They can also be used in open-loop mode to generate a
|
||||||
|
* less accurate frequency without the use of a reference clock.
|
||||||
|
*
|
||||||
|
* There may be significant variations between platforms in the support
|
||||||
|
* for certain features.
|
||||||
|
*
|
||||||
|
* \par Example: Setting up DFLL0 with default parameters and dithering enabled
|
||||||
|
*
|
||||||
|
* The following example shows how to configure and enable DFLL0 in
|
||||||
|
* closed-loop mode using the default parameters specified through
|
||||||
|
* configuration symbols.
|
||||||
|
* \code
|
||||||
|
dfll_enable_config_defaults(0); \endcode
|
||||||
|
*
|
||||||
|
* To configure and enable DFLL0 in closed-loop mode using the default
|
||||||
|
* parameters and to enable specific feature like dithering for better accuracy,
|
||||||
|
* you can use this initialization process.
|
||||||
|
* \code
|
||||||
|
struct dfll_config dfllcfg;
|
||||||
|
|
||||||
|
dfll_enable_source(CONFIG_DFLL0_SOURCE);
|
||||||
|
dfll_config_defaults(&dfllcfg, 0);
|
||||||
|
dfll_config_enable_dithering(&dfllcfg);
|
||||||
|
dfll_enable(&dfllcfg, 0);
|
||||||
|
dfll_wait_for_accurate_lock(0); \endcode
|
||||||
|
*
|
||||||
|
* When the last function call returns, DFLL0 is running at a frequency
|
||||||
|
* which matches the default configuration as accurately as possible.
|
||||||
|
* Any additional alterations to the default configuration can be added
|
||||||
|
* at the same place as the call to dfll_config_enable_dithering(), but
|
||||||
|
* note that the DFLL will never achieve "accurate" lock if dithering is
|
||||||
|
* disabled.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Chip-specific DFLL characteristics
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \def NR_DFLLS
|
||||||
|
* \brief Number of on-chip DFLLs.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def DFLL_MIN_HZ
|
||||||
|
* \brief Minimum frequency that the DFLL can generate.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def DFLL_MAX_HZ
|
||||||
|
* \brief Maximum frequency that the DFLL can generate.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \typedef dfll_refclk_t
|
||||||
|
* \brief Type used for identifying a reference clock source for the DFLL.
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name DFLL Configuration
|
||||||
|
//@{
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \struct dfll_config
|
||||||
|
* \brief Hardware-specific representation of DFLL configuration.
|
||||||
|
*
|
||||||
|
* This structure contains one or more device-specific values
|
||||||
|
* representing the current DFLL configuration. The contents of this
|
||||||
|
* structure is typically different from platform to platform, and the
|
||||||
|
* user should not access any fields except through the DFLL
|
||||||
|
* configuration API.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_init_open_loop_mode(struct dfll_config *cfg)
|
||||||
|
* \brief Configure the DFLL configuration \a cfg for open-loop mode.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be initialized.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_init_closed_loop_mode(struct dfll_config *cfg,
|
||||||
|
* dfll_refclk_t refclk, uint16_t div, uint16_t mul)
|
||||||
|
* \brief Configure the DFLL configuration \a cfg for closed-loop mode.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be initialized.
|
||||||
|
* \param refclk The reference clock source.
|
||||||
|
* \param div Reference clock divider.
|
||||||
|
* \param mul Multiplier (integer part only).
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def dfll_config_defaults(cfg, dfll_id)
|
||||||
|
* \brief Initialize DFLL configuration using default parameters.
|
||||||
|
*
|
||||||
|
* After this function returns, \a cfg will contain a configuration
|
||||||
|
* which will make the DFLL run at (CONFIG_DFLLx_MUL / CONFIG_DFLLx_DIV)
|
||||||
|
* times the frequency of CONFIG_DFLLx_SOURCE. The default configuration
|
||||||
|
* will always use closed-loop mode with no fractional multiplier.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be initialized.
|
||||||
|
* \param dfll_id Use defaults for this DFLL.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def dfll_get_default_rate(dfll_id)
|
||||||
|
* \brief Return the default rate in Hz of \a dfll_id.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_set_fractional_multiplier(struct dfll_config *cfg,
|
||||||
|
* uint16_t mul_i, uint16_t mul_f)
|
||||||
|
* \brief Set a fractional multiplier.
|
||||||
|
*
|
||||||
|
* This function has no effect in open-loop mode, and is only available
|
||||||
|
* on devices which support fractional multipliers.
|
||||||
|
*
|
||||||
|
* The fractional part of the multiplier is assumed to be 16 bits. The
|
||||||
|
* low-level driver will make sure to shift this value to match the
|
||||||
|
* hardware if necessary.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
* \param mul_i Integer part of multiplier.
|
||||||
|
* \param mul_f Fractional part of multiplier.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_enable_dithering(struct dfll_config *cfg)
|
||||||
|
* \brief Enable dithering for more accurate frequency generation.
|
||||||
|
*
|
||||||
|
* The fine LSB input to the VCO is dithered to achieve fractional
|
||||||
|
* approximation to the correct multiplication ratio.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_disable_dithering(struct dfll_config *cfg)
|
||||||
|
* \brief Disable dithering.
|
||||||
|
*
|
||||||
|
* \see dfll_config_enable_dithering()
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_set_initial_tuning(struct dfll_config *cfg,
|
||||||
|
* uint16_t coarse, uint16_t fine)
|
||||||
|
* \brief Set initial VCO tuning.
|
||||||
|
*
|
||||||
|
* In open loop mode, this will determine the frequency of the output.
|
||||||
|
*
|
||||||
|
* In closed loop mode, this will provide an initial estimate of the VCO
|
||||||
|
* tuning. While the DFLL will automatically adjust these values to
|
||||||
|
* match the desired output frequency, careful selection of initial
|
||||||
|
* values might reduce the time to achieve coarse and fine lock.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
* \param coarse Coarse tuning of the frequency generator.
|
||||||
|
* \param fine Fine tuning of the frequency generator.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_set_max_step(struct dfll_config *cfg,
|
||||||
|
* uint16_t coarse, uint16_t fine)
|
||||||
|
* \brief Set the maximum VCO tuning step size.
|
||||||
|
*
|
||||||
|
* This function has no effect in open-loop mode.
|
||||||
|
*
|
||||||
|
* By default, both of these values are set to 50% of their respective
|
||||||
|
* maximums. It is not recommended to set the values any higher than
|
||||||
|
* this, but setting them lower might reduce the frequency overshoot at
|
||||||
|
* the expense of longer time to achieve coarse and/or fine lock.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified
|
||||||
|
* \param coarse The maximum step size of the coarse VCO tuning.
|
||||||
|
* \param fine The maximum step size of the fine VCO tuning.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_enable_ssg(struct dfll_config *cfg,
|
||||||
|
* uint16_t amplitude, uint16_t step_size)
|
||||||
|
* \brief Enable Spread Spectrum Generator.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
* \param amplitude The amplitude of the spread spectrum.
|
||||||
|
* \param step_size The step size of the spread spectrum.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_config_disable_ssg(struct dfll_config *cfg)
|
||||||
|
* \brief Disable Spread Spectrum Generator.
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be modified.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Interaction with the DFLL hardware
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \fn void dfll_enable_open_loop(const struct dfll_config *cfg,
|
||||||
|
* unsigned int dfll_id)
|
||||||
|
* \brief Activate the configuration \a cfg and enable DFLL \a dfll_id
|
||||||
|
* in open-loop mode.
|
||||||
|
*
|
||||||
|
* \pre The configuration in \a cfg must represent an open-loop
|
||||||
|
* configuration.
|
||||||
|
*
|
||||||
|
* \param cfg The configuration to be activated.
|
||||||
|
* \param dfll_id The ID of the DFLL to be enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_enable_closed_loop(const struct dfll_config *cfg,
|
||||||
|
* unsigned int dfll_id)
|
||||||
|
* \brief Activate the configuration \a cfg and enable DFLL \a dfll_id
|
||||||
|
* in closed-loop mode.
|
||||||
|
*
|
||||||
|
* \pre The configuration in \a cfg must represent a closed-loop
|
||||||
|
* configuration.
|
||||||
|
*
|
||||||
|
* \param cfg The configuration to be activated.
|
||||||
|
* \param dfll_id The ID of the DFLL to be enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_disable_open_loop(unsigned int dfll_id)
|
||||||
|
* \brief Disable the DFLL identified by \a dfll_id.
|
||||||
|
*
|
||||||
|
* \pre The DFLL must have been enabled in open loop mode.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to be disabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_disable_closed_loop(unsigned int dfll_id)
|
||||||
|
* \brief Disable the DFLL identified by \a dfll_id.
|
||||||
|
*
|
||||||
|
* \pre The DFLL must have been enabled in closed loop mode.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to be disabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn bool dfll_is_coarse_locked(unsigned int dfll_id)
|
||||||
|
* \brief Determine whether or not a DFLL has achieved coarse lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to check.
|
||||||
|
*
|
||||||
|
* \retval true The DFLL has determined the final value of the coarse
|
||||||
|
* VCO tuning value.
|
||||||
|
* \retval false The DFLL has not yet determined the coarse VCO tuning
|
||||||
|
* value, or has not been enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn bool dfll_is_fine_locked(unsigned int dfll_id)
|
||||||
|
* \brief Determine whether or not a DFLL has achieved fine lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to check.
|
||||||
|
*
|
||||||
|
* \retval true The DFLL has determined the final value of the fine VCO
|
||||||
|
* tuning value.
|
||||||
|
* \retval false The DFLL has not yet determined the fine VCO tuning
|
||||||
|
* value, or has not been enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn bool dfll_is_accurate_locked(unsigned int dfll_id)
|
||||||
|
* \brief Determine whether or not a DFLL has achieved accurate lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to check.
|
||||||
|
*
|
||||||
|
* \retval true The DFLL has determined the final dithering duty cycle.
|
||||||
|
* \retval false The DFLL has not yet determined the dithering duty
|
||||||
|
* cycle, or has not been enabled with dithering enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_enable_source(enum dfll_refclk_t src)
|
||||||
|
* \brief Enable the source of the dfll.
|
||||||
|
* The source is enabled, if the source is not already running.
|
||||||
|
*
|
||||||
|
* \param dfll_source src The ID of the DFLL source to enable.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void dfll_enable_config_defaults(unsigned int dfll_id)
|
||||||
|
* \brief Enable the dfll with the default configuration.
|
||||||
|
* DFLL is enabled, if the DFLL is not already locked.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to enable.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Wait for the DFLL identified by \a dfll_id to achieve coarse
|
||||||
|
* lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to wait for.
|
||||||
|
*
|
||||||
|
* \retval STATUS_OK The DFLL has achieved coarse lock.
|
||||||
|
* \retval ERR_TIMEOUT Timed out waiting for lock.
|
||||||
|
*/
|
||||||
|
static inline int dfll_wait_for_coarse_lock(unsigned int dfll_id)
|
||||||
|
{
|
||||||
|
/* TODO: Add timeout mechanism */
|
||||||
|
while (!dfll_is_coarse_locked(dfll_id)) {
|
||||||
|
/* Do nothing */
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Wait for the DFLL identified by \a dfll_id to achieve fine
|
||||||
|
* lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to wait for.
|
||||||
|
*
|
||||||
|
* \retval STATUS_OK The DFLL has achieved fine lock.
|
||||||
|
* \retval ERR_TIMEOUT Timed out waiting for lock.
|
||||||
|
*/
|
||||||
|
static inline int dfll_wait_for_fine_lock(unsigned int dfll_id)
|
||||||
|
{
|
||||||
|
/* TODO: Add timeout mechanism */
|
||||||
|
while (!dfll_is_fine_locked(dfll_id)) {
|
||||||
|
/* Do nothing */
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Wait for the DFLL identified by \a dfll_id to achieve accurate
|
||||||
|
* lock.
|
||||||
|
*
|
||||||
|
* \param dfll_id The ID of the DFLL to wait for.
|
||||||
|
*
|
||||||
|
* \retval STATUS_OK The DFLL has achieved accurate lock.
|
||||||
|
* \retval ERR_TIMEOUT Timed out waiting for lock.
|
||||||
|
*/
|
||||||
|
static inline int dfll_wait_for_accurate_lock(unsigned int dfll_id)
|
||||||
|
{
|
||||||
|
/* TODO: Add timeout mechanism */
|
||||||
|
while (!dfll_is_accurate_locked(dfll_id)) {
|
||||||
|
/* Do nothing */
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
//@}
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* CLK_DFLL_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,178 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Generic clock management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CLK_GENCLK_H_INCLUDED
|
||||||
|
#define CLK_GENCLK_H_INCLUDED
|
||||||
|
|
||||||
|
#include "parts.h"
|
||||||
|
|
||||||
|
#if SAM3S
|
||||||
|
# include "sam3s/genclk.h"
|
||||||
|
#elif SAM3U
|
||||||
|
# include "sam3u/genclk.h"
|
||||||
|
#elif SAM3N
|
||||||
|
# include "sam3n/genclk.h"
|
||||||
|
#elif SAM3XA
|
||||||
|
# include "sam3x/genclk.h"
|
||||||
|
#elif SAM4S
|
||||||
|
# include "sam4s/genclk.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/genclk.h"
|
||||||
|
#elif SAM4E
|
||||||
|
# include "sam4e/genclk.h"
|
||||||
|
#elif (UC3A0 || UC3A1)
|
||||||
|
# include "uc3a0_a1/genclk.h"
|
||||||
|
#elif UC3A3
|
||||||
|
# include "uc3a3_a4/genclk.h"
|
||||||
|
#elif UC3B
|
||||||
|
# include "uc3b0_b1/genclk.h"
|
||||||
|
#elif UC3C
|
||||||
|
# include "uc3c/genclk.h"
|
||||||
|
#elif UC3D
|
||||||
|
# include "uc3d/genclk.h"
|
||||||
|
#elif UC3L
|
||||||
|
# include "uc3l/genclk.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported chip type
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup clk_group
|
||||||
|
* \defgroup genclk_group Generic Clock Management
|
||||||
|
*
|
||||||
|
* Generic clocks are configurable clocks which run outside the system
|
||||||
|
* clock domain. They are often connected to peripherals which have an
|
||||||
|
* asynchronous component running independently of the bus clock, e.g.
|
||||||
|
* USB controllers, low-power timers and RTCs, etc.
|
||||||
|
*
|
||||||
|
* Note that not all platforms have support for generic clocks; on such
|
||||||
|
* platforms, this API will not be available.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def GENCLK_DIV_MAX
|
||||||
|
* \brief Maximum divider supported by the generic clock implementation
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \enum genclk_source
|
||||||
|
* \brief Generic clock source ID
|
||||||
|
*
|
||||||
|
* Each generic clock may be generated from a different clock source.
|
||||||
|
* These are the available alternatives provided by the chip.
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Generic clock configuration
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \struct genclk_config
|
||||||
|
* \brief Hardware representation of a set of generic clock parameters
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_config_defaults(struct genclk_config *cfg,
|
||||||
|
* unsigned int id)
|
||||||
|
* \brief Initialize \a cfg to the default configuration for the clock
|
||||||
|
* identified by \a id.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id)
|
||||||
|
* \brief Read the currently active configuration of the clock
|
||||||
|
* identified by \a id into \a cfg.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_config_write(const struct genclk_config *cfg,
|
||||||
|
* unsigned int id)
|
||||||
|
* \brief Activate the configuration \a cfg on the clock identified by
|
||||||
|
* \a id.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_config_set_source(struct genclk_config *cfg,
|
||||||
|
* enum genclk_source src)
|
||||||
|
* \brief Select a new source clock \a src in configuration \a cfg.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_config_set_divider(struct genclk_config *cfg,
|
||||||
|
* unsigned int divider)
|
||||||
|
* \brief Set a new \a divider in configuration \a cfg.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_enable_source(enum genclk_source src)
|
||||||
|
* \brief Enable the source clock \a src used by a generic clock.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Enabling and disabling Generic Clocks
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id)
|
||||||
|
* \brief Activate the configuration \a cfg on the clock identified by
|
||||||
|
* \a id and enable it.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void genclk_disable(unsigned int id)
|
||||||
|
* \brief Disable the generic clock identified by \a id.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable the configuration defined by \a src and \a divider
|
||||||
|
* for the generic clock identified by \a id.
|
||||||
|
*
|
||||||
|
* \param id The ID of the generic clock.
|
||||||
|
* \param src The source clock of the generic clock.
|
||||||
|
* \param divider The divider used to generate the generic clock.
|
||||||
|
*/
|
||||||
|
static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider)
|
||||||
|
{
|
||||||
|
struct genclk_config gcfg;
|
||||||
|
|
||||||
|
genclk_config_defaults(&gcfg, id);
|
||||||
|
genclk_enable_source(src);
|
||||||
|
genclk_config_set_source(&gcfg, src);
|
||||||
|
genclk_config_set_divider(&gcfg, divider);
|
||||||
|
genclk_enable(&gcfg, id);
|
||||||
|
}
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* CLK_GENCLK_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,164 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Oscillator management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef OSC_H_INCLUDED
|
||||||
|
#define OSC_H_INCLUDED
|
||||||
|
|
||||||
|
#include "parts.h"
|
||||||
|
#include "conf_clock.h"
|
||||||
|
|
||||||
|
#if SAM3S
|
||||||
|
# include "sam3s/osc.h"
|
||||||
|
#elif SAM3XA
|
||||||
|
# include "sam3x/osc.h"
|
||||||
|
#elif SAM3U
|
||||||
|
# include "sam3u/osc.h"
|
||||||
|
#elif SAM3N
|
||||||
|
# include "sam3n/osc.h"
|
||||||
|
#elif SAM4S
|
||||||
|
# include "sam4s/osc.h"
|
||||||
|
#elif SAM4E
|
||||||
|
# include "sam4e/osc.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/osc.h"
|
||||||
|
#elif (UC3A0 || UC3A1)
|
||||||
|
# include "uc3a0_a1/osc.h"
|
||||||
|
#elif UC3A3
|
||||||
|
# include "uc3a3_a4/osc.h"
|
||||||
|
#elif UC3B
|
||||||
|
# include "uc3b0_b1/osc.h"
|
||||||
|
#elif UC3C
|
||||||
|
# include "uc3c/osc.h"
|
||||||
|
#elif UC3D
|
||||||
|
# include "uc3d/osc.h"
|
||||||
|
#elif UC3L
|
||||||
|
# include "uc3l/osc.h"
|
||||||
|
#elif XMEGA
|
||||||
|
# include "xmega/osc.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported chip type
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup clk_group
|
||||||
|
* \defgroup osc_group Oscillator Management
|
||||||
|
*
|
||||||
|
* This group contains functions and definitions related to configuring
|
||||||
|
* and enabling/disabling on-chip oscillators. Internal RC-oscillators,
|
||||||
|
* external crystal oscillators and external clock generators are
|
||||||
|
* supported by this module. What all of these have in common is that
|
||||||
|
* they swing at a fixed, nominal frequency which is normally not
|
||||||
|
* adjustable.
|
||||||
|
*
|
||||||
|
* \par Example: Enabling an oscillator
|
||||||
|
*
|
||||||
|
* The following example demonstrates how to enable the external
|
||||||
|
* oscillator on XMEGA A and wait for it to be ready to use. The
|
||||||
|
* oscillator identifiers are platform-specific, so while the same
|
||||||
|
* procedure is used on all platforms, the parameter to osc_enable()
|
||||||
|
* will be different from device to device.
|
||||||
|
* \code
|
||||||
|
osc_enable(OSC_ID_XOSC);
|
||||||
|
osc_wait_ready(OSC_ID_XOSC); \endcode
|
||||||
|
*
|
||||||
|
* \section osc_group_board Board-specific Definitions
|
||||||
|
* If external oscillators are used, the board code must provide the
|
||||||
|
* following definitions for each of those:
|
||||||
|
* - \b BOARD_<osc name>_HZ: The nominal frequency of the oscillator.
|
||||||
|
* - \b BOARD_<osc name>_STARTUP_US: The startup time of the
|
||||||
|
* oscillator in microseconds.
|
||||||
|
* - \b BOARD_<osc name>_TYPE: The type of oscillator connected, i.e.
|
||||||
|
* whether it's a crystal or external clock, and sometimes what kind
|
||||||
|
* of crystal it is. The meaning of this value is platform-specific.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Oscillator Management
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \fn void osc_enable(uint8_t id)
|
||||||
|
* \brief Enable oscillator \a id
|
||||||
|
*
|
||||||
|
* The startup time and mode value is automatically determined based on
|
||||||
|
* definitions in the board code.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void osc_disable(uint8_t id)
|
||||||
|
* \brief Disable oscillator \a id
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn osc_is_ready(uint8_t id)
|
||||||
|
* \brief Determine whether oscillator \a id is ready.
|
||||||
|
* \retval true Oscillator \a id is running and ready to use as a clock
|
||||||
|
* source.
|
||||||
|
* \retval false Oscillator \a id is not running.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn uint32_t osc_get_rate(uint8_t id)
|
||||||
|
* \brief Return the frequency of oscillator \a id in Hz
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Wait until the oscillator identified by \a id is ready
|
||||||
|
*
|
||||||
|
* This function will busy-wait for the oscillator identified by \a id
|
||||||
|
* to become stable and ready to use as a clock source.
|
||||||
|
*
|
||||||
|
* \param id A number identifying the oscillator to wait for.
|
||||||
|
*/
|
||||||
|
static inline void osc_wait_ready(uint8_t id)
|
||||||
|
{
|
||||||
|
while (!osc_is_ready(id)) {
|
||||||
|
/* Do nothing */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* OSC_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,320 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief PLL management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CLK_PLL_H_INCLUDED
|
||||||
|
#define CLK_PLL_H_INCLUDED
|
||||||
|
|
||||||
|
#include "parts.h"
|
||||||
|
#include "conf_clock.h"
|
||||||
|
|
||||||
|
#if SAM3S
|
||||||
|
# include "sam3s/pll.h"
|
||||||
|
#elif SAM3XA
|
||||||
|
# include "sam3x/pll.h"
|
||||||
|
#elif SAM3U
|
||||||
|
# include "sam3u/pll.h"
|
||||||
|
#elif SAM3N
|
||||||
|
# include "sam3n/pll.h"
|
||||||
|
#elif SAM4S
|
||||||
|
# include "sam4s/pll.h"
|
||||||
|
#elif SAM4E
|
||||||
|
# include "sam4e/pll.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/pll.h"
|
||||||
|
#elif (UC3A0 || UC3A1)
|
||||||
|
# include "uc3a0_a1/pll.h"
|
||||||
|
#elif UC3A3
|
||||||
|
# include "uc3a3_a4/pll.h"
|
||||||
|
#elif UC3B
|
||||||
|
# include "uc3b0_b1/pll.h"
|
||||||
|
#elif UC3C
|
||||||
|
# include "uc3c/pll.h"
|
||||||
|
#elif UC3D
|
||||||
|
# include "uc3d/pll.h"
|
||||||
|
#elif (UC3L0128 || UC3L0256 || UC3L3_L4)
|
||||||
|
# include "uc3l/pll.h"
|
||||||
|
#elif XMEGA
|
||||||
|
# include "xmega/pll.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported chip type
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup clk_group
|
||||||
|
* \defgroup pll_group PLL Management
|
||||||
|
*
|
||||||
|
* This group contains functions and definitions related to configuring
|
||||||
|
* and enabling/disabling on-chip PLLs. A PLL will take an input signal
|
||||||
|
* (the \em source), optionally divide the frequency by a configurable
|
||||||
|
* \em divider, and then multiply the frequency by a configurable \em
|
||||||
|
* multiplier.
|
||||||
|
*
|
||||||
|
* Some devices don't support input dividers; specifying any other
|
||||||
|
* divisor than 1 on these devices will result in an assertion failure.
|
||||||
|
* Other devices may have various restrictions to the frequency range of
|
||||||
|
* the input and output signals.
|
||||||
|
*
|
||||||
|
* \par Example: Setting up PLL0 with default parameters
|
||||||
|
*
|
||||||
|
* The following example shows how to configure and enable PLL0 using
|
||||||
|
* the default parameters specified using the configuration symbols
|
||||||
|
* listed above.
|
||||||
|
* \code
|
||||||
|
pll_enable_config_defaults(0); \endcode
|
||||||
|
*
|
||||||
|
* To configure, enable PLL0 using the default parameters and to disable
|
||||||
|
* a specific feature like Wide Bandwidth Mode (a UC3A3-specific
|
||||||
|
* PLL option.), you can use this initialization process.
|
||||||
|
* \code
|
||||||
|
struct pll_config pllcfg;
|
||||||
|
if (pll_is_locked(pll_id)) {
|
||||||
|
return; // Pll already running
|
||||||
|
}
|
||||||
|
pll_enable_source(CONFIG_PLL0_SOURCE);
|
||||||
|
pll_config_defaults(&pllcfg, 0);
|
||||||
|
pll_config_set_option(&pllcfg, PLL_OPT_WBM_DISABLE);
|
||||||
|
pll_enable(&pllcfg, 0);
|
||||||
|
pll_wait_for_lock(0); \endcode
|
||||||
|
*
|
||||||
|
* When the last function call returns, PLL0 is ready to be used as the
|
||||||
|
* main system clock source.
|
||||||
|
*
|
||||||
|
* \section pll_group_config Configuration Symbols
|
||||||
|
*
|
||||||
|
* Each PLL has a set of default parameters determined by the following
|
||||||
|
* configuration symbols in the application's configuration file:
|
||||||
|
* - \b CONFIG_PLLn_SOURCE: The default clock source connected to the
|
||||||
|
* input of PLL \a n. Must be one of the values defined by the
|
||||||
|
* #pll_source enum.
|
||||||
|
* - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL
|
||||||
|
* \a n.
|
||||||
|
* - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n.
|
||||||
|
*
|
||||||
|
* These configuration symbols determine the result of calling
|
||||||
|
* pll_config_defaults() and pll_get_default_rate().
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Chip-specific PLL characteristics
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \def PLL_MAX_STARTUP_CYCLES
|
||||||
|
* \brief Maximum PLL startup time in number of slow clock cycles
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def NR_PLLS
|
||||||
|
* \brief Number of on-chip PLLs
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def PLL_MIN_HZ
|
||||||
|
* \brief Minimum frequency that the PLL can generate
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def PLL_MAX_HZ
|
||||||
|
* \brief Maximum frequency that the PLL can generate
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def PLL_NR_OPTIONS
|
||||||
|
* \brief Number of PLL option bits
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \enum pll_source
|
||||||
|
* \brief PLL clock source
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name PLL configuration
|
||||||
|
//@{
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \struct pll_config
|
||||||
|
* \brief Hardware-specific representation of PLL configuration.
|
||||||
|
*
|
||||||
|
* This structure contains one or more device-specific values
|
||||||
|
* representing the current PLL configuration. The contents of this
|
||||||
|
* structure is typically different from platform to platform, and the
|
||||||
|
* user should not access any fields except through the PLL
|
||||||
|
* configuration API.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn void pll_config_init(struct pll_config *cfg,
|
||||||
|
* enum pll_source src, unsigned int div, unsigned int mul)
|
||||||
|
* \brief Initialize PLL configuration from standard parameters.
|
||||||
|
*
|
||||||
|
* \note This function may be defined inline because it is assumed to be
|
||||||
|
* called very few times, and usually with constant parameters. Inlining
|
||||||
|
* it will in such cases reduce the code size significantly.
|
||||||
|
*
|
||||||
|
* \param cfg The PLL configuration to be initialized.
|
||||||
|
* \param src The oscillator to be used as input to the PLL.
|
||||||
|
* \param div PLL input divider.
|
||||||
|
* \param mul PLL loop divider (i.e. multiplier).
|
||||||
|
*
|
||||||
|
* \return A configuration which will make the PLL run at
|
||||||
|
* (\a mul / \a div) times the frequency of \a src
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def pll_config_defaults(cfg, pll_id)
|
||||||
|
* \brief Initialize PLL configuration using default parameters.
|
||||||
|
*
|
||||||
|
* After this function returns, \a cfg will contain a configuration
|
||||||
|
* which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV)
|
||||||
|
* times the frequency of CONFIG_PLLx_SOURCE.
|
||||||
|
*
|
||||||
|
* \param cfg The PLL configuration to be initialized.
|
||||||
|
* \param pll_id Use defaults for this PLL.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def pll_get_default_rate(pll_id)
|
||||||
|
* \brief Get the default rate in Hz of \a pll_id
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_config_set_option(struct pll_config *cfg,
|
||||||
|
* unsigned int option)
|
||||||
|
* \brief Set the PLL option bit \a option in the configuration \a cfg.
|
||||||
|
*
|
||||||
|
* \param cfg The PLL configuration to be changed.
|
||||||
|
* \param option The PLL option bit to be set.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_config_clear_option(struct pll_config *cfg,
|
||||||
|
* unsigned int option)
|
||||||
|
* \brief Clear the PLL option bit \a option in the configuration \a cfg.
|
||||||
|
*
|
||||||
|
* \param cfg The PLL configuration to be changed.
|
||||||
|
* \param option The PLL option bit to be cleared.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id)
|
||||||
|
* \brief Read the currently active configuration of \a pll_id.
|
||||||
|
*
|
||||||
|
* \param cfg The configuration object into which to store the currently
|
||||||
|
* active configuration.
|
||||||
|
* \param pll_id The ID of the PLL to be accessed.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_config_write(const struct pll_config *cfg,
|
||||||
|
* unsigned int pll_id)
|
||||||
|
* \brief Activate the configuration \a cfg on \a pll_id
|
||||||
|
*
|
||||||
|
* \param cfg The configuration object representing the PLL
|
||||||
|
* configuration to be activated.
|
||||||
|
* \param pll_id The ID of the PLL to be updated.
|
||||||
|
*/
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Interaction with the PLL hardware
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \fn void pll_enable(const struct pll_config *cfg,
|
||||||
|
* unsigned int pll_id)
|
||||||
|
* \brief Activate the configuration \a cfg and enable PLL \a pll_id.
|
||||||
|
*
|
||||||
|
* \param cfg The PLL configuration to be activated.
|
||||||
|
* \param pll_id The ID of the PLL to be enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_disable(unsigned int pll_id)
|
||||||
|
* \brief Disable the PLL identified by \a pll_id.
|
||||||
|
*
|
||||||
|
* After this function is called, the PLL identified by \a pll_id will
|
||||||
|
* be disabled. The PLL configuration stored in hardware may be affected
|
||||||
|
* by this, so if the caller needs to restore the same configuration
|
||||||
|
* later, it should either do a pll_config_read() before disabling the
|
||||||
|
* PLL, or remember the last configuration written to the PLL.
|
||||||
|
*
|
||||||
|
* \param pll_id The ID of the PLL to be disabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn bool pll_is_locked(unsigned int pll_id)
|
||||||
|
* \brief Determine whether the PLL is locked or not.
|
||||||
|
*
|
||||||
|
* \param pll_id The ID of the PLL to check.
|
||||||
|
*
|
||||||
|
* \retval true The PLL is locked and ready to use as a clock source
|
||||||
|
* \retval false The PLL is not yet locked, or has not been enabled.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_enable_source(enum pll_source src)
|
||||||
|
* \brief Enable the source of the pll.
|
||||||
|
* The source is enabled, if the source is not already running.
|
||||||
|
*
|
||||||
|
* \param src The ID of the PLL source to enable.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \fn void pll_enable_config_defaults(unsigned int pll_id)
|
||||||
|
* \brief Enable the pll with the default configuration.
|
||||||
|
* PLL is enabled, if the PLL is not already locked.
|
||||||
|
*
|
||||||
|
* \param pll_id The ID of the PLL to enable.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Wait for PLL \a pll_id to become locked
|
||||||
|
*
|
||||||
|
* \todo Use a timeout to avoid waiting forever and hanging the system
|
||||||
|
*
|
||||||
|
* \param pll_id The ID of the PLL to wait for.
|
||||||
|
*
|
||||||
|
* \retval STATUS_OK The PLL is now locked.
|
||||||
|
* \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
|
||||||
|
*/
|
||||||
|
static inline int pll_wait_for_lock(unsigned int pll_id)
|
||||||
|
{
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
|
||||||
|
while (!pll_is_locked(pll_id)) {
|
||||||
|
/* Do nothing */
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
//@}
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* CLK_PLL_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,175 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific DFLL implementation
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <dfll.h>
|
||||||
|
|
||||||
|
#define dfll_write_reg(reg, value) \
|
||||||
|
do { \
|
||||||
|
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0RDY)); \
|
||||||
|
irqflags_t ATPASTE2(dfll_flags, __LINE__) = cpu_irq_save(); \
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAUL) \
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_##reg - (uint32_t)SCIF);\
|
||||||
|
SCIF->SCIF_##reg = (value); \
|
||||||
|
cpu_irq_restore(ATPASTE2(dfll_flags, __LINE__)); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
void dfll_enable_open_loop(const struct dfll_config *cfg, uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
|
||||||
|
/* First, enable the DFLL, then configure it */
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAUL)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_DFLL0CONF - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_DFLL0CONF = SCIF_DFLL0CONF_EN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
dfll_write_reg(DFLL0CONF, cfg->conf | SCIF_DFLL0CONF_EN);
|
||||||
|
dfll_write_reg(DFLL0MUL, cfg->mul);
|
||||||
|
dfll_write_reg(DFLL0VAL, cfg->val);
|
||||||
|
dfll_write_reg(DFLL0SSG, cfg->ssg);
|
||||||
|
}
|
||||||
|
|
||||||
|
void dfll_disable_open_loop(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
|
||||||
|
/* First, disable the DFLL. */
|
||||||
|
// Do a sync before reading a dfll conf register
|
||||||
|
SCIF->SCIF_DFLL0SYNC = SCIF_DFLL0SYNC_SYNC;
|
||||||
|
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0RDY));
|
||||||
|
|
||||||
|
uint32_t conf = SCIF->SCIF_DFLL0CONF;
|
||||||
|
conf &= ~SCIF_DFLL0CONF_EN;
|
||||||
|
dfll_write_reg(DFLL0CONF, conf);
|
||||||
|
|
||||||
|
/* Finally, stop the reference clock */
|
||||||
|
genclk_disable(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
void dfll_enable_closed_loop(const struct dfll_config *cfg, uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
|
||||||
|
/* Enable the reference clock */
|
||||||
|
genclk_enable(&cfg->ref_cfg, 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable the DFLL first, but don't wait for the DFLL0RDY bit
|
||||||
|
* because if the DFLL has been disabled before, the DFLL0RDY
|
||||||
|
* bit stays cleared until it is re-enabled.
|
||||||
|
*/
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAUL)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_DFLL0CONF - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_DFLL0CONF = SCIF_DFLL0CONF_EN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Then, configure the DFLL, taking care to wait for the
|
||||||
|
* DFLL0RDY bit before every step.
|
||||||
|
*/
|
||||||
|
dfll_write_reg(DFLL0STEP, cfg->step);
|
||||||
|
dfll_write_reg(DFLL0MUL, cfg->mul);
|
||||||
|
dfll_write_reg(DFLL0SSG, cfg->ssg);
|
||||||
|
dfll_write_reg(DFLL0CONF, cfg->conf | SCIF_DFLL0CONF_EN);
|
||||||
|
}
|
||||||
|
|
||||||
|
void dfll_disable_closed_loop(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
|
||||||
|
/* First, disable the DFLL. */
|
||||||
|
// Do a sync before reading a dfll conf register
|
||||||
|
SCIF->SCIF_DFLL0SYNC = SCIF_DFLL0SYNC_SYNC;
|
||||||
|
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0RDY));
|
||||||
|
|
||||||
|
uint32_t conf = SCIF->SCIF_DFLL0CONF;
|
||||||
|
conf &= ~SCIF_DFLL0CONF_EN;
|
||||||
|
dfll_write_reg(DFLL0CONF, conf);
|
||||||
|
|
||||||
|
/* Finally, stop the reference clock */
|
||||||
|
genclk_disable(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
void dfll_enable_config_defaults(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_DFLL0_SOURCE
|
||||||
|
struct dfll_config dfllcfg;
|
||||||
|
#endif
|
||||||
|
static bool open_loop_done = false;
|
||||||
|
|
||||||
|
if(SCIF->SCIF_DFLL0CONF & SCIF_DFLL0CONF_MODE) {
|
||||||
|
// Closed-loop mode
|
||||||
|
if (dfll_is_fine_locked(dfll_id)) {
|
||||||
|
return; // DFLL already running
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (open_loop_done == true) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (dfll_id) {
|
||||||
|
#ifdef CONFIG_DFLL0_SOURCE
|
||||||
|
case 0:
|
||||||
|
dfll_enable_source(CONFIG_DFLL0_SOURCE);
|
||||||
|
dfll_config_init_closed_loop_mode(&dfllcfg,
|
||||||
|
CONFIG_DFLL0_SOURCE,
|
||||||
|
CONFIG_DFLL0_DIV,
|
||||||
|
CONFIG_DFLL0_MUL);
|
||||||
|
|
||||||
|
dfll_enable_closed_loop(&dfllcfg, dfll_id);
|
||||||
|
while (!dfll_is_fine_locked(dfll_id));
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
default:
|
||||||
|
Assert(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,373 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific DFLL definitions
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CHIP_DFLL_H_INCLUDED
|
||||||
|
#define CHIP_DFLL_H_INCLUDED
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup dfll_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define NR_DFLLS 1
|
||||||
|
#define DFLL_MIN_HZ 20000000UL
|
||||||
|
#define DFLL_MAX_HZ 150000000UL
|
||||||
|
#define DFLL_MIN_KHZ (DFLL_MIN_HZ / 1000)
|
||||||
|
#define DFLL_MAX_KHZ (DFLL_MAX_HZ / 1000)
|
||||||
|
|
||||||
|
#define DFLL_COARSE_MAX (255)
|
||||||
|
#define DFLL_FINE_MAX (511)
|
||||||
|
#define DFLL_FINE_HALF (255)
|
||||||
|
|
||||||
|
#define DFLL_CALIB_VALUE (0x0B)
|
||||||
|
|
||||||
|
#define DFLL_RANGE0 (0)
|
||||||
|
#define DFLL_RANGE1 (1)
|
||||||
|
#define DFLL_RANGE2 (2)
|
||||||
|
#define DFLL_RANGE3 (3)
|
||||||
|
#define DFLL_MAX_RANGE1 (110000000)
|
||||||
|
#define DFLL_MAX_RANGE2 (55000000)
|
||||||
|
#define DFLL_MAX_RANGE3 (30000000)
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
#include <genclk.h>
|
||||||
|
#include <osc.h>
|
||||||
|
|
||||||
|
typedef enum genclk_source dfll_refclk_t;
|
||||||
|
|
||||||
|
struct dfll_config {
|
||||||
|
struct genclk_config ref_cfg; //!< Reference clock
|
||||||
|
uint32_t conf; //!< DFLLnCONF
|
||||||
|
uint32_t mul; //!< DFLLnMUL
|
||||||
|
uint32_t step; //!< DFLLnSTEP
|
||||||
|
uint32_t ssg; //!< DFLLnSSG
|
||||||
|
uint32_t val; //!< DFLLnVAL
|
||||||
|
uint8_t freq_range; //!< Frequency Range
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline void dfll_config_set_max_step(struct dfll_config *cfg,
|
||||||
|
uint16_t coarse, uint16_t fine)
|
||||||
|
{
|
||||||
|
cfg->step = (SCIF_DFLL0STEP_CSTEP(coarse)
|
||||||
|
| SCIF_DFLL0STEP_FSTEP(fine));
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dfll_priv_set_frequency_range(struct dfll_config *cfg,
|
||||||
|
uint32_t freq)
|
||||||
|
{
|
||||||
|
if (freq < DFLL_MAX_RANGE3){
|
||||||
|
cfg->freq_range = DFLL_RANGE3;
|
||||||
|
}
|
||||||
|
else if (freq < DFLL_MAX_RANGE2){
|
||||||
|
cfg->freq_range = DFLL_RANGE2;
|
||||||
|
}
|
||||||
|
else if (freq < DFLL_MAX_RANGE1){
|
||||||
|
cfg->freq_range = DFLL_RANGE1;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
cfg->freq_range = DFLL_RANGE0;
|
||||||
|
}
|
||||||
|
cfg->conf &= ~SCIF_DFLL0CONF_RANGE_Msk;
|
||||||
|
cfg->conf |=SCIF_DFLL0CONF_RANGE(cfg->freq_range);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dfll_config_init_open_loop_mode(struct dfll_config *cfg)
|
||||||
|
{
|
||||||
|
genclk_config_defaults(&cfg->ref_cfg, 0);
|
||||||
|
// Do a sync before reading a dfll conf register
|
||||||
|
SCIF->SCIF_DFLL0SYNC = SCIF_DFLL0SYNC_SYNC;
|
||||||
|
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0RDY));
|
||||||
|
cfg->conf = SCIF->SCIF_DFLL0CONF;
|
||||||
|
// Select Open Loop Mode
|
||||||
|
cfg->conf &= ~SCIF_DFLL0CONF_MODE;
|
||||||
|
// Clear DFLL Frequency Range
|
||||||
|
cfg->freq_range = 0;
|
||||||
|
cfg->conf &= ~SCIF_DFLL0CONF_RANGE_Msk;
|
||||||
|
cfg->conf |= SCIF_DFLL0CONF_RANGE(cfg->freq_range);
|
||||||
|
|
||||||
|
cfg->mul = 0;
|
||||||
|
cfg->step = 0;
|
||||||
|
cfg->ssg = 0;
|
||||||
|
cfg->val = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_DFLL0_FREQ
|
||||||
|
static inline void dfll_config_init_closed_loop_mode(struct dfll_config *cfg,
|
||||||
|
dfll_refclk_t refclk, uint16_t divide, uint16_t mul)
|
||||||
|
{
|
||||||
|
/*
|
||||||
|
* Set up generic clock source with specified reference clock
|
||||||
|
* and divider.
|
||||||
|
*/
|
||||||
|
genclk_config_defaults(&cfg->ref_cfg, 0);
|
||||||
|
genclk_config_set_source(&cfg->ref_cfg, refclk);
|
||||||
|
genclk_config_set_divider(&cfg->ref_cfg, divide);
|
||||||
|
|
||||||
|
// Do a sync before reading a dfll conf register
|
||||||
|
SCIF->SCIF_DFLL0SYNC = SCIF_DFLL0SYNC_SYNC;
|
||||||
|
while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0RDY));
|
||||||
|
cfg->conf = SCIF->SCIF_DFLL0CONF;
|
||||||
|
// Select Closed Loop Mode
|
||||||
|
cfg->conf |= SCIF_DFLL0CONF_MODE;
|
||||||
|
// Write DFLL Frequency Range
|
||||||
|
dfll_priv_set_frequency_range(cfg, CONFIG_DFLL0_FREQ);
|
||||||
|
|
||||||
|
cfg->mul = mul;
|
||||||
|
cfg->val = 0;
|
||||||
|
/*
|
||||||
|
* Initial step length of 4. If this is set too high, the DFLL
|
||||||
|
* may fail to lock.
|
||||||
|
*/
|
||||||
|
dfll_config_set_max_step(cfg, 4, 4);
|
||||||
|
cfg->ssg = 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static inline uint32_t dfll_priv_get_source_hz(dfll_refclk_t src)
|
||||||
|
{
|
||||||
|
/*
|
||||||
|
* Only handle the cases that actually make sense as a DFLL
|
||||||
|
* source. The DFLL itself is obviously not one of those cases.
|
||||||
|
*/
|
||||||
|
switch (src) {
|
||||||
|
case GENCLK_SRC_RCSYS:
|
||||||
|
return OSC_RCSYS_NOMINAL_HZ;
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case GENCLK_SRC_OSC32K:
|
||||||
|
return BOARD_OSC32_HZ;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case GENCLK_SRC_OSC0:
|
||||||
|
return BOARD_OSC0_HZ;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC80M:
|
||||||
|
return OSC_RC80M_NOMINAL_HZ;
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC32K:
|
||||||
|
return OSC_RC32K_NOMINAL_HZ;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* unhandled_case(src) */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#define dfll_config_defaults(cfg, dfll_id) \
|
||||||
|
dfll_config_init_closed_loop_mode(cfg, \
|
||||||
|
CONFIG_DFLL##dfll_id##_SOURCE, \
|
||||||
|
CONFIG_DFLL##dfll_id##_DIV, \
|
||||||
|
CONFIG_DFLL##dfll_id##_MUL)
|
||||||
|
|
||||||
|
#define dfll_get_default_rate(dfll_id) \
|
||||||
|
((dfll_priv_get_source_hz(CONFIG_DFLL##dfll_id##_SOURCE) \
|
||||||
|
* CONFIG_DFLL##dfll_id##_MUL) \
|
||||||
|
/ CONFIG_DFLL##dfll_id##_DIV)
|
||||||
|
|
||||||
|
static inline void dfll_config_set_initial_tuning(struct dfll_config *cfg,
|
||||||
|
uint16_t coarse, uint16_t fine)
|
||||||
|
{
|
||||||
|
cfg->val = (SCIF_DFLL0VAL_COARSE(coarse)
|
||||||
|
| SCIF_DFLL0VAL_FINE(fine));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Tune the DFLL configuration for a specific target frequency
|
||||||
|
*
|
||||||
|
* This will set the initial coarse and fine DFLL tuning to match the
|
||||||
|
* given target frequency. In open loop mode, this will cause the DFLL
|
||||||
|
* to run close to the specified frequency, though it may not match
|
||||||
|
* exactly. In closed loop mode, the DFLL will automatically tune itself
|
||||||
|
* to the target frequency regardless of the initial tuning, but this
|
||||||
|
* function may be used to set a starting point close to the desired
|
||||||
|
* frequency in order to reduce the startup time.
|
||||||
|
*
|
||||||
|
* \par Calculating the DFLL frequency
|
||||||
|
*
|
||||||
|
* \f{eqnarray*}{
|
||||||
|
f_{DFLL} &=& \left[f_{min} + \left(f_{max} - f_{min}\right)
|
||||||
|
\frac{\mathrm{COARSE}}{\mathrm{COARSE}_{max}}\right]
|
||||||
|
\left(1 + x \frac{\mathrm{FINE}
|
||||||
|
- \mathrm{FINE}_{half}}{\mathrm{FINE}_{max}}\right)
|
||||||
|
= f_{coarse} \left(1 + x
|
||||||
|
\frac{\mathrm{FINE}
|
||||||
|
- \mathrm{FINE}_{half}}{\mathrm{FINE}_{max}}\right) \\
|
||||||
|
\mathrm{COARSE} &=& \frac{\left(f_{DFLL} - f_{min}\right)}
|
||||||
|
{f_{max} - f_{min}} \mathrm{COARSE}_{max} \\
|
||||||
|
f_{coarse} &=& f_{min} + \left(f_{max} - f_{min}\right)
|
||||||
|
\frac{\mathrm{COARSE}}{\mathrm{COARSE}_{max}} \\
|
||||||
|
\mathrm{FINE} &=& \left(10 \frac{f_{DFLL} - f_{coarse}}
|
||||||
|
{f_{coarse}} + \mathrm{FINE}_{half}\right) / 4
|
||||||
|
\f}
|
||||||
|
*
|
||||||
|
* \param cfg The DFLL configuration to be tuned.
|
||||||
|
* \param target_hz Target frequency in Hz.
|
||||||
|
*/
|
||||||
|
static inline void dfll_config_tune_for_target_hz(struct dfll_config *cfg,
|
||||||
|
uint32_t target_hz)
|
||||||
|
{
|
||||||
|
uint32_t target_khz;
|
||||||
|
uint32_t coarse_khz;
|
||||||
|
uint32_t delta_khz;
|
||||||
|
uint32_t coarse;
|
||||||
|
uint32_t fine;
|
||||||
|
|
||||||
|
target_khz = target_hz / 1000;
|
||||||
|
coarse = ((target_khz - DFLL_MIN_KHZ) * DFLL_COARSE_MAX)
|
||||||
|
/ (DFLL_MAX_KHZ - DFLL_MIN_KHZ);
|
||||||
|
coarse_khz = DFLL_MIN_KHZ + (((DFLL_MAX_KHZ - DFLL_MIN_KHZ)
|
||||||
|
/ DFLL_COARSE_MAX) * coarse);
|
||||||
|
delta_khz = target_khz - coarse_khz;
|
||||||
|
fine = (((delta_khz * DFLL_FINE_MAX) * 2) / coarse_khz) * 5;
|
||||||
|
fine += DFLL_FINE_HALF;
|
||||||
|
fine /= 4;
|
||||||
|
|
||||||
|
dfll_config_set_initial_tuning(cfg, coarse, fine);
|
||||||
|
dfll_priv_set_frequency_range(cfg, target_hz);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dfll_config_enable_ssg(struct dfll_config *cfg,
|
||||||
|
uint16_t amplitude, uint16_t step_size)
|
||||||
|
{
|
||||||
|
cfg->ssg = (SCIF_DFLL0SSG_EN
|
||||||
|
| SCIF_DFLL0SSG_AMPLITUDE(amplitude)
|
||||||
|
| SCIF_DFLL0SSG_STEPSIZE(step_size));
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dfll_config_disable_ssg(struct dfll_config *cfg)
|
||||||
|
{
|
||||||
|
cfg->ssg = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void dfll_enable_open_loop(const struct dfll_config *cfg,
|
||||||
|
uint32_t dfll_id);
|
||||||
|
extern void dfll_disable_open_loop(uint32_t dfll_id);
|
||||||
|
extern void dfll_enable_closed_loop(const struct dfll_config *cfg,
|
||||||
|
uint32_t dfll_id);
|
||||||
|
extern void dfll_disable_closed_loop(uint32_t dfll_id);
|
||||||
|
#ifndef CHIP_GENCLK_H_INCLUDED
|
||||||
|
// This function already has a prototype in genclk.h.
|
||||||
|
extern void dfll_enable_config_defaults(uint32_t dfll_id);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static inline bool dfll_is_coarse_locked(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
return !!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0LOCKC);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline bool dfll_is_fine_locked(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
return !!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_DFLL0LOCKF);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline bool dfll_is_accurate_locked(uint32_t dfll_id)
|
||||||
|
{
|
||||||
|
UNUSED(dfll_id);
|
||||||
|
|
||||||
|
return (dfll_is_coarse_locked(dfll_id) &&
|
||||||
|
dfll_is_fine_locked(dfll_id));
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dfll_enable_source(dfll_refclk_t src)
|
||||||
|
{
|
||||||
|
switch (src) {
|
||||||
|
case GENCLK_SRC_RCSYS:
|
||||||
|
/* Nothing to do */
|
||||||
|
break;
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case GENCLK_SRC_OSC32K:
|
||||||
|
if (!osc_is_ready(OSC_ID_OSC32)) {
|
||||||
|
osc_enable(OSC_ID_OSC32);
|
||||||
|
osc_wait_ready(OSC_ID_OSC32);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case GENCLK_SRC_OSC0:
|
||||||
|
if (!osc_is_ready(OSC_ID_OSC0)) {
|
||||||
|
osc_enable(OSC_ID_OSC0);
|
||||||
|
osc_wait_ready(OSC_ID_OSC0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC80M:
|
||||||
|
if (!osc_is_ready(OSC_ID_RC80M)) {
|
||||||
|
osc_enable(OSC_ID_RC80M);
|
||||||
|
osc_wait_ready(OSC_ID_RC80M);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC32K:
|
||||||
|
if (!osc_is_ready(OSC_ID_RC32K)) {
|
||||||
|
osc_enable(OSC_ID_RC32K);
|
||||||
|
osc_wait_ready(OSC_ID_RC32K);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
Assert(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CHIP_DFLL_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,238 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific generic clock management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CHIP_GENCLK_H_INCLUDED
|
||||||
|
#define CHIP_GENCLK_H_INCLUDED
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// dfll.h is not included to avoid a circular dependency.
|
||||||
|
extern void dfll_enable_config_defaults(uint32_t dfll_id);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup genclk_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Chip-specific generic clock definitions
|
||||||
|
//@{
|
||||||
|
|
||||||
|
#define GENCLK_DIV_MAX 256
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <osc.h>
|
||||||
|
#include <pll.h>
|
||||||
|
|
||||||
|
enum genclk_source {
|
||||||
|
GENCLK_SRC_RCSYS = 0, //!< System RC oscillator
|
||||||
|
GENCLK_SRC_OSC32K = 1, //!< 32 kHz oscillator
|
||||||
|
GENCLK_SRC_DFLL = 2, //!< DFLL
|
||||||
|
GENCLK_SRC_OSC0 = 3, //!< Oscillator 0
|
||||||
|
GENCLK_SRC_RC80M = 4, //!< 80 MHz RC oscillator
|
||||||
|
GENCLK_SRC_RCFAST = 5, //!< 4-8-12 MHz RC oscillator
|
||||||
|
GENCLK_SRC_RC1M = 6, //!< 1 MHz RC oscillator
|
||||||
|
GENCLK_SRC_CLK_CPU = 7, //!< CPU clock
|
||||||
|
GENCLK_SRC_CLK_HSB = 8, //!< High Speed Bus clock
|
||||||
|
GENCLK_SRC_CLK_PBA = 9, //!< Peripheral Bus A clock
|
||||||
|
GENCLK_SRC_CLK_PBB = 10, //!< Peripheral Bus B clock
|
||||||
|
GENCLK_SRC_CLK_PBC = 11, //!< Peripheral Bus C clock
|
||||||
|
GENCLK_SRC_CLK_PBD = 12, //!< Peripheral Bus D clock
|
||||||
|
GENCLK_SRC_RC32K = 13, //!< 32 kHz RC oscillator
|
||||||
|
GENCLK_SRC_CLK_1K = 15, //!< 1 kHz output from OSC32K
|
||||||
|
GENCLK_SRC_PLL0 = 16, //!< PLL0
|
||||||
|
GENCLK_SRC_HRPCLK = 17, //!< High resolution prescaler
|
||||||
|
GENCLK_SRC_FPCLK = 18, //!< Fractional prescaler
|
||||||
|
GENCLK_SRC_GCLKIN0 = 19, //!< GCLKIN0
|
||||||
|
GENCLK_SRC_GCLKIN1 = 20, //!< GCLKIN1
|
||||||
|
GENCLK_SRC_GCLK11 = 21, //!< GCLK11
|
||||||
|
};
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
struct genclk_config {
|
||||||
|
uint32_t ctrl;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline void genclk_config_defaults(struct genclk_config *cfg,
|
||||||
|
uint32_t id)
|
||||||
|
{
|
||||||
|
UNUSED(id);
|
||||||
|
cfg->ctrl = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_config_read(struct genclk_config *cfg,
|
||||||
|
uint32_t id)
|
||||||
|
{
|
||||||
|
cfg->ctrl = SCIF->SCIF_GCCTRL[id].SCIF_GCCTRL;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_config_write(const struct genclk_config *cfg,
|
||||||
|
uint32_t id)
|
||||||
|
{
|
||||||
|
SCIF->SCIF_GCCTRL[id].SCIF_GCCTRL = cfg->ctrl;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_config_set_source(struct genclk_config *cfg,
|
||||||
|
enum genclk_source src)
|
||||||
|
{
|
||||||
|
cfg->ctrl = (cfg->ctrl & ~SCIF_GCCTRL_OSCSEL_Msk)
|
||||||
|
| SCIF_GCCTRL_OSCSEL(src);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_config_set_divider(struct genclk_config *cfg,
|
||||||
|
uint32_t divider)
|
||||||
|
{
|
||||||
|
Assert(divider > 0 && divider <= GENCLK_DIV_MAX);
|
||||||
|
|
||||||
|
/* Clear all the bits we're about to modify */
|
||||||
|
cfg->ctrl &= ~(SCIF_GCCTRL_DIVEN
|
||||||
|
| SCIF_GCCTRL_DIV_Msk);
|
||||||
|
|
||||||
|
if (divider > 1) {
|
||||||
|
cfg->ctrl |= SCIF_GCCTRL_DIVEN;
|
||||||
|
cfg->ctrl |= SCIF_GCCTRL_DIV(((divider + 1) / 2) - 1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_enable(const struct genclk_config *cfg,
|
||||||
|
uint32_t id)
|
||||||
|
{
|
||||||
|
SCIF->SCIF_GCCTRL[id].SCIF_GCCTRL = cfg->ctrl | SCIF_GCCTRL_CEN;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_disable(uint32_t id)
|
||||||
|
{
|
||||||
|
SCIF->SCIF_GCCTRL[id].SCIF_GCCTRL = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void genclk_enable_source(enum genclk_source src)
|
||||||
|
{
|
||||||
|
switch (src) {
|
||||||
|
case GENCLK_SRC_RCSYS:
|
||||||
|
case GENCLK_SRC_CLK_CPU:
|
||||||
|
case GENCLK_SRC_CLK_HSB:
|
||||||
|
case GENCLK_SRC_CLK_PBA:
|
||||||
|
case GENCLK_SRC_CLK_PBB:
|
||||||
|
case GENCLK_SRC_CLK_PBC:
|
||||||
|
case GENCLK_SRC_CLK_PBD:
|
||||||
|
// Nothing to do
|
||||||
|
break;
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case GENCLK_SRC_OSC32K:
|
||||||
|
case GENCLK_SRC_CLK_1K: // The 1K linked on OSC32K
|
||||||
|
if (!osc_is_ready(OSC_ID_OSC32)) {
|
||||||
|
osc_enable(OSC_ID_OSC32);
|
||||||
|
osc_wait_ready(OSC_ID_OSC32);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC80M:
|
||||||
|
if (!osc_is_ready(OSC_ID_RC80M)) {
|
||||||
|
osc_enable(OSC_ID_RC80M);
|
||||||
|
osc_wait_ready(OSC_ID_RC80M);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GENCLK_SRC_RCFAST:
|
||||||
|
if (!osc_is_ready(OSC_ID_RCFAST)) {
|
||||||
|
osc_enable(OSC_ID_RCFAST);
|
||||||
|
osc_wait_ready(OSC_ID_RCFAST);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC1M:
|
||||||
|
if (!osc_is_ready(OSC_ID_RC1M)) {
|
||||||
|
osc_enable(OSC_ID_RC1M);
|
||||||
|
osc_wait_ready(OSC_ID_RC1M);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GENCLK_SRC_RC32K:
|
||||||
|
if (!osc_is_ready(OSC_ID_RC32K)) {
|
||||||
|
osc_enable(OSC_ID_RC32K);
|
||||||
|
osc_wait_ready(OSC_ID_RC32K);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
#ifdef CONFIG_DFLL0_SOURCE
|
||||||
|
case GENCLK_SRC_DFLL:
|
||||||
|
dfll_enable_config_defaults(0);
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case GENCLK_SRC_OSC0:
|
||||||
|
if (!osc_is_ready(OSC_ID_OSC0)) {
|
||||||
|
osc_enable(OSC_ID_OSC0);
|
||||||
|
osc_wait_ready(OSC_ID_OSC0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
# ifdef CONFIG_PLL0_SOURCE
|
||||||
|
case GENCLK_SRC_PLL0: {
|
||||||
|
pll_enable_config_defaults(0);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
# endif
|
||||||
|
|
||||||
|
default:
|
||||||
|
Assert(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CHIP_GENCLK_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,222 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific oscillator management functions
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <osc.h>
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
void osc_priv_enable_osc0(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_OSCCTRL0 - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_OSCCTRL0 =
|
||||||
|
OSC0_STARTUP_VALUE
|
||||||
|
# if BOARD_OSC0_IS_XTAL == true
|
||||||
|
| OSC0_GAIN_VALUE
|
||||||
|
#endif
|
||||||
|
| OSC0_MODE_VALUE
|
||||||
|
| SCIF_OSCCTRL0_OSCEN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_osc0(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_OSCCTRL0 - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_OSCCTRL0 = 0;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
#endif /* BOARD_OSC0_HZ */
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
void osc_priv_enable_osc32(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_OSCCTRL32 =
|
||||||
|
OSC32_STARTUP_VALUE
|
||||||
|
| BOARD_OSC32_SELCURR
|
||||||
|
| OSC32_MODE_VALUE
|
||||||
|
| BSCIF_OSCCTRL32_EN1K
|
||||||
|
| BSCIF_OSCCTRL32_EN32K
|
||||||
|
| BSCIF_OSCCTRL32_OSC32EN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_osc32(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_OSCCTRL32 - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_OSCCTRL32 &= ~BSCIF_OSCCTRL32_OSC32EN;
|
||||||
|
// Wait until OSC32 RDY flag is cleared.
|
||||||
|
while (BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_OSC32RDY);
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
#endif /* BOARD_OSC32_HZ */
|
||||||
|
|
||||||
|
void osc_priv_enable_rc32k(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = BSCIF->BSCIF_RC32KCR;
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC32KCR - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_RC32KCR = temp | BSCIF_RC32KCR_EN32K | BSCIF_RC32KCR_EN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_rc32k(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = BSCIF->BSCIF_RC32KCR;
|
||||||
|
temp &= ~BSCIF_RC32KCR_EN;
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC32KCR - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_RC32KCR = temp;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_enable_rc1m(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = BSCIF->BSCIF_RC1MCR;
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC1MCR - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_RC1MCR = temp | BSCIF_RC1MCR_CLKOE;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_rc1m(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = BSCIF->BSCIF_RC1MCR;
|
||||||
|
temp &= ~BSCIF_RC1MCR_CLKOE;
|
||||||
|
BSCIF->BSCIF_UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| BSCIF_UNLOCK_ADDR((uint32_t)&BSCIF->BSCIF_RC1MCR - (uint32_t)BSCIF);
|
||||||
|
BSCIF->BSCIF_RC1MCR = temp;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_enable_rc80m(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = SCIF->SCIF_RC80MCR;
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RC80MCR - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_RC80MCR = temp | SCIF_RC80MCR_EN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_rc80m(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
temp = SCIF->SCIF_RC80MCR;
|
||||||
|
temp &= ~SCIF_RC80MCR_EN ;
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RC80MCR - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_RC80MCR = temp;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_enable_rcfast(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
// Let FCD and calibration value by default
|
||||||
|
temp = SCIF->SCIF_RCFASTCFG;
|
||||||
|
// Clear previous FRANGE value
|
||||||
|
temp &= ~SCIF_RCFASTCFG_FRANGE_Msk;
|
||||||
|
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RCFASTCFG - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_RCFASTCFG = temp | SCIF_RCFASTCFG_EN
|
||||||
|
| SCIF_RCFASTCFG_FRANGE(CONFIG_RCFAST_FRANGE);
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osc_priv_disable_rcfast(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
uint32_t temp;
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
// Let FCD and calibration value by default
|
||||||
|
temp = SCIF->SCIF_RCFASTCFG;
|
||||||
|
// Clear previous FRANGE value
|
||||||
|
temp &= ~SCIF_RCFASTCFG_FRANGE_Msk;
|
||||||
|
// Disalbe RCFAST
|
||||||
|
temp &= ~SCIF_RCFASTCFG_EN;
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu)
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_RCFASTCFG - (uint32_t)SCIF);
|
||||||
|
SCIF->SCIF_RCFASTCFG = temp;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,504 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific oscillator management functions
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CHIP_OSC_H_INCLUDED
|
||||||
|
#define CHIP_OSC_H_INCLUDED
|
||||||
|
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup osc_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Oscillator identifiers
|
||||||
|
//@{
|
||||||
|
#define OSC_ID_OSC0 0 //!< External Oscillator 0
|
||||||
|
#define OSC_ID_OSC32 1 //!< External 32 kHz oscillator
|
||||||
|
#define OSC_ID_RC32K 2 //!< Internal 32 kHz RC oscillator
|
||||||
|
#define OSC_ID_RC80M 3 //!< Internal 80 MHz RC oscillator
|
||||||
|
#define OSC_ID_RCFAST 4 //!< Internal 4-8-12 MHz RCFAST oscillator
|
||||||
|
#define OSC_ID_RC1M 5 //!< Internal 1 MHz RC oscillator
|
||||||
|
#define OSC_ID_RCSYS 6 //!< Internal System RC oscillator
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name OSC0 mode values
|
||||||
|
//@{
|
||||||
|
//! External clock connected to XIN
|
||||||
|
#define OSC_MODE_EXTERNAL 0
|
||||||
|
//! Crystal connected to XIN/XOUT
|
||||||
|
#define OSC_MODE_XTAL SCIF_OSCCTRL0_MODE
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name OSC32 mode values
|
||||||
|
//@{
|
||||||
|
//! External clock connected to XIN32
|
||||||
|
#define OSC32_MODE_EXTERNAL BSCIF_OSCCTRL32_MODE(0)
|
||||||
|
//! Crystal connected to XIN32/XOUT32
|
||||||
|
#define OSC32_MODE_XTAL BSCIF_OSCCTRL32_MODE(1)
|
||||||
|
//! Crystal connected to XIN32/XOUT32 in high current mode
|
||||||
|
#define OSC32_MODE_XTAL_HC BSCIF_OSCCTRL32_MODE(4)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name OSC0 startup values
|
||||||
|
//@{
|
||||||
|
//! 0 cycles
|
||||||
|
#define OSC_STARTUP_0 SCIF_OSCCTRL0_STARTUP(0)
|
||||||
|
//! 64 cycles (560 us)
|
||||||
|
#define OSC_STARTUP_64 SCIF_OSCCTRL0_STARTUP(1)
|
||||||
|
//! 128 cycles (1.1 ms)
|
||||||
|
#define OSC_STARTUP_128 SCIF_OSCCTRL0_STARTUP(2)
|
||||||
|
//! 2048 cycles (18 ms)
|
||||||
|
#define OSC_STARTUP_2048 SCIF_OSCCTRL0_STARTUP(3)
|
||||||
|
//! 4096 cycles (36 ms)
|
||||||
|
#define OSC_STARTUP_4096 SCIF_OSCCTRL0_STARTUP(4)
|
||||||
|
//! 8192 cycles (71 ms)
|
||||||
|
#define OSC_STARTUP_8192 SCIF_OSCCTRL0_STARTUP(5)
|
||||||
|
//! 16384 cycles (143 ms)
|
||||||
|
#define OSC_STARTUP_16384 SCIF_OSCCTRL0_STARTUP(6)
|
||||||
|
//! 32768 cycles (285 ms)
|
||||||
|
#define OSC_STARTUP_32768 SCIF_OSCCTRL0_STARTUP(7)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name OSC32 startup values
|
||||||
|
//@{
|
||||||
|
//! 0 cycles
|
||||||
|
#define OSC32_STARTUP_0 BSCIF_OSCCTRL32_STARTUP(0)
|
||||||
|
//! 128 cycles (1.1 ms)
|
||||||
|
#define OSC32_STARTUP_128 BSCIF_OSCCTRL32_STARTUP(1)
|
||||||
|
//! 8192 cycles (72.3 ms)
|
||||||
|
#define OSC32_STARTUP_8192 BSCIF_OSCCTRL32_STARTUP(2)
|
||||||
|
//! 16384 cycles (143 ms)
|
||||||
|
#define OSC32_STARTUP_16384 BSCIF_OSCCTRL32_STARTUP(3)
|
||||||
|
//! 65536 cycles (570 ms)
|
||||||
|
#define OSC32_STARTUP_65536 BSCIF_OSCCTRL32_STARTUP(4)
|
||||||
|
//! 131072 cycles (1.1 s)
|
||||||
|
#define OSC32_STARTUP_131072 BSCIF_OSCCTRL32_STARTUP(5)
|
||||||
|
//! 262144 cycles (2.3 s)
|
||||||
|
#define OSC32_STARTUP_262144 BSCIF_OSCCTRL32_STARTUP(6)
|
||||||
|
//! 524288 cycles (4.6 s)
|
||||||
|
#define OSC32_STARTUP_524288 BSCIF_OSCCTRL32_STARTUP(7)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def OSC0_STARTUP_TIMEOUT
|
||||||
|
* \brief Number of slow clock cycles to wait for OSC0 to start
|
||||||
|
*
|
||||||
|
* This is the number of slow clock cycles corresponding to
|
||||||
|
* OSC0_STARTUP_VALUE with an additional 25% safety margin. If the
|
||||||
|
* oscillator isn't running when this timeout has expired, it is assumed
|
||||||
|
* to have failed to start.
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def OSC0_MODE_VALUE
|
||||||
|
* \brief Board-dependent value written to the MODE bitfield of
|
||||||
|
* PM_OSCCTRL(0)
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def OSC0_STARTUP_VALUE
|
||||||
|
* \brief Board-dependent value written to the STARTUP bitfield of
|
||||||
|
* PM_OSCCTRL(0)
|
||||||
|
*/
|
||||||
|
#if defined(BOARD_OSC0_STARTUP_US)
|
||||||
|
# if BOARD_OSC0_STARTUP_US == 0
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_0
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 8
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 557
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_64
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 80
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 1100
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_128
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 160
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 18000
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_2048
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 2560
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 36000
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_4096
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 5120
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 71000
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_8192
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 10240
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 143000
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_16384
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 20480
|
||||||
|
# elif BOARD_OSC0_STARTUP_US <= 285000
|
||||||
|
# define OSC0_STARTUP_VALUE OSC_STARTUP_32768
|
||||||
|
# define OSC0_STARTUP_TIMEOUT 40960
|
||||||
|
# else
|
||||||
|
# error BOARD_OSC0_STARTUP_US is too high
|
||||||
|
# endif
|
||||||
|
# if BOARD_OSC0_IS_XTAL == true
|
||||||
|
# define OSC0_MODE_VALUE OSC_MODE_XTAL
|
||||||
|
# if BOARD_OSC0_HZ < 2000000
|
||||||
|
# define OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(0)
|
||||||
|
# elif BOARD_OSC0_HZ < 4000000
|
||||||
|
# define OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(1)
|
||||||
|
# elif BOARD_OSC0_HZ < 8000000
|
||||||
|
# define OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(2)
|
||||||
|
# elif BOARD_OSC0_HZ < 16000000
|
||||||
|
# define OSC0_GAIN_VALUE SCIF_OSCCTRL0_GAIN(3)
|
||||||
|
# else
|
||||||
|
# define OSC0_GAIN_VALUE ((0x1u << 4) | SCIF_OSCCTRL0_GAIN(0))
|
||||||
|
# endif
|
||||||
|
# else
|
||||||
|
# define OSC0_MODE_VALUE OSC_MODE_EXTERNAL
|
||||||
|
# endif
|
||||||
|
#else
|
||||||
|
# if defined(BOARD_OSC0_HZ)
|
||||||
|
# error BOARD_OSC0_STARTUP_US must be defined by the board code
|
||||||
|
# endif
|
||||||
|
# ifdef __DOXYGEN__
|
||||||
|
# define OSC0_STARTUP_VALUE UNDEFINED
|
||||||
|
# define OSC0_STARTUP_TIMEOUT UNDEFINED
|
||||||
|
# define OSC0_MODE_VALUE UNDEFINED
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(BOARD_OSC32_STARTUP_US)
|
||||||
|
# if BOARD_OSC32_STARTUP_US == 0
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_0
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 1100
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_128
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 72300
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_8192
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 143000
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_16384
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 570000
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_65536
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 1100000
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_131072
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 2300000
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_262144
|
||||||
|
# elif BOARD_OSC32_STARTUP_US <= 4600000
|
||||||
|
# define OSC32_STARTUP_VALUE OSC32_STARTUP_524288
|
||||||
|
# else
|
||||||
|
# error BOARD_OSC32_STARTUP_US is too high
|
||||||
|
# endif
|
||||||
|
# if BOARD_OSC32_IS_XTAL == true
|
||||||
|
# define OSC32_MODE_VALUE OSC32_MODE_XTAL
|
||||||
|
# else
|
||||||
|
# define OSC32_MODE_VALUE OSC32_MODE_EXTERNAL
|
||||||
|
# endif
|
||||||
|
#else
|
||||||
|
# if defined(BOARD_OSC32_HZ)
|
||||||
|
# error BOARD_OSC32_STARTUP_US must be defined by the board code
|
||||||
|
# endif
|
||||||
|
# ifdef __DOXYGEN__
|
||||||
|
# define OSC32_STARTUP_VALUE UNDEFINED
|
||||||
|
# define OSC32_STARTUP_TIMEOUT UNDEFINED
|
||||||
|
# define OSC32_MODE_VALUE UNDEFINED
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Use 4 MHz frequency range for RCFAST oscillator if config was empty.
|
||||||
|
#ifndef CONFIG_RCFAST_FRANGE
|
||||||
|
#define CONFIG_RCFAST_FRANGE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Board-specific configuration parameters
|
||||||
|
* The following definitions must be provided by the board code for all
|
||||||
|
* working oscillators on the board.
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC0_HZ
|
||||||
|
* \brief Clock frequency of OSC0 in Hz
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC0_STARTUP_US
|
||||||
|
* \brief Startup time of OSC0 in microseconds
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC0_IS_XTAL
|
||||||
|
* \brief OSC0 uses a crystal, not an external clock
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC32_HZ
|
||||||
|
* \brief Clock frequency of OSC32 in Hz
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC32_STARTUP_US
|
||||||
|
* \brief Startup time of OSC32 in microseconds
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC32_IS_XTAL
|
||||||
|
* \brief OSC32 uses a crystal, not an external clock
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* \def BOARD_OSC32_SELCURR
|
||||||
|
* \brief Crystal current selection for OSC32
|
||||||
|
*
|
||||||
|
* If not defined, the recommended value (300nA) are used.
|
||||||
|
*/
|
||||||
|
#ifndef BOARD_OSC32_SELCURR
|
||||||
|
# define BOARD_OSC32_SELCURR BSCIF_OSCCTRL32_SELCURR(10)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name RC oscillator frequency limits
|
||||||
|
* The frequency of the internal RC oscillators may drift a bit as a
|
||||||
|
* result of temperature changes. These definitions provide upper and
|
||||||
|
* lower limits which may be used to calculate upper and lower limits of
|
||||||
|
* timeouts, derived clock frequencies, etc.
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
//! Nominal frequency of RCSYS in Hz
|
||||||
|
#define OSC_RCSYS_NOMINAL_HZ 115000
|
||||||
|
//! Minimum frequency of RCSYS in Hz
|
||||||
|
#define OSC_RCSYS_MIN_HZ 100000
|
||||||
|
//! Maximum frequency of RCSYS in Hz
|
||||||
|
#define OSC_RCSYS_MAX_HZ 120000
|
||||||
|
|
||||||
|
//! Nominal frequency of RC32K in Hz
|
||||||
|
#define OSC_RC32K_NOMINAL_HZ 32768
|
||||||
|
//! Minimum frequency of RC32K in Hz
|
||||||
|
#define OSC_RC32K_MIN_HZ 20000
|
||||||
|
//! Maximum frequency of RC32K in Hz
|
||||||
|
#define OSC_RC32K_MAX_HZ 44000
|
||||||
|
|
||||||
|
//! Nominal frequency of RC80M in Hz
|
||||||
|
#define OSC_RC80M_NOMINAL_HZ 80000000
|
||||||
|
|
||||||
|
//! Nominal frequency of RCFAST4M in Hz
|
||||||
|
#define OSC_RCFAST4M_NOMINAL_HZ 4000000
|
||||||
|
|
||||||
|
//! Nominal frequency of RCFAST8M in Hz
|
||||||
|
#define OSC_RCFAST8M_NOMINAL_HZ 8000000
|
||||||
|
|
||||||
|
//! Nominal frequency of RCFAST12M in Hz
|
||||||
|
#define OSC_RCFAST12M_NOMINAL_HZ 12000000
|
||||||
|
|
||||||
|
//! Nominal frequency of RC1M in Hz
|
||||||
|
#define OSC_RC1M_NOMINAL_HZ 1000000
|
||||||
|
//@}
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
|
||||||
|
extern void osc_priv_enable_osc0(void);
|
||||||
|
extern void osc_priv_disable_osc0(void);
|
||||||
|
extern void osc_priv_enable_osc32(void);
|
||||||
|
extern void osc_priv_disable_osc32(void);
|
||||||
|
extern void osc_priv_enable_rc32k(void);
|
||||||
|
extern void osc_priv_disable_rc32k(void);
|
||||||
|
extern void osc_priv_enable_rc80m(void);
|
||||||
|
extern void osc_priv_disable_rc80m(void);
|
||||||
|
extern void osc_priv_enable_rcfast(void);
|
||||||
|
extern void osc_priv_disable_rcfast(void);
|
||||||
|
extern void osc_priv_enable_rc1m(void);
|
||||||
|
extern void osc_priv_disable_rc1m(void);
|
||||||
|
|
||||||
|
static inline void osc_enable(uint8_t id)
|
||||||
|
{
|
||||||
|
switch (id) {
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case OSC_ID_OSC0:
|
||||||
|
osc_priv_enable_osc0();
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case OSC_ID_OSC32:
|
||||||
|
osc_priv_enable_osc32();
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case OSC_ID_RC32K:
|
||||||
|
osc_priv_enable_rc32k();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RC80M:
|
||||||
|
osc_priv_enable_rc80m();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RCFAST:
|
||||||
|
osc_priv_enable_rcfast();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RC1M:
|
||||||
|
osc_priv_enable_rc1m();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RCSYS:
|
||||||
|
/* RCSYS is always running */
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* unhandled_case(id); */
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void osc_disable(uint8_t id)
|
||||||
|
{
|
||||||
|
switch (id) {
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case OSC_ID_OSC0:
|
||||||
|
osc_priv_disable_osc0();
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case OSC_ID_OSC32:
|
||||||
|
osc_priv_disable_osc32();
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case OSC_ID_RC32K:
|
||||||
|
osc_priv_disable_rc32k();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RC80M:
|
||||||
|
osc_priv_disable_rc80m();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RCFAST:
|
||||||
|
osc_priv_disable_rcfast();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RC1M:
|
||||||
|
osc_priv_disable_rc1m();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case OSC_ID_RCSYS:
|
||||||
|
/* RCSYS is always running */
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* unhandled_case(id); */
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline bool osc_is_ready(uint8_t id)
|
||||||
|
{
|
||||||
|
switch (id) {
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case OSC_ID_OSC0:
|
||||||
|
return !!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_OSC0RDY);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case OSC_ID_OSC32:
|
||||||
|
return !!(BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_OSC32RDY);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case OSC_ID_RC32K:
|
||||||
|
return !!(BSCIF->BSCIF_RC32KCR & (BSCIF_RC32KCR_EN));
|
||||||
|
|
||||||
|
case OSC_ID_RC80M:
|
||||||
|
return !!(SCIF->SCIF_RC80MCR & (SCIF_RC80MCR_EN));
|
||||||
|
|
||||||
|
case OSC_ID_RCFAST:
|
||||||
|
return !!(SCIF->SCIF_RCFASTCFG & (SCIF_RCFASTCFG_EN));
|
||||||
|
|
||||||
|
case OSC_ID_RC1M:
|
||||||
|
return !!(BSCIF->BSCIF_RC1MCR & (BSCIF_RC1MCR_CLKOE));
|
||||||
|
|
||||||
|
case OSC_ID_RCSYS:
|
||||||
|
/* RCSYS is always ready */
|
||||||
|
return true;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* unhandled_case(id); */
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline uint32_t osc_get_rate(uint8_t id)
|
||||||
|
{
|
||||||
|
switch (id) {
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
case OSC_ID_OSC0:
|
||||||
|
return BOARD_OSC0_HZ;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC32_HZ
|
||||||
|
case OSC_ID_OSC32:
|
||||||
|
return BOARD_OSC32_HZ;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
case OSC_ID_RC32K:
|
||||||
|
return OSC_RC32K_NOMINAL_HZ;
|
||||||
|
|
||||||
|
case OSC_ID_RC80M:
|
||||||
|
return OSC_RC80M_NOMINAL_HZ;
|
||||||
|
|
||||||
|
case OSC_ID_RCFAST:
|
||||||
|
if (CONFIG_RCFAST_FRANGE == 2) {
|
||||||
|
return OSC_RCFAST12M_NOMINAL_HZ;
|
||||||
|
|
||||||
|
} else if (CONFIG_RCFAST_FRANGE == 1) {
|
||||||
|
return OSC_RCFAST8M_NOMINAL_HZ;
|
||||||
|
|
||||||
|
} else {
|
||||||
|
return OSC_RCFAST4M_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
|
||||||
|
case OSC_ID_RC1M:
|
||||||
|
return OSC_RC1M_NOMINAL_HZ;
|
||||||
|
|
||||||
|
case OSC_ID_RCSYS:
|
||||||
|
return OSC_RCSYS_NOMINAL_HZ;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* unhandled_case(id); */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* !__ASSEMBLY__ */
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CHIP_OSC_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,88 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific PLL implementation
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <pll.h>
|
||||||
|
|
||||||
|
#define SCIF_UNLOCK_PLL_REG(pll_id) \
|
||||||
|
do { \
|
||||||
|
SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu) \
|
||||||
|
| SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_PLL[0].SCIF_PLL \
|
||||||
|
+ (4 * pll_id) - (uint32_t)SCIF); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
void pll_config_write(const struct pll_config *cfg, uint32_t pll_id)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
|
||||||
|
SCIF_UNLOCK_PLL_REG(pll_id);
|
||||||
|
SCIF->SCIF_PLL[pll_id].SCIF_PLL = cfg->ctrl;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pll_enable(const struct pll_config *cfg, uint32_t pll_id)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF_UNLOCK_PLL_REG(pll_id);
|
||||||
|
SCIF->SCIF_PLL[pll_id].SCIF_PLL = cfg->ctrl | SCIF_PLL_PLLEN;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pll_disable(uint32_t pll_id)
|
||||||
|
{
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
SCIF_UNLOCK_PLL_REG(pll_id);
|
||||||
|
SCIF->SCIF_PLL[pll_id].SCIF_PLL = 0;
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,253 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific PLL definitions
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CHIP_PLL_H_INCLUDED
|
||||||
|
#define CHIP_PLL_H_INCLUDED
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define SCIF0_PLL_VCO_RANGE1_MAX_FREQ 240000000
|
||||||
|
#define SCIF_PLL0_VCO_RANGE1_MIN_FREQ 160000000
|
||||||
|
#define SCIF_PLL0_VCO_RANGE0_MAX_FREQ 180000000
|
||||||
|
#define SCIF_PLL0_VCO_RANGE0_MIN_FREQ 80000000
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup pll_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PLL_MAX_STARTUP_CYCLES (SCIF_PLL_PLLCOUNT_Msk >> SCIF_PLL_PLLCOUNT_Pos)
|
||||||
|
#define NR_PLLS 1
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Number of milliseconds to wait for PLL lock
|
||||||
|
*/
|
||||||
|
#define PLL_TIMEOUT_MS \
|
||||||
|
div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_RCSYS_MIN_HZ)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \note The PLL must run at twice this frequency internally, but the
|
||||||
|
* output frequency may be divided by two by setting the PLLOPT[1] bit.
|
||||||
|
*/
|
||||||
|
#define PLL_MIN_HZ 40000000
|
||||||
|
#define PLL_MAX_HZ 240000000
|
||||||
|
|
||||||
|
//! \name Chip-specific PLL options
|
||||||
|
//@{
|
||||||
|
//! VCO frequency range is 160-240 MHz (80-180 MHz if unset).
|
||||||
|
#define PLL_OPT_VCO_RANGE_HIGH 0
|
||||||
|
//! Divide output frequency by two
|
||||||
|
#define PLL_OPT_OUTPUT_DIV 1
|
||||||
|
//! Disable wide-bandwidth mode
|
||||||
|
#define PLL_OPT_WBM_DISABLE 2
|
||||||
|
//! Number of PLL options
|
||||||
|
#define PLL_NR_OPTIONS 3
|
||||||
|
//! The threshold above which to set the #PLL_OPT_VCO_RANGE_HIGH option
|
||||||
|
#define PLL_VCO_LOW_THRESHOLD ((SCIF_PLL0_VCO_RANGE1_MIN_FREQ \
|
||||||
|
+ SCIF_PLL0_VCO_RANGE0_MAX_FREQ) / 2)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <osc.h>
|
||||||
|
|
||||||
|
enum pll_source {
|
||||||
|
PLL_SRC_OSC0 = 0, //!< Oscillator 0
|
||||||
|
PLL_SRC_GCLK9 = 1, //!< Generic Clock 9
|
||||||
|
PLL_NR_SOURCES, //!< Number of PLL sources
|
||||||
|
};
|
||||||
|
|
||||||
|
struct pll_config {
|
||||||
|
uint32_t ctrl;
|
||||||
|
};
|
||||||
|
|
||||||
|
#define pll_get_default_rate(pll_id) \
|
||||||
|
((osc_get_rate(CONFIG_PLL ## pll_id ## _SOURCE) \
|
||||||
|
* CONFIG_PLL ## pll_id ## _MUL) \
|
||||||
|
/ CONFIG_PLL ## pll_id ## _DIV)
|
||||||
|
|
||||||
|
static inline void pll_config_set_option(struct pll_config *cfg,
|
||||||
|
uint32_t option)
|
||||||
|
{
|
||||||
|
Assert(option < PLL_NR_OPTIONS);
|
||||||
|
|
||||||
|
cfg->ctrl |= 1U << (SCIF_PLL_PLLOPT_Pos + option);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void pll_config_clear_option(struct pll_config *cfg,
|
||||||
|
uint32_t option)
|
||||||
|
{
|
||||||
|
Assert(option < PLL_NR_OPTIONS);
|
||||||
|
|
||||||
|
cfg->ctrl &= ~(1U << (SCIF_PLL_PLLOPT_Pos + option));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* The PLL options #PLL_OPT_VCO_RANGE_HIGH and #PLL_OPT_OUTPUT_DIV will
|
||||||
|
* be set automatically based on the calculated target frequency.
|
||||||
|
*/
|
||||||
|
static inline void pll_config_init(struct pll_config *cfg,
|
||||||
|
enum pll_source src, uint32_t divide, uint32_t mul)
|
||||||
|
{
|
||||||
|
#define MUL_MIN 2
|
||||||
|
#define MUL_MAX 16
|
||||||
|
#define DIV_MIN 0
|
||||||
|
#define DIV_MAX 15
|
||||||
|
|
||||||
|
uint32_t vco_hz;
|
||||||
|
|
||||||
|
Assert(src < PLL_NR_SOURCES);
|
||||||
|
Assert(divide != 0);
|
||||||
|
|
||||||
|
/* Calculate internal VCO frequency */
|
||||||
|
vco_hz = osc_get_rate(src) * mul;
|
||||||
|
vco_hz /= divide;
|
||||||
|
Assert(vco_hz >= PLL_MIN_HZ);
|
||||||
|
Assert(vco_hz <= PLL_MAX_HZ);
|
||||||
|
|
||||||
|
cfg->ctrl = 0;
|
||||||
|
|
||||||
|
/* Bring the internal VCO frequency up to the minimum value */
|
||||||
|
if ((vco_hz < PLL_MIN_HZ * 2) && (mul <= 8)) {
|
||||||
|
mul *= 2;
|
||||||
|
vco_hz *= 2;
|
||||||
|
pll_config_set_option(cfg, PLL_OPT_OUTPUT_DIV);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set VCO frequency range according to calculated value */
|
||||||
|
if (vco_hz >= PLL_VCO_LOW_THRESHOLD) {
|
||||||
|
pll_config_set_option(cfg, PLL_OPT_VCO_RANGE_HIGH);
|
||||||
|
}
|
||||||
|
|
||||||
|
Assert(mul > MUL_MIN && mul <= MUL_MAX);
|
||||||
|
Assert(divide > DIV_MIN && divide <= DIV_MAX);
|
||||||
|
|
||||||
|
cfg->ctrl |= ((mul - 1) << SCIF_PLL_PLLMUL_Pos)
|
||||||
|
| (divide << SCIF_PLL_PLLDIV_Pos)
|
||||||
|
| (PLL_MAX_STARTUP_CYCLES << SCIF_PLL_PLLCOUNT_Pos)
|
||||||
|
| (src << SCIF_PLL_PLLOSC_Pos);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define pll_config_defaults(cfg, pll_id) \
|
||||||
|
pll_config_init(cfg, \
|
||||||
|
CONFIG_PLL ## pll_id ## _SOURCE, \
|
||||||
|
CONFIG_PLL ## pll_id ## _DIV, \
|
||||||
|
CONFIG_PLL ## pll_id ## _MUL)
|
||||||
|
|
||||||
|
static inline void pll_config_read(struct pll_config *cfg, uint32_t pll_id)
|
||||||
|
{
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
|
||||||
|
cfg->ctrl = SCIF->SCIF_PLL[pll_id].SCIF_PLL;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void pll_config_write(const struct pll_config *cfg, uint32_t pll_id);
|
||||||
|
extern void pll_enable(const struct pll_config *cfg, uint32_t pll_id);
|
||||||
|
extern void pll_disable(uint32_t pll_id);
|
||||||
|
|
||||||
|
static inline bool pll_is_locked(uint32_t pll_id)
|
||||||
|
{
|
||||||
|
Assert(pll_id < NR_PLLS);
|
||||||
|
return !!(SCIF->SCIF_PCLKSR & (1U << (6 + pll_id)));
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void pll_enable_source(enum pll_source src)
|
||||||
|
{
|
||||||
|
switch (src) {
|
||||||
|
case PLL_SRC_OSC0:
|
||||||
|
if (!osc_is_ready(OSC_ID_OSC0)) {
|
||||||
|
osc_enable(OSC_ID_OSC0);
|
||||||
|
osc_wait_ready(OSC_ID_OSC0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
#ifdef CONFIG_GCLK9_SOURCE
|
||||||
|
case PLL_SRC_GCLK9:
|
||||||
|
SCIF->SCIF_GCCTRL[9].SCIF_GCCTRL =
|
||||||
|
SCIF_GCCTRL_OSCSEL(CONFIG_GCLK9_SOURCE) |
|
||||||
|
SCIF_GCCTRL_CEN;
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
default:
|
||||||
|
Assert(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void pll_enable_config_defaults(uint32_t pll_id)
|
||||||
|
{
|
||||||
|
struct pll_config pllcfg;
|
||||||
|
|
||||||
|
if (pll_is_locked(pll_id)) {
|
||||||
|
return; // Pll already running
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (pll_id) {
|
||||||
|
#ifdef CONFIG_PLL0_SOURCE
|
||||||
|
case 0:
|
||||||
|
pll_enable_source(CONFIG_PLL0_SOURCE);
|
||||||
|
pll_config_init(&pllcfg,
|
||||||
|
CONFIG_PLL0_SOURCE,
|
||||||
|
CONFIG_PLL0_DIV,
|
||||||
|
CONFIG_PLL0_MUL);
|
||||||
|
break;
|
||||||
|
|
||||||
|
#endif
|
||||||
|
default:
|
||||||
|
Assert(false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
pll_enable(&pllcfg, pll_id);
|
||||||
|
while (!pll_is_locked(pll_id));
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CHIP_PLL_H_INCLUDED */
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,815 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific system clock management functions
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CHIP_SYSCLK_H_INCLUDED
|
||||||
|
#define CHIP_SYSCLK_H_INCLUDED
|
||||||
|
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page sysclk_quickstart Quick Start Guide for the System Clock Management service (SAM4L)
|
||||||
|
*
|
||||||
|
* This is the quick start guide for the \ref sysclk_group "System Clock Management"
|
||||||
|
* service, with step-by-step instructions on how to configure and use the service for
|
||||||
|
* specific use cases.
|
||||||
|
*
|
||||||
|
* \section sysclk_quickstart_usecases System Clock Management use cases
|
||||||
|
* - \ref sysclk_quickstart_basic
|
||||||
|
*
|
||||||
|
* \section sysclk_quickstart_basic Basic usage of the System Clock Management service
|
||||||
|
* This section will present a basic use case for the System Clock Management service.
|
||||||
|
* This use case will configure the main system clock to 48MHz, using an internal DFLL
|
||||||
|
* module to multiply the frequency of a crystal attached to the microcontroller. The
|
||||||
|
* peripheral bus clocks are scaled down from the speed of the main system clock.
|
||||||
|
*
|
||||||
|
* \subsection sysclk_quickstart_use_case_1_prereq Prerequisites
|
||||||
|
* - None
|
||||||
|
*
|
||||||
|
* \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
|
||||||
|
* Add to the application initialization code:
|
||||||
|
* \code
|
||||||
|
* sysclk_init();
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
|
||||||
|
* -# Configure the system clocks according to the settings in conf_clock.h:
|
||||||
|
* \code sysclk_init(); \endcode
|
||||||
|
*
|
||||||
|
* \subsection sysclk_quickstart_use_case_1_example_code Example code
|
||||||
|
* Add or uncomment the following in your conf_clock.h header file, commenting out all other
|
||||||
|
* definitions of the same symbol(s):
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL0
|
||||||
|
*
|
||||||
|
* // Fdfll = (Fclk * DFLL_mul) / DFLL_div
|
||||||
|
* #define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC32K
|
||||||
|
* #define CONFIG_DFLL0_FREQ 48000000UL
|
||||||
|
* #define CONFIG_DFLL0_MUL (CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ)
|
||||||
|
* #define CONFIG_DFLL0_DIV 1
|
||||||
|
*
|
||||||
|
* // Fbus = Fsys / (2 ^ BUS_div)
|
||||||
|
* #define CONFIG_SYSCLK_CPU_DIV 0
|
||||||
|
* #define CONFIG_SYSCLK_PBA_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBB_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBC_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBD_DIV 1
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
|
||||||
|
* -# Configure the main system clock to use the output of the DFLL0 module as its source:
|
||||||
|
* \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL0 \endcode
|
||||||
|
* -# Configure the DFLL0 module to use external crystal oscillator OSC0 as its source:
|
||||||
|
* \code #define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC32K \endcode
|
||||||
|
* -# Configure the DFLL0 module to multiply the external oscillator OSC0 frequency up to 48MHz:
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_DFLL0_FREQ 48000000UL
|
||||||
|
* #define CONFIG_DFLL0_MUL (CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ)
|
||||||
|
* #define CONFIG_DFLL0_DIV 1
|
||||||
|
* \endcode
|
||||||
|
* \note For user boards, \c BOARD_OSC0_HZ should be defined in the board \c conf_board.h configuration
|
||||||
|
* file as the frequency of the crystal attached to OSC0.
|
||||||
|
* -# Configure the main clock to run at the full 48MHz, scale the peripheral busses to run at one
|
||||||
|
* half (2 to the power of 1) of the system clock speed:
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_SYSCLK_CPU_DIV 0
|
||||||
|
* #define CONFIG_SYSCLK_PBA_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBB_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBC_DIV 1
|
||||||
|
* #define CONFIG_SYSCLK_PBD_DIV 1
|
||||||
|
* \endcode
|
||||||
|
* \note Some dividers are powers of two, while others are integer division factors. Refer to the
|
||||||
|
* formulas in the conf_clock.h template commented above each division define.
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup sysclk_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name System clock source
|
||||||
|
//@{
|
||||||
|
#define SYSCLK_SRC_RCSYS 0 //!< System RC oscillator
|
||||||
|
#define SYSCLK_SRC_OSC0 1 //!< Oscillator 0
|
||||||
|
#define SYSCLK_SRC_PLL0 2 //!< Phase Locked Loop 0
|
||||||
|
#define SYSCLK_SRC_DFLL 3 //!< Digital Frequency Locked Loop
|
||||||
|
#define SYSCLK_SRC_RC80M 4 //!< 80 MHz RC oscillator
|
||||||
|
#define SYSCLK_SRC_RCFAST 5 //!< 4-8-12 MHz RC oscillator
|
||||||
|
#define SYSCLK_SRC_RC1M 6 //!< 1 MHz RC oscillator
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name USB Clock Sources
|
||||||
|
//@{
|
||||||
|
#define USBCLK_SRC_OSC0 GENCLK_SRC_OSC0 //!< Use OSC0
|
||||||
|
#define USBCLK_SRC_PLL0 GENCLK_SRC_PLL0 //!< Use PLL0
|
||||||
|
#define USBCLK_SRC_DFLL GENCLK_SRC_DFLL //!< Use DFLL
|
||||||
|
#define USBCLK_SRC_GCLKIN0 GENCLK_SRC_GCLKIN0 //!< Use GCLKIN0
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Bus index of maskable module clocks
|
||||||
|
//@{
|
||||||
|
#define PM_CLK_GRP_CPU 0
|
||||||
|
#define PM_CLK_GRP_HSB 1
|
||||||
|
#define PM_CLK_GRP_PBA 2
|
||||||
|
#define PM_CLK_GRP_PBB 3
|
||||||
|
#define PM_CLK_GRP_PBC 4
|
||||||
|
#define PM_CLK_GRP_PBD 5
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the CPU clock
|
||||||
|
//@{
|
||||||
|
//! On-Chip Debug system
|
||||||
|
#define SYSCLK_OCD 0
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the HSB clock
|
||||||
|
//@{
|
||||||
|
//! PDCA memory interface
|
||||||
|
#define SYSCLK_PDCA_HSB 0
|
||||||
|
//! Flash data interface
|
||||||
|
#define SYSCLK_HFLASHC_DATA 1
|
||||||
|
//! HRAMC data interface
|
||||||
|
#define SYSCLK_HRAMC1_DATA 2
|
||||||
|
//! USBC DMA and FIFO interface
|
||||||
|
#define SYSCLK_USBC_DATA 3
|
||||||
|
//! CRCCU data interface
|
||||||
|
#define SYSCLK_CRCCU_DATA 4
|
||||||
|
//! HSB<->PBA bridge
|
||||||
|
#define SYSCLK_PBA_BRIDGE 5
|
||||||
|
//! HSB<->PBB bridge
|
||||||
|
#define SYSCLK_PBB_BRIDGE 6
|
||||||
|
//! HSB<->PBC bridge
|
||||||
|
#define SYSCLK_PBC_BRIDGE 7
|
||||||
|
//! HSB<->PBD bridge
|
||||||
|
#define SYSCLK_PBD_BRIDGE 8
|
||||||
|
//! Advanced Encryption Standard
|
||||||
|
#define SYSCLK_AESA_HSB 9
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the PBA clock
|
||||||
|
//@{
|
||||||
|
//! IISC Controller
|
||||||
|
#define SYSCLK_IISC 0
|
||||||
|
//! SPI Controller
|
||||||
|
#define SYSCLK_SPI 1
|
||||||
|
//! Timer/Counter 0
|
||||||
|
#define SYSCLK_TC0 2
|
||||||
|
//! Timer/Counter 1
|
||||||
|
#define SYSCLK_TC1 3
|
||||||
|
//! TWI Master 0
|
||||||
|
#define SYSCLK_TWIM0 4
|
||||||
|
//! TWI Slave 0
|
||||||
|
#define SYSCLK_TWIS0 5
|
||||||
|
//! TWI Master 1
|
||||||
|
#define SYSCLK_TWIM1 6
|
||||||
|
//! TWI Slave 1
|
||||||
|
#define SYSCLK_TWIS1 7
|
||||||
|
//! USART 0
|
||||||
|
#define SYSCLK_USART0 8
|
||||||
|
//! USART 1
|
||||||
|
#define SYSCLK_USART1 9
|
||||||
|
//! USART 2
|
||||||
|
#define SYSCLK_USART2 10
|
||||||
|
//! USART 3
|
||||||
|
#define SYSCLK_USART3 11
|
||||||
|
//! A/D Converter
|
||||||
|
#define SYSCLK_ADCIFE 12
|
||||||
|
//! D/A Converter
|
||||||
|
#define SYSCLK_DACC 13
|
||||||
|
//! Analog Comparator
|
||||||
|
#define SYSCLK_ACIFC 14
|
||||||
|
//! Glue Logic Controller
|
||||||
|
#define SYSCLK_GLOC 15
|
||||||
|
//! ABDACB Controller
|
||||||
|
#define SYSCLK_ABDACB 16
|
||||||
|
//! TRNG Controller
|
||||||
|
#define SYSCLK_TRNG 17
|
||||||
|
//! PARC Controller
|
||||||
|
#define SYSCLK_PARC 18
|
||||||
|
//! Capacitive Touch
|
||||||
|
#define SYSCLK_CATB 19
|
||||||
|
//! TWI Master 2
|
||||||
|
#define SYSCLK_TWIM2 21
|
||||||
|
//! TWI Master 3
|
||||||
|
#define SYSCLK_TWIM3 22
|
||||||
|
//! LCD Controller
|
||||||
|
#define SYSCLK_LCDCA 23
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the PBB clock
|
||||||
|
//@{
|
||||||
|
//! Flash Controller registers
|
||||||
|
#define SYSCLK_HFLASHC_REGS 0
|
||||||
|
//! HRAMC Controller registers
|
||||||
|
#define SYSCLK_HRAMC1_REGS 1
|
||||||
|
//! HSB Matrix configuration
|
||||||
|
#define SYSCLK_HMATRIX 2
|
||||||
|
//! PDCA peripheral bus interface
|
||||||
|
#define SYSCLK_PDCA_PB 3
|
||||||
|
//! CRCCU registers
|
||||||
|
#define SYSCLK_CRCCU_REGS 4
|
||||||
|
//! USBC registers
|
||||||
|
#define SYSCLK_USBC_REGS 5
|
||||||
|
//! PEVC Controller
|
||||||
|
#define SYSCLK_PEVC 6
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the PBC clock
|
||||||
|
//@{
|
||||||
|
//! PM configuration
|
||||||
|
#define SYSCLK_PM 0
|
||||||
|
//! CHIPID Controller
|
||||||
|
#define SYSCLK_CHIPID 1
|
||||||
|
//! System Control Interface
|
||||||
|
#define SYSCLK_SCIF 2
|
||||||
|
//! Frequency Meter
|
||||||
|
#define SYSCLK_FREQM 3
|
||||||
|
//! General-Purpose I/O
|
||||||
|
#define SYSCLK_GPIO 4
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Clocks derived from the PBD clock
|
||||||
|
//@{
|
||||||
|
//! BPM configuration
|
||||||
|
#define SYSCLK_BPM 0
|
||||||
|
//! BSCIF configuration
|
||||||
|
#define SYSCLK_BSCIF 1
|
||||||
|
//! Asynchronous Timer
|
||||||
|
#define SYSCLK_AST 2
|
||||||
|
//! Watchdog Timer
|
||||||
|
#define SYSCLK_WDT 3
|
||||||
|
//! External Interrupt Controller
|
||||||
|
#define SYSCLK_EIC 4
|
||||||
|
//! PICOUART
|
||||||
|
#define SYSCLK_PICOUART 5
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name Divided clock mask derived from the PBA clock
|
||||||
|
//@{
|
||||||
|
//! TIMER_CLOCK2 mask
|
||||||
|
#define PBA_DIVMASK_TIMER_CLOCK2 (1u << 0)
|
||||||
|
//! TIMER_CLOCK3 mask
|
||||||
|
#define PBA_DIVMASK_TIMER_CLOCK3 (1u << 2)
|
||||||
|
//! CLK_USART/DIV mask
|
||||||
|
#define PBA_DIVMASK_CLK_USART (1u << 2)
|
||||||
|
//! TIMER_CLOCK4 mask
|
||||||
|
#define PBA_DIVMASK_TIMER_CLOCK4 (1u << 4)
|
||||||
|
//! TIMER_CLOCK5 mask
|
||||||
|
#define PBA_DIVMASK_TIMER_CLOCK5 (1u << 6)
|
||||||
|
//! Bitfield mask
|
||||||
|
#define PBA_DIVMASK_Msk (0x7Fu << 0)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <dfll.h>
|
||||||
|
#include <osc.h>
|
||||||
|
#include <pll.h>
|
||||||
|
#include <genclk.h>
|
||||||
|
|
||||||
|
// Use the slow clock (RCOSC) with no prescaling if config was empty.
|
||||||
|
#ifndef CONFIG_SYSCLK_SOURCE
|
||||||
|
# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS
|
||||||
|
#endif /* CONFIG_SYSCLK_SOURCE */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable PicoCache for flash access by default.
|
||||||
|
* 0: disable PicoCache, 1: enable PicoCache.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_HCACHE_ENABLE
|
||||||
|
#define CONFIG_HCACHE_ENABLE 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_CPU_DIV
|
||||||
|
* \brief Configuration symbol for dividing the CPU clock frequency by
|
||||||
|
* \f$2^{CONFIG\_SYSCLK\_CPU\_DIV}\f$
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the CPU clock frequency is not divided.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_SYSCLK_CPU_DIV
|
||||||
|
# define CONFIG_SYSCLK_CPU_DIV 0
|
||||||
|
#endif /* CONFIG_SYSCLK_CPU_DIV */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_HSBMASK
|
||||||
|
* \brief Configuration symbol for the HSB clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all HSB clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all HSB clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_HSBMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_PBA_DIV
|
||||||
|
* \brief Configuration symbol for dividing the PBA clock frequency by
|
||||||
|
* \f$2^{CONFIG\_SYSCLK\_PBA\_DIV}\f$
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the PBA clock frequency is not divided.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_SYSCLK_PBA_DIV
|
||||||
|
# define CONFIG_SYSCLK_PBA_DIV 0
|
||||||
|
#endif /* CONFIG_SYSCLK_PBA_DIV */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_PBB_DIV
|
||||||
|
* \brief Configuration symbol for dividing the PBB clock frequency by
|
||||||
|
* \f$2^{CONFIG\_SYSCLK\_PBB\_DIV}\f$
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the PBB clock frequency is not divided.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_SYSCLK_PBB_DIV
|
||||||
|
# define CONFIG_SYSCLK_PBB_DIV 0
|
||||||
|
#endif /* CONFIG_SYSCLK_PBB_DIV */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_PBC_DIV
|
||||||
|
* \brief Configuration symbol for dividing the PBC clock frequency by
|
||||||
|
* \f$2^{CONFIG\_SYSCLK\_PBC\_DIV}\f$
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the PBC clock frequency is not divided.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_SYSCLK_PBC_DIV
|
||||||
|
# define CONFIG_SYSCLK_PBC_DIV 0
|
||||||
|
#endif /* CONFIG_SYSCLK_PBC_DIV */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_PBD_DIV
|
||||||
|
* \brief Configuration symbol for dividing the PBD clock frequency by
|
||||||
|
* \f$2^{CONFIG\_SYSCLK\_PBD\_DIV}\f$
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the PBD clock frequency is not divided.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_SYSCLK_PBD_DIV
|
||||||
|
# define CONFIG_SYSCLK_PBD_DIV 0
|
||||||
|
#endif /* CONFIG_SYSCLK_PBD_DIV */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_CPUMASK
|
||||||
|
* \brief Configuration symbol for the CPU clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all CPU clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all CPU clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_CPUMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_PBAMASK
|
||||||
|
* \brief Configuration symbol for the PBA clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all PBA clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all PBA clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_PBAMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_PBBMASK
|
||||||
|
* \brief Configuration symbol for the PBB clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all PBB clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all PBB clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_PBBMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_PBCMASK
|
||||||
|
* \brief Configuration symbol for the PBC clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all PBC clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all PBC clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_PBCMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SYSCLK_INIT_PBDMASK
|
||||||
|
* \brief Configuration symbol for the PBD clocks enabled at power-on after the
|
||||||
|
* sysclock module has been initialized. By default, all PBD clocks are left
|
||||||
|
* enabled, however to save power these can be automatically disabled by defining
|
||||||
|
* this value to a mask of \c SYSCLOCK_xxx settings.
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, then all PBD clocks are left enabled.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_clock.h.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_SYSCLK_INIT_PBDMASK
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_USBCLK_SOURCE
|
||||||
|
* \brief Configuration symbol for the USB generic clock source
|
||||||
|
*
|
||||||
|
* Sets the clock source to use for the USB. The source must also be properly
|
||||||
|
* configured.
|
||||||
|
*
|
||||||
|
* Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if
|
||||||
|
* USB is not required.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_USBCLK_SOURCE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_USBCLK_DIV
|
||||||
|
* \brief Configuration symbol for the USB generic clock divider setting
|
||||||
|
*
|
||||||
|
* Sets the clock division for the USB generic clock. If a USB clock source is
|
||||||
|
* selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be
|
||||||
|
* defined.
|
||||||
|
*
|
||||||
|
* Define this as any value that does not exceed \c GENCLK_DIV_MAX, and which
|
||||||
|
* will give a 48 MHz clock frequency from the selected source.
|
||||||
|
*/
|
||||||
|
#ifdef __DOXYGEN__
|
||||||
|
# define CONFIG_USBCLK_DIV
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Querying the system clock and its derived clocks
|
||||||
|
*
|
||||||
|
* The following functions may be used to query the current frequency of
|
||||||
|
* the system clock and the CPU and bus clocks derived from it.
|
||||||
|
* sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be
|
||||||
|
* available on all platforms, although some platforms may define
|
||||||
|
* additional accessors for various chip-internal bus clocks. These are
|
||||||
|
* usually not intended to be queried directly by generic code.
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the main system clock
|
||||||
|
*
|
||||||
|
* \todo This function assumes that the main clock source never changes
|
||||||
|
* once it's been set up, and that PLL0 always runs at the compile-time
|
||||||
|
* configured default rate. While this is probably the most common
|
||||||
|
* configuration, which we want to support as a special case for
|
||||||
|
* performance reasons, we will at some point need to support more
|
||||||
|
* dynamic setups as well.
|
||||||
|
*/
|
||||||
|
#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC)
|
||||||
|
extern bool sysclk_initialized;
|
||||||
|
#endif
|
||||||
|
static inline uint32_t sysclk_get_main_hz(void)
|
||||||
|
{
|
||||||
|
#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC)
|
||||||
|
if (!sysclk_initialized ) {
|
||||||
|
return OSC_RCSYS_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RCSYS) {
|
||||||
|
return OSC_RCSYS_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef BOARD_OSC0_HZ
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_OSC0) {
|
||||||
|
return BOARD_OSC0_HZ;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_PLL0_SOURCE
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_PLL0) {
|
||||||
|
return pll_get_default_rate(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_DFLL0_SOURCE
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_DFLL) {
|
||||||
|
return dfll_get_default_rate(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC80M) {
|
||||||
|
return OSC_RC80M_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RCFAST) {
|
||||||
|
if (CONFIG_RCFAST_FRANGE == 2) {
|
||||||
|
return OSC_RCFAST12M_NOMINAL_HZ;
|
||||||
|
} else if (CONFIG_RCFAST_FRANGE == 1) {
|
||||||
|
return OSC_RCFAST8M_NOMINAL_HZ;
|
||||||
|
} else {
|
||||||
|
return OSC_RCFAST4M_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
else if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC1M) {
|
||||||
|
return OSC_RC1M_NOMINAL_HZ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
else {
|
||||||
|
/* unhandled_case(CONFIG_SYSCLK_SOURCE); */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the CPU clock
|
||||||
|
*
|
||||||
|
* \todo This function assumes that the CPU always runs at the system
|
||||||
|
* clock frequency. We want to support at least two more scenarios:
|
||||||
|
* Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus
|
||||||
|
* clock dividers (which may change at run time). Ditto for all the bus
|
||||||
|
* clocks.
|
||||||
|
*
|
||||||
|
* \return Frequency of the CPU clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_cpu_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the High-Speed Bus clock
|
||||||
|
*
|
||||||
|
* \return Frequency of the High Speed Peripheral Bus clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_hsb_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the Peripheral Bus A clock
|
||||||
|
*
|
||||||
|
* \return Frequency of the Peripheral Bus A clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_pba_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the Peripheral Bus B clock
|
||||||
|
*
|
||||||
|
* \return Frequency of the Peripheral Bus B clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_pbb_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBB_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the Peripheral Bus C clock
|
||||||
|
*
|
||||||
|
* \return Frequency of the Peripheral Bus C clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_pbc_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBC_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Return the current rate in Hz of the Peripheral Bus D clock
|
||||||
|
*
|
||||||
|
* \return Frequency of the Peripheral Bus D clock, in Hz.
|
||||||
|
*/
|
||||||
|
static inline uint32_t sysclk_get_pbd_hz(void)
|
||||||
|
{
|
||||||
|
return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBD_DIV;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module);
|
||||||
|
//@}
|
||||||
|
|
||||||
|
extern void sysclk_priv_enable_module(uint32_t bus_id, uint32_t module_index);
|
||||||
|
extern void sysclk_priv_disable_module(uint32_t bus_id, uint32_t module_index);
|
||||||
|
|
||||||
|
//! \name Enabling and disabling synchronous clocks
|
||||||
|
//@{
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable a module clock derived from the CPU clock
|
||||||
|
* \param index Index of the module clock in the CPUMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_enable_cpu_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_enable_module(PM_CLK_GRP_CPU, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable a module clock derived from the CPU clock
|
||||||
|
* \param index Index of the module clock in the CPUMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_disable_cpu_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_disable_module(PM_CLK_GRP_CPU, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable a module clock derived from the HSB clock
|
||||||
|
* \param index Index of the module clock in the HSBMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_enable_hsb_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_enable_module(PM_CLK_GRP_HSB, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable a module clock derived from the HSB clock
|
||||||
|
* \param index Index of the module clock in the HSBMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_disable_hsb_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_disable_module(PM_CLK_GRP_HSB, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void sysclk_enable_pba_module(uint32_t index);
|
||||||
|
extern void sysclk_disable_pba_module(uint32_t index);
|
||||||
|
extern void sysclk_enable_pbb_module(uint32_t index);
|
||||||
|
extern void sysclk_disable_pbb_module(uint32_t index);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable a module clock derived from the PBC clock
|
||||||
|
* \param index Index of the module clock in the PBAMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_enable_pbc_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_enable_module(PM_CLK_GRP_PBC, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable a module clock derived from the PBC clock
|
||||||
|
* \param index Index of the module clock in the PBAMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_disable_pbc_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_disable_module(PM_CLK_GRP_PBC, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable a module clock derived from the PBD clock
|
||||||
|
* \param index Index of the module clock in the PBAMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_enable_pbd_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_enable_module(PM_CLK_GRP_PBD, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable a module clock derived from the PBD clock
|
||||||
|
* \param index Index of the module clock in the PBAMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_disable_pbd_module(uint32_t index)
|
||||||
|
{
|
||||||
|
sysclk_priv_disable_module(PM_CLK_GRP_PBD, index);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable divided clock mask derived from the PBA clock
|
||||||
|
* \param mask mask of the divided clock in the PBADIVMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_enable_pba_divmask(uint32_t mask)
|
||||||
|
{
|
||||||
|
uint32_t temp_mask;
|
||||||
|
|
||||||
|
temp_mask = PM->PM_PBADIVMASK;
|
||||||
|
temp_mask |= mask;
|
||||||
|
PM->PM_UNLOCK = PM_UNLOCK_KEY(0xAAu)
|
||||||
|
| PM_UNLOCK_ADDR((uint32_t)&PM->PM_PBADIVMASK - (uint32_t)PM);
|
||||||
|
PM->PM_PBADIVMASK = temp_mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable divided clock mask derived from the PBA clock
|
||||||
|
* \param mask mask of the divided clock in the PBADIVMASK register
|
||||||
|
*/
|
||||||
|
static inline void sysclk_disable_pba_divmask(uint32_t mask)
|
||||||
|
{
|
||||||
|
uint32_t temp_mask;
|
||||||
|
|
||||||
|
temp_mask = PM->PM_PBADIVMASK;
|
||||||
|
temp_mask &= ~mask;
|
||||||
|
PM->PM_UNLOCK = PM_UNLOCK_KEY(0xAAu)
|
||||||
|
| PM_UNLOCK_ADDR((uint32_t)&PM->PM_PBADIVMASK - (uint32_t)PM);
|
||||||
|
PM->PM_PBADIVMASK = temp_mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void sysclk_enable_peripheral_clock(const volatile void *module);
|
||||||
|
extern void sysclk_disable_peripheral_clock(const volatile void *module);
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! \name System Clock Source and Prescaler configuration
|
||||||
|
//@{
|
||||||
|
|
||||||
|
extern void sysclk_set_prescalers(uint32_t cpu_shift,
|
||||||
|
uint32_t pba_shift, uint32_t pbb_shift,
|
||||||
|
uint32_t pbc_shift, uint32_t pbd_shift);
|
||||||
|
extern void sysclk_set_source(uint32_t src);
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def USBCLK_STARTUP_TIMEOUT
|
||||||
|
* \brief Number of us to wait for USB clock to start
|
||||||
|
*/
|
||||||
|
#ifdef CONFIG_USBCLK_STARTUP_TIMEOUT
|
||||||
|
# define USBCLK_STARTUP_TIMEOUT (CONFIG_USBCLK_STARTUP_TIMEOUT)
|
||||||
|
#else
|
||||||
|
# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/OSC_RCSYS_NOMINAL_HZ))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern void sysclk_enable_usb(void);
|
||||||
|
extern void sysclk_disable_usb(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern void sysclk_init(void);
|
||||||
|
|
||||||
|
#endif /* !__ASSEMBLY__ */
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CHIP_SYSCLK_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,173 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief System clock management
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef SYSCLK_H_INCLUDED
|
||||||
|
#define SYSCLK_H_INCLUDED
|
||||||
|
|
||||||
|
#include "parts.h"
|
||||||
|
#include "conf_clock.h"
|
||||||
|
|
||||||
|
#if SAM3S
|
||||||
|
# include "sam3s/sysclk.h"
|
||||||
|
#elif SAM3U
|
||||||
|
# include "sam3u/sysclk.h"
|
||||||
|
#elif SAM3N
|
||||||
|
# include "sam3n/sysclk.h"
|
||||||
|
#elif SAM3XA
|
||||||
|
# include "sam3x/sysclk.h"
|
||||||
|
#elif SAM4S
|
||||||
|
# include "sam4s/sysclk.h"
|
||||||
|
#elif SAM4E
|
||||||
|
# include "sam4e/sysclk.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/sysclk.h"
|
||||||
|
#elif (UC3A0 || UC3A1)
|
||||||
|
# include "uc3a0_a1/sysclk.h"
|
||||||
|
#elif UC3A3
|
||||||
|
# include "uc3a3_a4/sysclk.h"
|
||||||
|
#elif UC3B
|
||||||
|
# include "uc3b0_b1/sysclk.h"
|
||||||
|
#elif UC3C
|
||||||
|
# include "uc3c/sysclk.h"
|
||||||
|
#elif UC3D
|
||||||
|
# include "uc3d/sysclk.h"
|
||||||
|
#elif UC3L
|
||||||
|
# include "uc3l/sysclk.h"
|
||||||
|
#elif XMEGA
|
||||||
|
# include "xmega/sysclk.h"
|
||||||
|
#elif MEGA
|
||||||
|
# include "mega/sysclk.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported chip type
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup clk_group Clock Management
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup clk_group
|
||||||
|
* \defgroup sysclk_group System Clock Management
|
||||||
|
*
|
||||||
|
* See \ref sysclk_quickstart.
|
||||||
|
*
|
||||||
|
* The <em>sysclk</em> API covers the <em>system clock</em> and all
|
||||||
|
* clocks derived from it. The system clock is a chip-internal clock on
|
||||||
|
* which all <em>synchronous clocks</em>, i.e. CPU and bus/peripheral
|
||||||
|
* clocks, are based. The system clock is typically generated from one
|
||||||
|
* of a variety of sources, which may include crystal and RC oscillators
|
||||||
|
* as well as PLLs. The clocks derived from the system clock are
|
||||||
|
* sometimes also known as <em>synchronous clocks</em>, since they
|
||||||
|
* always run synchronously with respect to each other, as opposed to
|
||||||
|
* <em>generic clocks</em> which may run from different oscillators or
|
||||||
|
* PLLs.
|
||||||
|
*
|
||||||
|
* Most applications should simply call sysclk_init() to initialize
|
||||||
|
* everything related to the system clock and its source (oscillator,
|
||||||
|
* PLL or DFLL), and leave it at that. More advanced applications, and
|
||||||
|
* platform-specific drivers, may require additional services from the
|
||||||
|
* clock system, some of which may be platform-specific.
|
||||||
|
*
|
||||||
|
* \section sysclk_group_platform Platform Dependencies
|
||||||
|
*
|
||||||
|
* The sysclk API is partially chip- or platform-specific. While all
|
||||||
|
* platforms provide mostly the same functionality, there are some
|
||||||
|
* variations around how different bus types and clock tree structures
|
||||||
|
* are handled.
|
||||||
|
*
|
||||||
|
* The following functions are available on all platforms with the same
|
||||||
|
* parameters and functionality. These functions may be called freely by
|
||||||
|
* portable applications, drivers and services:
|
||||||
|
* - sysclk_init()
|
||||||
|
* - sysclk_set_source()
|
||||||
|
* - sysclk_get_main_hz()
|
||||||
|
* - sysclk_get_cpu_hz()
|
||||||
|
* - sysclk_get_peripheral_bus_hz()
|
||||||
|
*
|
||||||
|
* The following functions are available on all platforms, but there may
|
||||||
|
* be variations in the function signature (i.e. parameters) and
|
||||||
|
* behavior. These functions are typically called by platform-specific
|
||||||
|
* parts of drivers, and applications that aren't intended to be
|
||||||
|
* portable:
|
||||||
|
* - sysclk_enable_peripheral_clock()
|
||||||
|
* - sysclk_disable_peripheral_clock()
|
||||||
|
* - sysclk_enable_module()
|
||||||
|
* - sysclk_disable_module()
|
||||||
|
* - sysclk_module_is_enabled()
|
||||||
|
* - sysclk_set_prescalers()
|
||||||
|
*
|
||||||
|
* All other functions should be considered platform-specific.
|
||||||
|
* Enabling/disabling clocks to specific peripherals as well as
|
||||||
|
* determining the speed of these clocks should be done by calling
|
||||||
|
* functions provided by the driver for that peripheral.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name System Clock Initialization
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \fn void sysclk_init(void)
|
||||||
|
* \brief Initialize the synchronous clock system.
|
||||||
|
*
|
||||||
|
* This function will initialize the system clock and its source. This
|
||||||
|
* includes:
|
||||||
|
* - Mask all synchronous clocks except for any clocks which are
|
||||||
|
* essential for normal operation (for example internal memory
|
||||||
|
* clocks).
|
||||||
|
* - Set up the system clock prescalers as specified by the
|
||||||
|
* application's configuration file.
|
||||||
|
* - Enable the clock source specified by the application's
|
||||||
|
* configuration file (oscillator or PLL) and wait for it to become
|
||||||
|
* stable.
|
||||||
|
* - Set the main system clock source to the clock specified by the
|
||||||
|
* application's configuration file.
|
||||||
|
*
|
||||||
|
* Since all non-essential peripheral clocks are initially disabled, it
|
||||||
|
* is the responsibility of the peripheral driver to re-enable any
|
||||||
|
* clocks that are needed for normal operation.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* SYSCLK_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,536 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Common IOPORT service main header file for AVR, UC3 and ARM
|
||||||
|
* architectures.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef IOPORT_H
|
||||||
|
#define IOPORT_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <parts.h>
|
||||||
|
#include <compiler.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup ioport_group Common IOPORT API
|
||||||
|
*
|
||||||
|
* See \ref ioport_quickstart.
|
||||||
|
*
|
||||||
|
* This is common IOPORT service for GPIO pin configuration and control in a
|
||||||
|
* standardized manner across the MEGA, MEGA_RF, XMEGA, UC3 and ARM devices.
|
||||||
|
*
|
||||||
|
* Port pin control code is optimized for each platform, and should produce
|
||||||
|
* both compact and fast execution times when used with constant values.
|
||||||
|
*
|
||||||
|
* \section dependencies Dependencies
|
||||||
|
* This driver depends on the following modules:
|
||||||
|
* - \ref sysclk_group for clock speed and functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def IOPORT_CREATE_PIN(port, pin)
|
||||||
|
* \brief Create IOPORT pin number
|
||||||
|
*
|
||||||
|
* Create a IOPORT pin number for use with the IOPORT functions.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port (e.g. PORTA, PA or PIOA depending on chosen
|
||||||
|
* architecture)
|
||||||
|
* \param pin IOPORT zero-based index of the I/O pin
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** \brief IOPORT pin directions */
|
||||||
|
enum ioport_direction {
|
||||||
|
IOPORT_DIR_INPUT, /*!< IOPORT input direction */
|
||||||
|
IOPORT_DIR_OUTPUT, /*!< IOPORT output direction */
|
||||||
|
};
|
||||||
|
|
||||||
|
/** \brief IOPORT levels */
|
||||||
|
enum ioport_value {
|
||||||
|
IOPORT_PIN_LEVEL_LOW, /*!< IOPORT pin value low */
|
||||||
|
IOPORT_PIN_LEVEL_HIGH, /*!< IOPORT pin value high */
|
||||||
|
};
|
||||||
|
|
||||||
|
#if MEGA_RF
|
||||||
|
/** \brief IOPORT edge sense modes */
|
||||||
|
enum ioport_sense {
|
||||||
|
IOPORT_SENSE_LEVEL, /*!< IOPORT sense low level */
|
||||||
|
IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
|
||||||
|
IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
|
||||||
|
IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
|
||||||
|
};
|
||||||
|
#elif SAM && !SAM4L
|
||||||
|
/** \brief IOPORT edge sense modes */
|
||||||
|
enum ioport_sense {
|
||||||
|
IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
|
||||||
|
IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
|
||||||
|
IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
|
||||||
|
IOPORT_SENSE_LEVEL_LOW, /*!< IOPORT sense low level */
|
||||||
|
IOPORT_SENSE_LEVEL_HIGH,/*!< IOPORT sense High level */
|
||||||
|
};
|
||||||
|
#else
|
||||||
|
enum ioport_sense {
|
||||||
|
IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
|
||||||
|
IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
|
||||||
|
IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#if XMEGA
|
||||||
|
# include "xmega/ioport.h"
|
||||||
|
# if defined(IOPORT_XMEGA_COMPAT)
|
||||||
|
# include "xmega/ioport_compat.h"
|
||||||
|
# endif
|
||||||
|
#elif MEGA
|
||||||
|
# include "mega/ioport.h"
|
||||||
|
#elif UC3
|
||||||
|
# include "uc3/ioport.h"
|
||||||
|
#elif SAM
|
||||||
|
# if SAM4L
|
||||||
|
# include "sam/ioport_gpio.h"
|
||||||
|
# else
|
||||||
|
# include "sam/ioport_pio.h"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Initializes the IOPORT service, ready for use.
|
||||||
|
*
|
||||||
|
* This function must be called before using any other functions in the IOPORT
|
||||||
|
* service.
|
||||||
|
*/
|
||||||
|
static inline void ioport_init(void)
|
||||||
|
{
|
||||||
|
arch_ioport_init();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable an IOPORT pin, based on a pin created with \ref
|
||||||
|
* IOPORT_CREATE_PIN().
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to enable
|
||||||
|
*/
|
||||||
|
static inline void ioport_enable_pin(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_enable_pin(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable multiple pins in a single IOPORT port.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to enable
|
||||||
|
* \param mask Mask of pins within the port to enable
|
||||||
|
*/
|
||||||
|
static inline void ioport_enable_port(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_enable_port(port, mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable IOPORT pin, based on a pin created with \ref
|
||||||
|
* IOPORT_CREATE_PIN().
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to disable
|
||||||
|
*/
|
||||||
|
static inline void ioport_disable_pin(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_disable_pin(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable multiple pins in a single IOPORT port.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to disable
|
||||||
|
* \param mask Pin mask of pins to disable
|
||||||
|
*/
|
||||||
|
static inline void ioport_disable_port(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_disable_port(port, mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set multiple pin modes in a single IOPORT port, such as pull-up,
|
||||||
|
* pull-down, etc. configuration.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to configure
|
||||||
|
* \param mask Pin mask of pins to configure
|
||||||
|
* \param mode Mode masks to configure for the specified pins (\ref
|
||||||
|
* ioport_modes)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_port_mode(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, ioport_mode_t mode)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_mode(port, mask, mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set pin mode for one single IOPORT pin.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
* \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_pin_mode(ioport_pin_t pin, ioport_mode_t mode)
|
||||||
|
{
|
||||||
|
arch_ioport_set_pin_mode(pin, mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Reset multiple pin modes in a specified IOPORT port to defaults.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to configure
|
||||||
|
* \param mask Mask of pins whose mode configuration is to be reset
|
||||||
|
*/
|
||||||
|
static inline void ioport_reset_port_mode(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_mode(port, mask, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Reset pin mode configuration for a single IOPORT pin
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
*/
|
||||||
|
static inline void ioport_reset_pin_mode(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_set_pin_mode(pin, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set I/O direction for a group of pins in a single IOPORT.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to configure
|
||||||
|
* \param mask Pin mask of pins to configure
|
||||||
|
* \param dir Direction to set for the specified pins (\ref ioport_direction)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_port_dir(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, enum ioport_direction dir)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_dir(port, mask, dir);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set direction for a single IOPORT pin.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
* \param dir Direction to set for the specified pin (\ref ioport_direction)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_pin_dir(ioport_pin_t pin,
|
||||||
|
enum ioport_direction dir)
|
||||||
|
{
|
||||||
|
arch_ioport_set_pin_dir(pin, dir);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set an IOPORT pin to a specified logical value.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
* \param level Logical value of the pin
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_pin_level(ioport_pin_t pin, bool level)
|
||||||
|
{
|
||||||
|
arch_ioport_set_pin_level(pin, level);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set a group of IOPORT pins in a single port to a specified logical
|
||||||
|
* value.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to write to
|
||||||
|
* \param mask Pin mask of pins to modify
|
||||||
|
* \param level Level of the pins to be modified
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_port_level(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, ioport_port_mask_t level)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_level(port, mask, level);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get current value of an IOPORT pin, which has been configured as an
|
||||||
|
* input.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to read
|
||||||
|
* \return Current logical value of the specified pin
|
||||||
|
*/
|
||||||
|
static inline bool ioport_get_pin_level(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return arch_ioport_get_pin_level(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get current value of several IOPORT pins in a single port, which have
|
||||||
|
* been configured as an inputs.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to read
|
||||||
|
* \param mask Pin mask of pins to read
|
||||||
|
* \return Logical levels of the specified pins from the read port, returned as
|
||||||
|
* a mask.
|
||||||
|
*/
|
||||||
|
static inline ioport_port_mask_t ioport_get_port_level(ioport_pin_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
return arch_ioport_get_port_level(port, mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Toggle the value of an IOPORT pin, which has previously configured as
|
||||||
|
* an output.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to toggle
|
||||||
|
*/
|
||||||
|
static inline void ioport_toggle_pin_level(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_toggle_pin_level(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Toggle the values of several IOPORT pins located in a single port.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to modify
|
||||||
|
* \param mask Pin mask of pins to toggle
|
||||||
|
*/
|
||||||
|
static inline void ioport_toggle_port_level(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_toggle_port_level(port, mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set the pin sense mode of a single IOPORT pin.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
* \param pin_sense Edge to sense for the pin (\ref ioport_sense)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_pin_sense_mode(ioport_pin_t pin,
|
||||||
|
enum ioport_sense pin_sense)
|
||||||
|
{
|
||||||
|
arch_ioport_set_pin_sense_mode(pin, pin_sense);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set the pin sense mode of a multiple IOPORT pins on a single port.
|
||||||
|
*
|
||||||
|
* \param port IOPORT port to configure
|
||||||
|
* \param mask Bitmask if pins whose edge sense is to be configured
|
||||||
|
* \param pin_sense Edge to sense for the pins (\ref ioport_sense)
|
||||||
|
*/
|
||||||
|
static inline void ioport_set_port_sense_mode(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask,
|
||||||
|
enum ioport_sense pin_sense)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_sense_mode(port, mask, pin_sense);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Convert a pin ID into a its port ID.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin ID to convert
|
||||||
|
* \retval Port ID for the given pin ID
|
||||||
|
*/
|
||||||
|
static inline ioport_port_t ioport_pin_to_port_id(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return arch_ioport_pin_to_port_id(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Convert a pin ID into a bitmask mask for the given pin on its port.
|
||||||
|
*
|
||||||
|
* \param pin IOPORT pin ID to convert
|
||||||
|
* \retval Bitmask with a bit set that corresponds to the given pin ID in its port
|
||||||
|
*/
|
||||||
|
static inline ioport_port_mask_t ioport_pin_to_mask(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return arch_ioport_pin_to_mask(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page ioport_quickstart Quick start guide for the common IOPORT service
|
||||||
|
*
|
||||||
|
* This is the quick start guide for the \ref ioport_group, with
|
||||||
|
* step-by-step instructions on how to configure and use the service in a
|
||||||
|
* selection of use cases.
|
||||||
|
*
|
||||||
|
* The use cases contain several code fragments. The code fragments in the
|
||||||
|
* steps for setup can be copied into a custom initialization function, while
|
||||||
|
* the steps for usage can be copied into, e.g., the main application function.
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_basic Basic use case
|
||||||
|
* In this use case we will configure one IO pin for button input and one for
|
||||||
|
* LED control. Then it will read the button state and output it on the LED.
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_basic_setup Setup steps
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_setup_code Example code
|
||||||
|
* \code
|
||||||
|
* #define MY_LED IOPORT_CREATE_PIN(PORTA, 5)
|
||||||
|
* #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6)
|
||||||
|
*
|
||||||
|
* ioport_init();
|
||||||
|
*
|
||||||
|
* ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT);
|
||||||
|
* ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT);
|
||||||
|
* ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_setup_flow Workflow
|
||||||
|
* -# It's useful to give the GPIOs symbolic names and this can be done with
|
||||||
|
* the \ref IOPORT_CREATE_PIN macro. We define one for a LED and one for a
|
||||||
|
* button.
|
||||||
|
* - \code
|
||||||
|
* #define MY_LED IOPORT_CREATE_PIN(PORTA, 5)
|
||||||
|
* #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6)
|
||||||
|
* \endcode
|
||||||
|
* - \note The usefulness of the \ref IOPORT_CREATE_PIN macro and port names
|
||||||
|
* differ between architectures:
|
||||||
|
* - MEGA, MEGA_RF and XMEGA: Use \ref IOPORT_CREATE_PIN macro with port definitions
|
||||||
|
* PORTA, PORTB ...
|
||||||
|
* - UC3: Most convenient to pick up the device header file pin definition
|
||||||
|
* and us it directly. E.g.: AVR32_PIN_PB06
|
||||||
|
* - SAM: Most convenient to pick up the device header file pin definition
|
||||||
|
* and us it directly. E.g.: PIO_PA5_IDX<br>
|
||||||
|
* \ref IOPORT_CREATE_PIN can also be used with port definitions
|
||||||
|
* PIOA, PIOB ...
|
||||||
|
* -# Initialize the ioport service. This typically enables the IO module if
|
||||||
|
* needed.
|
||||||
|
* - \code ioport_init(); \endcode
|
||||||
|
* -# Set the LED GPIO as output:
|
||||||
|
* - \code ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT); \endcode
|
||||||
|
* -# Set the button GPIO as input:
|
||||||
|
* - \code ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT); \endcode
|
||||||
|
* -# Enable pull-up for the button GPIO:
|
||||||
|
* - \code ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP); \endcode
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_basic_usage Usage steps
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_usage_code Example code
|
||||||
|
* \code
|
||||||
|
* bool value;
|
||||||
|
*
|
||||||
|
* value = ioport_get_pin_level(MY_BUTTON);
|
||||||
|
* ioport_set_pin_level(MY_LED, value);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_usage_flow Workflow
|
||||||
|
* -# Define a boolean variable for state storage:
|
||||||
|
* - \code bool value; \endcode
|
||||||
|
* -# Read out the button level into variable value:
|
||||||
|
* - \code value = ioport_get_pin_level(MY_BUTTON); \endcode
|
||||||
|
* -# Set the LED to read out value from the button:
|
||||||
|
* - \code ioport_set_pin_level(MY_LED, value); \endcode
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_advanced Advanced use cases
|
||||||
|
* - \subpage ioport_quickstart_use_case_1 : Port access
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page ioport_quickstart_use_case_1 Advanced use case doing port access
|
||||||
|
*
|
||||||
|
* In this case we will read out the pins from one whole port and write the
|
||||||
|
* read value to another port.
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_use_case_1_setup Setup steps
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_use_case_1_setup_code Example code
|
||||||
|
* \code
|
||||||
|
* #define IN_PORT IOPORT_PORTA
|
||||||
|
* #define OUT_PORT IOPORT_PORTB
|
||||||
|
* #define MASK 0x00000060
|
||||||
|
*
|
||||||
|
* ioport_init();
|
||||||
|
*
|
||||||
|
* ioport_set_port_dir(IN_PORT, MASK, IOPORT_DIR_INPUT);
|
||||||
|
* ioport_set_port_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_setup_flow Workflow
|
||||||
|
* -# It's useful to give the ports symbolic names:
|
||||||
|
* - \code
|
||||||
|
* #define IN_PORT IOPORT_PORTA
|
||||||
|
* #define OUT_PORT IOPORT_PORTB
|
||||||
|
* \endcode
|
||||||
|
* - \note The port names differ between architectures:
|
||||||
|
* - MEGA_RF, MEGA and XMEGA: There are predefined names for ports: IOPORT_PORTA,
|
||||||
|
* IOPORT_PORTB ...
|
||||||
|
* - UC3: Use the index value of the different IO blocks: 0, 1 ...
|
||||||
|
* - SAM: There are predefined names for ports: IOPORT_PIOA, IOPORT_PIOB
|
||||||
|
* ...
|
||||||
|
* -# Also useful to define a mask for the bits to work with:
|
||||||
|
* - \code #define MASK 0x00000060 \endcode
|
||||||
|
* -# Initialize the ioport service. This typically enables the IO module if
|
||||||
|
* needed.
|
||||||
|
* - \code ioport_init(); \endcode
|
||||||
|
* -# Set one of the ports as input:
|
||||||
|
* - \code ioport_set_pin_dir(IN_PORT, MASK, IOPORT_DIR_INPUT); \endcode
|
||||||
|
* -# Set the other port as output:
|
||||||
|
* - \code ioport_set_pin_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT); \endcode
|
||||||
|
*
|
||||||
|
* \section ioport_quickstart_basic_usage Usage steps
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_usage_code Example code
|
||||||
|
* \code
|
||||||
|
* ioport_port_mask_t value;
|
||||||
|
*
|
||||||
|
* value = ioport_get_port_level(IN_PORT, MASK);
|
||||||
|
* ioport_set_port_level(OUT_PORT, MASK, value);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection ioport_quickstart_basic_usage_flow Workflow
|
||||||
|
* -# Define a variable for port date storage:
|
||||||
|
* - \code ioport_port_mask_t value; \endcode
|
||||||
|
* -# Read out from one port:
|
||||||
|
* - \code value = ioport_get_port_level(IN_PORT, MASK); \endcode
|
||||||
|
* -# Put the read data out on the other port:
|
||||||
|
* - \code ioport_set_port_level(OUT_PORT, MASK, value); \endcode
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* IOPORT_H */
|
||||||
|
|
@ -0,0 +1,302 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief SAM architecture specific IOPORT service implementation header file.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef IOPORT_SAM_H
|
||||||
|
#define IOPORT_SAM_H
|
||||||
|
|
||||||
|
#include <sysclk.h>
|
||||||
|
|
||||||
|
#define IOPORT_CREATE_PIN(port, pin) ((port) * 32 + (pin))
|
||||||
|
|
||||||
|
// Aliases
|
||||||
|
#define IOPORT_GPIOA 0
|
||||||
|
#define IOPORT_GPIOB 1
|
||||||
|
#define IOPORT_GPIOC 2
|
||||||
|
#define IOPORT_GPIOD 3
|
||||||
|
#define IOPORT_GPIOE 4
|
||||||
|
#define IOPORT_GPIOF 5
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup ioport_group
|
||||||
|
* \section ioport_modes IOPORT Modes
|
||||||
|
*
|
||||||
|
* For details on these please see the device datasheet.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** \name IOPORT Mode bit definitions */
|
||||||
|
/** @{ */
|
||||||
|
#define IOPORT_MODE_MUX_MASK (7 << 0) /*!< MUX bits mask */
|
||||||
|
#define IOPORT_MODE_MUX_BIT0 (1 << 0) /*!< MUX BIT0 mask */
|
||||||
|
#define IOPORT_MODE_MUX_BIT1 (1 << 1) /*!< MUX BIT1 mask */
|
||||||
|
#define IOPORT_MODE_MUX_A (0 << 0) /*!< MUX function A */
|
||||||
|
#define IOPORT_MODE_MUX_B (1 << 0) /*!< MUX function B */
|
||||||
|
#define IOPORT_MODE_MUX_C (2 << 0) /*!< MUX function C */
|
||||||
|
#define IOPORT_MODE_MUX_D (3 << 0) /*!< MUX function D */
|
||||||
|
|
||||||
|
#define IOPORT_MODE_MUX_BIT2 (1 << 2) /*!< MUX BIT2 mask */
|
||||||
|
#define IOPORT_MODE_MUX_E (4 << 0) /*!< MUX function E */
|
||||||
|
#define IOPORT_MODE_MUX_F (5 << 0) /*!< MUX function F */
|
||||||
|
#define IOPORT_MODE_MUX_G (6 << 0) /*!< MUX function G */
|
||||||
|
#define IOPORT_MODE_MUX_H (7 << 0) /*!< MUX function H */
|
||||||
|
|
||||||
|
#define IOPORT_MODE_PULLUP (1 << 3) /*!< Pull-up */
|
||||||
|
#define IOPORT_MODE_PULLDOWN (1 << 4) /*!< Pull-down */
|
||||||
|
#define IOPORT_MODE_GLITCH_FILTER (1 << 6) /*!< Glitch filter */
|
||||||
|
#define IOPORT_MODE_DRIVE_STRENGTH (1 << 7) /*!< Extra drive strength */
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
typedef uint32_t ioport_mode_t;
|
||||||
|
typedef uint32_t ioport_pin_t;
|
||||||
|
typedef uint32_t ioport_port_t;
|
||||||
|
typedef uint32_t ioport_port_mask_t;
|
||||||
|
|
||||||
|
__always_inline static ioport_port_t arch_ioport_pin_to_port_id(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return pin >> 5;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static volatile GpioPort *arch_ioport_port_to_base(
|
||||||
|
ioport_port_t port)
|
||||||
|
{
|
||||||
|
return (volatile GpioPort *)(GPIO_ADDR
|
||||||
|
+ port * sizeof(GpioPort));
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static volatile GpioPort *arch_ioport_pin_to_base(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return arch_ioport_port_to_base(arch_ioport_pin_to_port_id(pin));
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static ioport_port_mask_t arch_ioport_pin_to_mask(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return 1U << (pin & 0x1F);
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_init(void)
|
||||||
|
{
|
||||||
|
sysclk_enable_peripheral_clock(GPIO);
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_enable_port(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_GPERS = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_disable_port(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_GPERC = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_enable_pin(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_enable_port(arch_ioport_pin_to_port_id(pin),
|
||||||
|
arch_ioport_pin_to_mask(pin));
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_disable_pin(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_disable_port(arch_ioport_pin_to_port_id(pin),
|
||||||
|
arch_ioport_pin_to_mask(pin));
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_port_mode(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, ioport_mode_t mode)
|
||||||
|
{
|
||||||
|
volatile GpioPort *base = arch_ioport_port_to_base(port);
|
||||||
|
|
||||||
|
if (mode & IOPORT_MODE_PULLUP) {
|
||||||
|
base->GPIO_PUERS = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_PUERC = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef IOPORT_MODE_PULLDOWN
|
||||||
|
if (mode & IOPORT_MODE_PULLDOWN) {
|
||||||
|
base->GPIO_PDERS = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_PDERC = mask;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (mode & IOPORT_MODE_GLITCH_FILTER) {
|
||||||
|
base->GPIO_GFERS = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_GFERC = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef IOPORT_MODE_DRIVE_STRENGTH
|
||||||
|
if (mode & IOPORT_MODE_DRIVE_STRENGTH) {
|
||||||
|
base->GPIO_ODCR0S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_ODCR0C = mask;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (mode & IOPORT_MODE_MUX_BIT0) {
|
||||||
|
base->GPIO_PMR0S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_PMR0C = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mode & IOPORT_MODE_MUX_BIT1) {
|
||||||
|
base->GPIO_PMR1S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_PMR1C = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef IOPORT_MODE_MUX_BIT2
|
||||||
|
if (mode & IOPORT_MODE_MUX_BIT2) {
|
||||||
|
base->GPIO_PMR2S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_PMR2C = mask;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_pin_mode(ioport_pin_t pin,
|
||||||
|
ioport_mode_t mode)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_mode(arch_ioport_pin_to_port_id(pin),
|
||||||
|
arch_ioport_pin_to_mask(pin), mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_port_dir(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, unsigned char group_direction)
|
||||||
|
{
|
||||||
|
if (group_direction == IOPORT_DIR_OUTPUT) {
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_ODERS = mask;
|
||||||
|
// Always disable the Schmitt trigger for output pins.
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_STERC = mask;
|
||||||
|
} else if (group_direction == IOPORT_DIR_INPUT) {
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_ODERC = mask;
|
||||||
|
// Always enable the Schmitt trigger for input pins.
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_STERS = mask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_pin_dir(ioport_pin_t pin,
|
||||||
|
enum ioport_direction dir)
|
||||||
|
{
|
||||||
|
if (dir == IOPORT_DIR_OUTPUT) {
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_ODERS = arch_ioport_pin_to_mask(pin);
|
||||||
|
// Always disable the Schmitt trigger for output pins.
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_STERC = arch_ioport_pin_to_mask(pin);
|
||||||
|
} else if (dir == IOPORT_DIR_INPUT) {
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_ODERC = arch_ioport_pin_to_mask(pin);
|
||||||
|
// Always enable the Schmitt trigger for input pins.
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_STERS = arch_ioport_pin_to_mask(pin);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_pin_level(ioport_pin_t pin,
|
||||||
|
bool level)
|
||||||
|
{
|
||||||
|
if (level) {
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_OVRS = arch_ioport_pin_to_mask(pin);
|
||||||
|
} else {
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_OVRC = arch_ioport_pin_to_mask(pin);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_port_level(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, ioport_port_mask_t level)
|
||||||
|
{
|
||||||
|
volatile GpioPort *base = arch_ioport_port_to_base(port);
|
||||||
|
|
||||||
|
base->GPIO_OVRS = mask & level;
|
||||||
|
base->GPIO_OVRC = mask & ~level;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static bool arch_ioport_get_pin_level(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
return arch_ioport_pin_to_base(pin)->GPIO_PVR & arch_ioport_pin_to_mask(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static ioport_port_mask_t arch_ioport_get_port_level(
|
||||||
|
ioport_port_t port, ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
return arch_ioport_port_to_base(port)->GPIO_PVR & mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_toggle_pin_level(ioport_pin_t pin)
|
||||||
|
{
|
||||||
|
arch_ioport_pin_to_base(pin)->GPIO_OVRT = arch_ioport_pin_to_mask(pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_toggle_port_level(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask)
|
||||||
|
{
|
||||||
|
arch_ioport_port_to_base(port)->GPIO_OVRT = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_port_sense_mode(ioport_port_t port,
|
||||||
|
ioport_port_mask_t mask, enum ioport_sense pin_sense)
|
||||||
|
{
|
||||||
|
volatile GpioPort *base = arch_ioport_port_to_base(port);
|
||||||
|
|
||||||
|
if (pin_sense & 0x01) {
|
||||||
|
base->GPIO_IMR0S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_IMR0C = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (pin_sense & 0x02) {
|
||||||
|
base->GPIO_IMR1S = mask;
|
||||||
|
} else {
|
||||||
|
base->GPIO_IMR1C = mask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
__always_inline static void arch_ioport_set_pin_sense_mode(ioport_pin_t pin,
|
||||||
|
enum ioport_sense pin_sense)
|
||||||
|
{
|
||||||
|
arch_ioport_set_port_sense_mode(arch_ioport_pin_to_port_id(pin),
|
||||||
|
arch_ioport_pin_to_mask(pin), pin_sense);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* IOPORT_SAM_H */
|
||||||
|
|
@ -0,0 +1,50 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific sleep manager configuration
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <sleepmgr.h>
|
||||||
|
|
||||||
|
#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES];
|
||||||
|
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
|
@ -0,0 +1,124 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific sleep manager configuration
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SAM_SLEEPMGR_INCLUDED
|
||||||
|
#define SAM_SLEEPMGR_INCLUDED
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <conf_sleepmgr.h>
|
||||||
|
#include <interrupt.h>
|
||||||
|
#include "bpm.h"
|
||||||
|
#include "sleep.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup sleepmgr_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
enum sleepmgr_mode {
|
||||||
|
/** Active mode. */
|
||||||
|
SLEEPMGR_ACTIVE = 0,
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Sleep mode.
|
||||||
|
* Potential Wake Up sources: fast startup events and interrupt.
|
||||||
|
*/
|
||||||
|
SLEEPMGR_SLEEP_0,
|
||||||
|
SLEEPMGR_SLEEP_1,
|
||||||
|
SLEEPMGR_SLEEP_2,
|
||||||
|
SLEEPMGR_SLEEP_3,
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Wait mode.
|
||||||
|
* Potential Wake Up sources: fast startup events
|
||||||
|
*/
|
||||||
|
SLEEPMGR_WAIT,
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Retention mode.
|
||||||
|
* Potential Wake Up sources: fast startup events
|
||||||
|
*/
|
||||||
|
SLEEPMGR_RET,
|
||||||
|
|
||||||
|
/** Backup mode. Potential Wake Up sources: WKUPs, SM, RTT, RTC. */
|
||||||
|
SLEEPMGR_BACKUP,
|
||||||
|
|
||||||
|
SLEEPMGR_NR_OF_MODES,
|
||||||
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \internal
|
||||||
|
* \name Internal arrays
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__)
|
||||||
|
/** Sleep mode lock counters */
|
||||||
|
extern uint8_t sleepmgr_locks[];
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode)
|
||||||
|
{
|
||||||
|
Assert(sleep_mode != SLEEPMGR_ACTIVE);
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
cpu_irq_disable();
|
||||||
|
|
||||||
|
/* Enter the sleep mode. */
|
||||||
|
bpm_sleep(BPM, sleep_mode);
|
||||||
|
#else
|
||||||
|
UNUSED(sleep_mode);
|
||||||
|
cpu_irq_enable();
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* SAM_SLEEPMGR_INCLUDED */
|
||||||
|
|
@ -0,0 +1,244 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Sleep manager
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef SLEEPMGR_H
|
||||||
|
#define SLEEPMGR_H
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <parts.h>
|
||||||
|
|
||||||
|
#if (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4E)
|
||||||
|
# include "sam/sleepmgr.h"
|
||||||
|
#elif XMEGA
|
||||||
|
# include "xmega/sleepmgr.h"
|
||||||
|
#elif UC3
|
||||||
|
# include "uc3/sleepmgr.h"
|
||||||
|
#elif SAM4L
|
||||||
|
# include "sam4l/sleepmgr.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported device.
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup sleepmgr_group Sleep manager
|
||||||
|
*
|
||||||
|
* The sleep manager is a service for ensuring that the device is not put to
|
||||||
|
* sleep in deeper sleep modes than the system (e.g., peripheral drivers,
|
||||||
|
* services or the application) allows at any given time.
|
||||||
|
*
|
||||||
|
* It is based on the use of lock counting for the individual sleep modes, and
|
||||||
|
* will put the device to sleep in the shallowest sleep mode that has a non-zero
|
||||||
|
* lock count. The drivers/services/application can change these counts by use
|
||||||
|
* of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode.
|
||||||
|
* Refer to \ref sleepmgr_mode for a list of the sleep modes available for
|
||||||
|
* locking, and the device datasheet for information on their effect.
|
||||||
|
*
|
||||||
|
* The application must supply the file \ref conf_sleepmgr.h.
|
||||||
|
*
|
||||||
|
* For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE
|
||||||
|
* must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not
|
||||||
|
* defined, the functions are replaced with dummy functions and no RAM is used.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONFIG_SLEEPMGR_ENABLE
|
||||||
|
* \brief Configuration symbol for enabling the sleep manager
|
||||||
|
*
|
||||||
|
* If this symbol is not defined, the functions of this service are replaced
|
||||||
|
* with dummy functions. This is useful for reducing code size and execution
|
||||||
|
* time if the sleep manager is not needed in the application.
|
||||||
|
*
|
||||||
|
* This symbol may be defined in \ref conf_sleepmgr.h.
|
||||||
|
*/
|
||||||
|
#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE)
|
||||||
|
# define CONFIG_SLEEPMGR_ENABLE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \enum sleepmgr_mode
|
||||||
|
* \brief Sleep mode locks
|
||||||
|
*
|
||||||
|
* Identifiers for the different sleep mode locks.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Initialize the lock counts
|
||||||
|
*
|
||||||
|
* Sets all lock counts to 0, except the very last one, which is set to 1. This
|
||||||
|
* is done to simplify the algorithm for finding the deepest allowable sleep
|
||||||
|
* mode in \ref sleepmgr_enter_sleep.
|
||||||
|
*/
|
||||||
|
static inline void sleepmgr_init(void)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
uint8_t i;
|
||||||
|
|
||||||
|
for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) {
|
||||||
|
sleepmgr_locks[i] = 0;
|
||||||
|
}
|
||||||
|
sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1;
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Increase lock count for a sleep mode
|
||||||
|
*
|
||||||
|
* Increases the lock count for \a mode to ensure that the sleep manager does
|
||||||
|
* not put the device to sleep in the deeper sleep modes.
|
||||||
|
*
|
||||||
|
* \param mode Sleep mode to lock.
|
||||||
|
*/
|
||||||
|
static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
Assert(sleepmgr_locks[mode] < 0xff);
|
||||||
|
|
||||||
|
// Enter a critical section
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
|
||||||
|
++sleepmgr_locks[mode];
|
||||||
|
|
||||||
|
// Leave the critical section
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
#else
|
||||||
|
UNUSED(mode);
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Decrease lock count for a sleep mode
|
||||||
|
*
|
||||||
|
* Decreases the lock count for \a mode. If the lock count reaches 0, the sleep
|
||||||
|
* manager can put the device to sleep in the deeper sleep modes.
|
||||||
|
*
|
||||||
|
* \param mode Sleep mode to unlock.
|
||||||
|
*/
|
||||||
|
static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
irqflags_t flags;
|
||||||
|
|
||||||
|
Assert(sleepmgr_locks[mode]);
|
||||||
|
|
||||||
|
// Enter a critical section
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
|
||||||
|
--sleepmgr_locks[mode];
|
||||||
|
|
||||||
|
// Leave the critical section
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
#else
|
||||||
|
UNUSED(mode);
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Retrieves the deepest allowable sleep mode
|
||||||
|
*
|
||||||
|
* Searches through the sleep mode lock counts, starting at the shallowest sleep
|
||||||
|
* mode, until the first non-zero lock count is found. The deepest allowable
|
||||||
|
* sleep mode is then returned.
|
||||||
|
*/
|
||||||
|
static inline enum sleepmgr_mode sleepmgr_get_sleep_mode(void)
|
||||||
|
{
|
||||||
|
enum sleepmgr_mode sleep_mode = SLEEPMGR_ACTIVE;
|
||||||
|
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
uint8_t *lock_ptr = sleepmgr_locks;
|
||||||
|
|
||||||
|
// Find first non-zero lock count, starting with the shallowest modes.
|
||||||
|
while (!(*lock_ptr)) {
|
||||||
|
lock_ptr++;
|
||||||
|
sleep_mode++;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Catch the case where one too many sleepmgr_unlock_mode() call has been
|
||||||
|
// performed on the deepest sleep mode.
|
||||||
|
Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES);
|
||||||
|
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
|
||||||
|
return sleep_mode;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn sleepmgr_enter_sleep
|
||||||
|
* \brief Go to sleep in the deepest allowed mode
|
||||||
|
*
|
||||||
|
* Searches through the sleep mode lock counts, starting at the shallowest sleep
|
||||||
|
* mode, until the first non-zero lock count is found. The device is then put to
|
||||||
|
* sleep in the sleep mode that corresponds to the lock.
|
||||||
|
*
|
||||||
|
* \note This function enables interrupts before going to sleep, and will leave
|
||||||
|
* them enabled upon return. This also applies if sleep is skipped due to ACTIVE
|
||||||
|
* mode being locked.
|
||||||
|
*/
|
||||||
|
|
||||||
|
static inline void sleepmgr_enter_sleep(void)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||||
|
enum sleepmgr_mode sleep_mode;
|
||||||
|
|
||||||
|
cpu_irq_disable();
|
||||||
|
|
||||||
|
// Find the deepest allowable sleep mode
|
||||||
|
sleep_mode = sleepmgr_get_sleep_mode();
|
||||||
|
// Return right away if first mode (ACTIVE) is locked.
|
||||||
|
if (sleep_mode==SLEEPMGR_ACTIVE) {
|
||||||
|
cpu_irq_enable();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
// Enter the deepest allowable sleep mode with interrupts enabled
|
||||||
|
sleepmgr_sleep(sleep_mode);
|
||||||
|
#else
|
||||||
|
cpu_irq_enable();
|
||||||
|
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#endif /* SLEEPMGR_H */
|
||||||
|
|
@ -0,0 +1,139 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Global interrupt management for 8- and 32-bit AVR
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef UTILS_INTERRUPT_H
|
||||||
|
#define UTILS_INTERRUPT_H
|
||||||
|
|
||||||
|
#include <parts.h>
|
||||||
|
|
||||||
|
#if XMEGA || MEGA || TINY
|
||||||
|
# include "interrupt/interrupt_avr8.h"
|
||||||
|
#elif UC3
|
||||||
|
# include "interrupt/interrupt_avr32.h"
|
||||||
|
#elif SAM3S || SAM3N || SAM3XA || SAM3U || SAM4S || SAM4L || SAM4E
|
||||||
|
# include "interrupt/interrupt_sam_nvic.h"
|
||||||
|
#else
|
||||||
|
# error Unsupported device.
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup interrupt_group Global interrupt management
|
||||||
|
*
|
||||||
|
* This is a driver for global enabling and disabling of interrupts.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* \def CONFIG_INTERRUPT_FORCE_INTC
|
||||||
|
* \brief Force usage of the ASF INTC driver
|
||||||
|
*
|
||||||
|
* Predefine this symbol when preprocessing to force the use of the ASF INTC driver.
|
||||||
|
* This is useful to ensure compatibilty accross compilers and shall be used only when required
|
||||||
|
* by the application needs.
|
||||||
|
*/
|
||||||
|
# define CONFIG_INTERRUPT_FORCE_INTC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//! \name Global interrupt flags
|
||||||
|
//@{
|
||||||
|
/**
|
||||||
|
* \typedef irqflags_t
|
||||||
|
* \brief Type used for holding state of interrupt flag
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def cpu_irq_enable
|
||||||
|
* \brief Enable interrupts globally
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def cpu_irq_disable
|
||||||
|
* \brief Disable interrupts globally
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn irqflags_t cpu_irq_save(void)
|
||||||
|
* \brief Get and clear the global interrupt flags
|
||||||
|
*
|
||||||
|
* Use in conjunction with \ref cpu_irq_restore.
|
||||||
|
*
|
||||||
|
* \return Current state of interrupt flags.
|
||||||
|
*
|
||||||
|
* \note This function leaves interrupts disabled.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn void cpu_irq_restore(irqflags_t flags)
|
||||||
|
* \brief Restore global interrupt flags
|
||||||
|
*
|
||||||
|
* Use in conjunction with \ref cpu_irq_save.
|
||||||
|
*
|
||||||
|
* \param flags State to set interrupt flag to.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \fn bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||||
|
* \brief Check if interrupts are globally enabled in supplied flags
|
||||||
|
*
|
||||||
|
* \param flags Currents state of interrupt flags.
|
||||||
|
*
|
||||||
|
* \return True if interrupts are enabled.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def cpu_irq_is_enabled
|
||||||
|
* \brief Check if interrupts are globally enabled
|
||||||
|
*
|
||||||
|
* \return True if interrupts are enabled.
|
||||||
|
*/
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \ingroup interrupt_group
|
||||||
|
* \defgroup interrupt_deprecated_group Deprecated interrupt definitions
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* UTILS_INTERRUPT_H */
|
||||||
|
|
@ -0,0 +1,47 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Global interrupt management for SAM3 and SAM4 (NVIC based)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "interrupt_sam_nvic.h"
|
||||||
|
|
||||||
|
//! Global NVIC interrupt enable status (by default it's enabled)
|
||||||
|
volatile bool g_interrupt_enabled = true;
|
||||||
|
|
@ -0,0 +1,169 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Global interrupt management for SAM3 and SAM4 (NVIC based)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef UTILS_INTERRUPT_INTERRUPT_H
|
||||||
|
#define UTILS_INTERRUPT_INTERRUPT_H
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
#include <parts.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup interrupt_group
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Interrupt Service Routine definition
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Define service routine
|
||||||
|
*
|
||||||
|
* \note For NVIC devices the interrupt service routines are predefined to
|
||||||
|
* add to vector table in binary generation, so there is no service
|
||||||
|
* register at run time. The routine collections are in exceptions.h.
|
||||||
|
*
|
||||||
|
* Usage:
|
||||||
|
* \code
|
||||||
|
* ISR(foo_irq_handler)
|
||||||
|
* {
|
||||||
|
* // Function definition
|
||||||
|
* ...
|
||||||
|
* }
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \param func Name for the function.
|
||||||
|
*/
|
||||||
|
# define ISR(func) \
|
||||||
|
void func (void)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Initialize interrupt vectors
|
||||||
|
*
|
||||||
|
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||||
|
* to do to initialize them, except defined the vector function with
|
||||||
|
* right name.
|
||||||
|
*
|
||||||
|
* This must be called prior to \ref irq_register_handler.
|
||||||
|
*/
|
||||||
|
# define irq_initialize_vectors() \
|
||||||
|
do { \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Register handler for interrupt
|
||||||
|
*
|
||||||
|
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||||
|
* to do to register them, except defined the vector function with
|
||||||
|
* right name.
|
||||||
|
*
|
||||||
|
* Usage:
|
||||||
|
* \code
|
||||||
|
* irq_initialize_vectors();
|
||||||
|
* irq_register_handler(foo_irq_handler);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \note The function \a func must be defined with the \ref ISR macro.
|
||||||
|
* \note The functions prototypes can be found in the device exception header
|
||||||
|
* files (exceptions.h).
|
||||||
|
*/
|
||||||
|
# define irq_register_handler(int_num, int_prio) \
|
||||||
|
NVIC_ClearPendingIRQ( (IRQn_Type)int_num); \
|
||||||
|
NVIC_SetPriority( (IRQn_Type)int_num, int_prio); \
|
||||||
|
NVIC_EnableIRQ( (IRQn_Type)int_num); \
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
# define cpu_irq_enable() \
|
||||||
|
do { \
|
||||||
|
g_interrupt_enabled = true; \
|
||||||
|
__DMB(); \
|
||||||
|
__enable_irq(); \
|
||||||
|
} while (0)
|
||||||
|
# define cpu_irq_disable() \
|
||||||
|
do { \
|
||||||
|
__disable_irq(); \
|
||||||
|
__DMB(); \
|
||||||
|
g_interrupt_enabled = false; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
typedef uint32_t irqflags_t;
|
||||||
|
extern volatile bool g_interrupt_enabled;
|
||||||
|
|
||||||
|
static inline irqflags_t cpu_irq_save(void)
|
||||||
|
{
|
||||||
|
irqflags_t flags = g_interrupt_enabled;
|
||||||
|
cpu_irq_disable();
|
||||||
|
return flags;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||||
|
{
|
||||||
|
return (flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void cpu_irq_restore(irqflags_t flags)
|
||||||
|
{
|
||||||
|
if (cpu_irq_is_enabled_flags(flags))
|
||||||
|
cpu_irq_enable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#define cpu_irq_is_enabled() g_interrupt_enabled
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \weakgroup interrupt_deprecated_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define Enable_global_interrupt() cpu_irq_enable()
|
||||||
|
#define Disable_global_interrupt() cpu_irq_disable()
|
||||||
|
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//@}
|
||||||
|
|
||||||
|
#endif /* UTILS_INTERRUPT_INTERRUPT_H */
|
||||||
|
|
@ -0,0 +1,889 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Atmel part identification macros
|
||||||
|
*
|
||||||
|
* Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef ATMEL_PARTS_H
|
||||||
|
#define ATMEL_PARTS_H
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup part_macros_group Atmel part identification macros
|
||||||
|
*
|
||||||
|
* This collection of macros identify which series and families that the various
|
||||||
|
* Atmel parts belong to. These can be used to select part-dependent sections of
|
||||||
|
* code at compile time.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Convenience macros for part checking
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* ! Check GCC and IAR part definition for 8-bit AVR */
|
||||||
|
#define AVR8_PART_IS_DEFINED(part) \
|
||||||
|
(defined(__ ## part ## __) || defined(__AVR_ ## part ## __))
|
||||||
|
|
||||||
|
/* ! Check GCC and IAR part definition for 32-bit AVR */
|
||||||
|
#define AVR32_PART_IS_DEFINED(part) \
|
||||||
|
(defined(__AT32 ## part ## __) || defined(__AVR32_ ## part ## __))
|
||||||
|
|
||||||
|
/* ! Check GCC and IAR part definition for SAM */
|
||||||
|
#define SAM_PART_IS_DEFINED(part) (defined(__ ## part ## __))
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup uc3_part_macros_group AVR UC3 parts
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 A series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define UC3A0 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A0128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A0256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A0512) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3A1 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A1128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A1256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A1512) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3A3 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A364) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A364S) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A3128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A3128S) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A3256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A3256S) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3A4 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A464) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A464S) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A4128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A4128S) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A4256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3A4256S) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 B series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define UC3B0 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B064) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B0128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B0256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B0512) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3B1 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B164) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B1128) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B1256) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3B1512) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 C series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define UC3C0 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C064C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C0128C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C0256C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C0512C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3C1 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C164C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C1128C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C1256C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C1512C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3C2 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C264C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C2128C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C2256C) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3C2512C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 D series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define UC3D3 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC64D3) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC128D3) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3D4 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC64D4) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC128D4) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 L series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define UC3L0 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3L016) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3L032) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3L064) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3L0128 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3L0128) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3L0256 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC3L0256) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3L3 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC64L3U) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC128L3U) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC256L3U) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3L4 ( \
|
||||||
|
AVR32_PART_IS_DEFINED(UC64L4U) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC128L4U) || \
|
||||||
|
AVR32_PART_IS_DEFINED(UC256L4U) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define UC3L3_L4 (UC3L3 || UC3L4)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR UC3 families
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** AVR UC3 A family */
|
||||||
|
#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4)
|
||||||
|
|
||||||
|
/** AVR UC3 B family */
|
||||||
|
#define UC3B (UC3B0 || UC3B1)
|
||||||
|
|
||||||
|
/** AVR UC3 C family */
|
||||||
|
#define UC3C (UC3C0 || UC3C1 || UC3C2)
|
||||||
|
|
||||||
|
/** AVR UC3 D family */
|
||||||
|
#define UC3D (UC3D3 || UC3D4)
|
||||||
|
|
||||||
|
/** AVR UC3 L family */
|
||||||
|
#define UC3L (UC3L0 || UC3L0128 || UC3L0256 || UC3L3_L4)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** AVR UC3 product line */
|
||||||
|
#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup xmega_part_macros_group AVR XMEGA parts
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA A series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_A1 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64A1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128A1) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A3 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64A3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128A3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega192A3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256A3) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A3B ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256A3B) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A4 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega16A4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega32A4) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA AU series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_A1U ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64A1U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128A1U) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A3U ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64A3U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128A3U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega192A3U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256A3U) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A3BU ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256A3BU) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_A4U ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega16A4U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega32A4U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64A4U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128A4U) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA B series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_B1 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64B1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128B1) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_B3 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64B3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128B3) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA C series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_C3 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega384C3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256C3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega192C3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128C3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64C3) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_C4 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega32C4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega16C4) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA D series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_D3 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64D3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128D3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega192D3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega256D3) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega384D3) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define XMEGA_D4 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega16D4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega32D4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega64D4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega128D4) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA E series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define XMEGA_E5 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega8E5) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega16E5) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATxmega32E5) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name AVR XMEGA families
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** AVR XMEGA A family */
|
||||||
|
#define XMEGA_A (XMEGA_A1 || XMEGA_A3 || XMEGA_A3B || XMEGA_A4)
|
||||||
|
|
||||||
|
/** AVR XMEGA AU family */
|
||||||
|
#define XMEGA_AU (XMEGA_A1U || XMEGA_A3U || XMEGA_A3BU || XMEGA_A4U)
|
||||||
|
|
||||||
|
/** AVR XMEGA B family */
|
||||||
|
#define XMEGA_B (XMEGA_B1 || XMEGA_B3)
|
||||||
|
|
||||||
|
/** AVR XMEGA C family */
|
||||||
|
#define XMEGA_C (XMEGA_C3 || XMEGA_C4)
|
||||||
|
|
||||||
|
/** AVR XMEGA D family */
|
||||||
|
#define XMEGA_D (XMEGA_D3 || XMEGA_D4)
|
||||||
|
|
||||||
|
/** AVR XMEGA E family */
|
||||||
|
#define XMEGA_E (XMEGA_E5)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
|
||||||
|
/** AVR XMEGA product line */
|
||||||
|
#define XMEGA (XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup mega_part_macros_group megaAVR parts
|
||||||
|
*
|
||||||
|
* \note These megaAVR groupings are based on the groups in AVR Libc for the
|
||||||
|
* part header files. They are not names of official megaAVR device series or
|
||||||
|
* families.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name ATmegaxx0/xx1 subgroups
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define MEGA_XX0 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega640) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega1280) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega2560) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define MEGA_XX1 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega1281) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega2561) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name megaAVR groups
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** ATmegaxx0/xx1 group */
|
||||||
|
#define MEGA_XX0_1 (MEGA_XX0 || MEGA_XX1)
|
||||||
|
|
||||||
|
/** ATmegaxx4 group */
|
||||||
|
#define MEGA_XX4 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega164A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega164PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega324A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega324PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega1284P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128RFA1) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx4 group */
|
||||||
|
#define MEGA_XX4_A ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega164A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega164PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega324A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega324PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega1284P) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx8 group */
|
||||||
|
#define MEGA_XX8 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega328) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega328P) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx8A/P/PA group */
|
||||||
|
#define MEGA_XX8_A ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega328P) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx group */
|
||||||
|
#define MEGA_XX ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128A) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxxA/P/PA group */
|
||||||
|
#define MEGA_XX_A ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128A) \
|
||||||
|
)
|
||||||
|
/** ATmegaxxRFA1 group */
|
||||||
|
#define MEGA_RFA1 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128RFA1) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxxRFR2 group */
|
||||||
|
#define MEGA_RFR2 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64RFR2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128RFR2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega256RFR2) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxxRFxx group */
|
||||||
|
#define MEGA_RF (MEGA_RFA1 || MEGA_RFR2)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name ATmegaxx_un0/un1/un2 subgroups
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define MEGA_XX_UN0 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32A) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx group without power reduction and
|
||||||
|
* And interrupt sense register.
|
||||||
|
*/
|
||||||
|
#define MEGA_XX_UN1 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega128A) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** ATmegaxx group without power reduction and
|
||||||
|
* And interrupt sense register.
|
||||||
|
*/
|
||||||
|
#define MEGA_XX_UN2 ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega169P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega169PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega329P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega329PA) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** Devices added to complete megaAVR offering.
|
||||||
|
* Please do not use this group symbol as it is not intended
|
||||||
|
* to be permanent: the devices should be regrouped.
|
||||||
|
*/
|
||||||
|
#define MEGA_UNCATEGORIZED ( \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90CAN128) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90CAN32) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90CAN64) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM216) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM2B) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM316) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM3B) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90PWM81) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB1286) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB1287) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB162) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB646) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB647) || \
|
||||||
|
AVR8_PART_IS_DEFINED(AT90USB82) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega1284) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega162) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega164P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega165A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega165P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega165PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega168P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega169A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16M1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16U2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega16U4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega2564RFR2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega256RFA2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega324P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega325) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3250) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3250A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3250P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3250PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega325A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega325P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega325PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega329) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3290) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3290A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3290P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega3290PA) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega329A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32M1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32U2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega32U4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega48P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega644P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega645) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6450) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6450A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6450P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega645A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega645P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega649) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6490) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6490A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega6490P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega649A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega649P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64M1) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega64RFA2) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega8) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega8515) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega8535) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega88P) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega8A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATmega8U2) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** Unspecified group */
|
||||||
|
#define MEGA_UNSPECIFIED (MEGA_XX_UN0 || MEGA_XX_UN1 || MEGA_XX_UN2 || \
|
||||||
|
MEGA_UNCATEGORIZED)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** megaAVR product line */
|
||||||
|
#define MEGA (MEGA_XX0_1 || MEGA_XX4 || MEGA_XX8 || MEGA_XX || MEGA_RF || \
|
||||||
|
MEGA_UNSPECIFIED)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup tiny_part_macros_group tinyAVR parts
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name tinyAVR groups
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** Devices added to complete tinyAVR offering.
|
||||||
|
* Please do not use this group symbol as it is not intended
|
||||||
|
* to be permanent: the devices should be regrouped.
|
||||||
|
*/
|
||||||
|
#define TINY_UNCATEGORIZED ( \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny10) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny13) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny13A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny1634) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny167) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny20) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny2313) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny2313A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny24) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny24A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny25) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny26) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny261) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny261A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny4) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny40) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny4313) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny43U) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny44) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny44A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny45) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny461) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny461A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny48) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny5) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny828) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny84) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny84A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny85) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny861) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny861A) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny87) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny88) || \
|
||||||
|
AVR8_PART_IS_DEFINED(ATtiny9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** tinyAVR product line */
|
||||||
|
#define TINY (TINY_UNCATEGORIZED)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup sam_part_macros_group SAM parts
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM3S series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM3S1 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S1A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S1B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S1C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3S2 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S2A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S2B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S2C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3S4 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S4A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S4B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S4C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3S8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S8B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3S8C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3SD8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3SD8B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3SD8C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM3U series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM3U1 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U1C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U1E) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3U2 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U2C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U2E) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3U4 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U4C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3U4E) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM3N series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM3N1 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N1A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N1B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N1C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3N2 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N2A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N2B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N2C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3N4 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N4A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N4B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3N4C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM3X series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM3X4 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3X4C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3X4E) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3X8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3X8C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3X8E) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3X8H) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM3A series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM3A4 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3A4C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM3A8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM3A8C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM4S series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM4S8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4S8B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4S8C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4S16 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4S16B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4S16C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4SA16 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SA16B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SA16C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4SD16 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SD16B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SD16C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4SD32 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SD32B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4SD32C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM4L series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM4LS ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS2A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS2B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS2C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS4A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS4B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LS4C) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4LC ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC2A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC2B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC2C) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC4A) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC4B) || \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4LC4C) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM4E series
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAM4E8 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4E8E) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define SAM4E16 ( \
|
||||||
|
SAM_PART_IS_DEFINED(SAM4E16E) \
|
||||||
|
)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name SAM families
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** SAM3S Family */
|
||||||
|
#define SAM3S (SAM3S1 || SAM3S2 || SAM3S4 || SAM3S8 || SAM3SD8)
|
||||||
|
|
||||||
|
/** SAM3U Family */
|
||||||
|
#define SAM3U (SAM3U1 || SAM3U2 || SAM3U4)
|
||||||
|
|
||||||
|
/** SAM3N Family */
|
||||||
|
#define SAM3N (SAM3N1 || SAM3N2 || SAM3N4)
|
||||||
|
|
||||||
|
/** SAM3XA Family */
|
||||||
|
#define SAM3XA (SAM3X4 || SAM3X8 || SAM3A4 || SAM3A8)
|
||||||
|
|
||||||
|
/** SAM4S Family */
|
||||||
|
#define SAM4S (SAM4S8 || SAM4S16 || SAM4SA16 || SAM4SD16 || SAM4SD32)
|
||||||
|
|
||||||
|
/** SAM4L Family */
|
||||||
|
#define SAM4L (SAM4LS || SAM4LC)
|
||||||
|
|
||||||
|
/** SAM4E Family */
|
||||||
|
#define SAM4E (SAM4E8 || SAM4E16)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** SAM product line */
|
||||||
|
#define SAM (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4L || SAM4E)
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
#endif /* ATMEL_PARTS_H */
|
||||||
|
|
@ -0,0 +1,220 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief SAM4L-EK Board init.
|
||||||
|
*
|
||||||
|
* This file contains board initialization function.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include "compiler.h"
|
||||||
|
#include "sam4l_ek.h"
|
||||||
|
#include "conf_board.h"
|
||||||
|
#include "ioport.h"
|
||||||
|
#include "board.h"
|
||||||
|
/**
|
||||||
|
* \addtogroup sam4l_ek_group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set peripheral mode for one single IOPORT pin.
|
||||||
|
* It will configure port mode and disable pin mode (but enable peripheral).
|
||||||
|
* \param pin IOPORT pin to configure
|
||||||
|
* \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
|
||||||
|
*/
|
||||||
|
#define ioport_set_pin_peripheral_mode(pin, mode) \
|
||||||
|
do {\
|
||||||
|
ioport_set_pin_mode(pin, mode);\
|
||||||
|
ioport_disable_pin(pin);\
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
void board_init(void)
|
||||||
|
{
|
||||||
|
// Initialize IOPORTs
|
||||||
|
ioport_init();
|
||||||
|
|
||||||
|
// Put all pins to default state (input & pull-up)
|
||||||
|
uint32_t pin;
|
||||||
|
|
||||||
|
for (pin = PIN_PA00; pin <= PIN_PC31; pin ++) {
|
||||||
|
// Skip output pins to configure later
|
||||||
|
if (pin == LED0_GPIO || pin == LCD_BL_GPIO
|
||||||
|
#ifdef CONF_BOARD_RS485
|
||||||
|
|| pin == RS485_USART_CTS_PIN
|
||||||
|
#endif
|
||||||
|
/* PA02 is not configured as it is driven by hardware
|
||||||
|
configuration */
|
||||||
|
|| pin == PIN_PA02) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
ioport_set_pin_dir(pin, IOPORT_DIR_INPUT);
|
||||||
|
ioport_set_pin_mode(pin, IOPORT_MODE_PULLUP);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure the pins connected to LEDs as output and set their
|
||||||
|
* default initial state to high (LEDs off).
|
||||||
|
*/
|
||||||
|
ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT);
|
||||||
|
ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL);
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_EIC
|
||||||
|
// Set push button as external interrupt pin
|
||||||
|
ioport_set_pin_peripheral_mode(GPIO_PUSH_BUTTON_EIC_PIN,
|
||||||
|
GPIO_PUSH_BUTTON_EIC_PIN_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(GPIO_UNIT_TEST_EIC_PIN,
|
||||||
|
GPIO_UNIT_TEST_EIC_PIN_MUX);
|
||||||
|
#else
|
||||||
|
// Push button as input: already done, it's the default pin state
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (defined CONF_BOARD_BL)
|
||||||
|
// Configure LCD backlight
|
||||||
|
ioport_set_pin_dir(LCD_BL_GPIO, IOPORT_DIR_OUTPUT);
|
||||||
|
ioport_set_pin_level(LCD_BL_GPIO, LCD_BL_INACTIVE_LEVEL);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (defined CONF_BOARD_USB_PORT)
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PA25A_USBC_DM, MUX_PA25A_USBC_DM);
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PA26A_USBC_DP, MUX_PA26A_USBC_DP);
|
||||||
|
# if defined(CONF_BOARD_USB_VBUS_DETECT)
|
||||||
|
# if defined(USB_VBUS_EIC)
|
||||||
|
ioport_set_pin_peripheral_mode(USB_VBUS_EIC,
|
||||||
|
USB_VBUS_EIC_MUX|USB_VBUS_FLAGS);
|
||||||
|
# elif defined(USB_VBUS_PIN)
|
||||||
|
ioport_set_pin_dir(USB_VBUS_PIN, IOPORT_DIR_INPUT);
|
||||||
|
# else
|
||||||
|
# warning USB_VBUS pin not defined
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
# if defined(CONF_BOARD_USB_ID_DETECT)
|
||||||
|
# if defined(USB_ID_EIC)
|
||||||
|
ioport_set_pin_peripheral_mode(USB_ID_EIC,
|
||||||
|
USB_ID_EIC_MUX|USB_ID_FLAGS);
|
||||||
|
# elif defined(USB_ID_PIN)
|
||||||
|
ioport_set_pin_dir(USB_ID_PIN, IOPORT_DIR_INPUT);
|
||||||
|
# else
|
||||||
|
# warning USB_ID pin not defined
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
# if defined(CONF_BOARD_USB_VBUS_CONTROL)
|
||||||
|
# if defined(USB_VBOF_PIN)
|
||||||
|
ioport_set_pin_dir(USB_VBOF_PIN, IOPORT_DIR_OUTPUT);
|
||||||
|
ioport_set_pin_level(USB_VBOF_PIN, USB_VBOF_INACTIVE_LEVEL);
|
||||||
|
# else
|
||||||
|
# warning USB_VBOF pin not defined
|
||||||
|
# endif
|
||||||
|
# if defined(CONF_BOARD_USB_VBUS_ERR_DETECT)
|
||||||
|
# if defined(USB_VBERR_EIC)
|
||||||
|
ioport_set_pin_peripheral_mode(USB_VBERR_EIC,
|
||||||
|
USB_VBERR_EIC_MUX|USB_VBERR_FLAGS);
|
||||||
|
# elif defined(USB_VBERR_PIN)
|
||||||
|
ioport_set_pin_dir(USB_VBERR_PIN, IOPORT_DIR_INPUT);
|
||||||
|
# else
|
||||||
|
# warning USB_VBERR pin not defined
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
# endif /* !(defined CONF_BOARD_USB_NO_VBUS_CONTROL) */
|
||||||
|
#endif /* (defined CONF_BOARD_USB_PORT) */
|
||||||
|
|
||||||
|
#if defined (CONF_BOARD_COM_PORT)
|
||||||
|
ioport_set_pin_peripheral_mode(COM_PORT_RX_PIN, COM_PORT_RX_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(COM_PORT_TX_PIN, COM_PORT_TX_MUX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined (CONF_BOARD_BM_USART)
|
||||||
|
ioport_set_pin_peripheral_mode(BM_USART_RX_PIN, BM_USART_RX_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(BM_USART_TX_PIN, BM_USART_TX_MUX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_SPI
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PC04A_SPI_MISO, MUX_PC04A_SPI_MISO);
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PC05A_SPI_MOSI, MUX_PC05A_SPI_MOSI);
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PC06A_SPI_SCK, MUX_PC06A_SPI_SCK);
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_SPI_NPCS0
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PA02B_SPI_NPCS0,
|
||||||
|
MUX_PA02B_SPI_NPCS0);
|
||||||
|
#endif
|
||||||
|
#ifdef CONF_BOARD_SPI_NPCS2
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PC00A_SPI_NPCS2,
|
||||||
|
MUX_PC00A_SPI_NPCS2);
|
||||||
|
#endif
|
||||||
|
#ifdef CONF_BOARD_SPI_NPCS3
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PC01A_SPI_NPCS3,
|
||||||
|
MUX_PC01A_SPI_NPCS3);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_RS485
|
||||||
|
ioport_set_pin_peripheral_mode(RS485_USART_RX_PIN, RS485_USART_RX_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(RS485_USART_TX_PIN, RS485_USART_TX_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(RS485_USART_RTS_PIN,
|
||||||
|
RS485_USART_RTS_MUX);
|
||||||
|
ioport_set_pin_dir(RS485_USART_CTS_PIN, IOPORT_DIR_OUTPUT);
|
||||||
|
ioport_set_pin_level(RS485_USART_CTS_PIN, IOPORT_PIN_LEVEL_LOW);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_TWIMS1
|
||||||
|
ioport_set_pin_peripheral_mode(TWIMS1_TWI_SCL_PIN, TWIMS1_TWI_SCL_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(TWIMS1_TWI_SDA_PIN, TWIMS1_TWI_SDA_MUX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_USART0
|
||||||
|
ioport_set_pin_peripheral_mode(USART0_RX_PIN, USART0_RX_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(USART0_TX_PIN, USART0_TX_MUX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_DACC_VOUT
|
||||||
|
ioport_set_pin_peripheral_mode(DACC_VOUT_PIN, DACC_VOUT_MUX);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_ACIFC
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PA06E_ACIFC_ACAN0, MUX_PA06E_ACIFC_ACAN0);
|
||||||
|
ioport_set_pin_peripheral_mode(PIN_PA07E_ACIFC_ACAP0, MUX_PA07E_ACIFC_ACAP0);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONF_BOARD_ABDACB_PORT
|
||||||
|
ioport_set_pin_peripheral_mode(ABDACB_AUDIO0_PIN, ABDACB_AUDIO0_MUX);
|
||||||
|
ioport_set_pin_peripheral_mode(ABDACB_AUDIO1_PIN, ABDACB_AUDIO1_MUX);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
@ -0,0 +1,309 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief SAM4L-EK Board header file.
|
||||||
|
*
|
||||||
|
* This file contains definitions and services related to the features of the
|
||||||
|
* SAM4L-EK Board.
|
||||||
|
*
|
||||||
|
* To use this board define BOARD=SAM4L_EK.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef SAM4L_EK_INCLUDED
|
||||||
|
#define SAM4L_EK_INCLUDED
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
|
||||||
|
/** Name of the board */
|
||||||
|
#define BOARD_NAME "SAM4L-EK"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup sam4l_ek_group SAM4L-EK Board
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup sam4l_ek_feature_group Feature definitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! \name Miscellaneous data
|
||||||
|
//@{
|
||||||
|
//@}
|
||||||
|
|
||||||
|
//! Osc frequency (Hz.) and startup time (RCOsc periods).
|
||||||
|
#define FOSC0 (12000000)
|
||||||
|
|
||||||
|
//! Osc32 frequency (Hz.) and startup time (RCOsc periods).
|
||||||
|
#define FOSC32 (32768)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Board oscillator configuration
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
#define BOARD_OSC32_IS_XTAL true
|
||||||
|
#define BOARD_OSC32_HZ FOSC32
|
||||||
|
#define BOARD_OSC32_STARTUP_US (1100000)
|
||||||
|
#define BOARD_OSC32_SELCURR BSCIF_OSCCTRL32_SELCURR(10)
|
||||||
|
#define BOARD_OSC0_IS_XTAL true
|
||||||
|
#define BOARD_OSC0_HZ FOSC0
|
||||||
|
#define BOARD_OSC0_STARTUP_US (1100)
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/*! \name Number of LEDs.
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define LED_COUNT 1
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name LEDs
|
||||||
|
*
|
||||||
|
* LED0 is a single yellow LED that is active low.
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
#define LED0 PC10
|
||||||
|
#define LED0_GPIO PIN_PC10
|
||||||
|
#define LED0_GPIO_MASK GPIO_PC10
|
||||||
|
#if defined(SAM4L_EK_REV1)
|
||||||
|
# define LED0_ACTIVE_LEVEL IOPORT_PIN_LEVEL_LOW
|
||||||
|
# define LED0_INACTIVE_LEVEL IOPORT_PIN_LEVEL_HIGH
|
||||||
|
#else
|
||||||
|
# define LED0_ACTIVE_LEVEL IOPORT_PIN_LEVEL_HIGH
|
||||||
|
# define LED0_INACTIVE_LEVEL IOPORT_PIN_LEVEL_LOW
|
||||||
|
#endif
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name LCD Backlight
|
||||||
|
*/
|
||||||
|
//@{
|
||||||
|
#if defined(SAM4L_EK_REV1)
|
||||||
|
# define LCD_BL PA02
|
||||||
|
# define LCD_BL_GPIO PIN_PA02
|
||||||
|
# define LCD_BL_GPIO_MASK GPIO_PA02
|
||||||
|
#else
|
||||||
|
# define LCD_BL PC14
|
||||||
|
# define LCD_BL_GPIO PIN_PC14
|
||||||
|
# define LCD_BL_GPIO_MASK GPIO_PC14
|
||||||
|
#endif
|
||||||
|
#define LCD_BL_ACTIVE_LEVEL IOPORT_PIN_LEVEL_HIGH
|
||||||
|
#define LCD_BL_INACTIVE_LEVEL IOPORT_PIN_LEVEL_LOW
|
||||||
|
//@}
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of Push Buttons
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define GPIO_PUSH_BUTTON_0 PIN_PC03
|
||||||
|
#define GPIO_PUSH_BUTTON_0_MASK GPIO_PC03
|
||||||
|
#define PUSH_BUTTON_0_DOWN_LEVEL IOPORT_PIN_LEVEL_LOW
|
||||||
|
#define PUSH_BUTTON_0_UP_LEVEL IOPORT_PIN_LEVEL_HIGH
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name Push Button Connection on External Interrupt line
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define GPIO_PUSH_BUTTON_EIC_PIN PIN_PC03B_EIC_EXTINT5
|
||||||
|
#define GPIO_PUSH_BUTTON_EIC_PIN_MASK GPIO_PC03B_EIC_EXTINT5
|
||||||
|
#define GPIO_PUSH_BUTTON_EIC_PIN_MUX MUX_PC03B_EIC_EXTINT5
|
||||||
|
#define GPIO_PUSH_BUTTON_EIC_LINE 5
|
||||||
|
|
||||||
|
#define GPIO_UNIT_TEST_EIC_PIN PIN_PA06C_EIC_EXTINT1
|
||||||
|
#define GPIO_UNIT_TEST_EIC_PIN_MASK GPIO_PA06C_EIC_EXTINT1
|
||||||
|
#define GPIO_UNIT_TEST_EIC_PIN_MUX MUX_PA06C_EIC_EXTINT1
|
||||||
|
#define GPIO_UNIT_TEST_EIC_LINE 1
|
||||||
|
|
||||||
|
#define GPIO_EIC_TRIG_PIN PIN_PB05
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of Touch sensors
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define GPIO_QTOUCH_SLIDER_0 PIN_PB02
|
||||||
|
#define GPIO_QTOUCH_SLIDER_0_MASK GPIO_PB02
|
||||||
|
#define GPIO_QTOUCH_SLIDER_0_MUX MUX_PB02G_CATB_SENSE23
|
||||||
|
#define GPIO_QTOUCH_SLIDER_1 PIN_PA04
|
||||||
|
#define GPIO_QTOUCH_SLIDER_1_MASK GPIO_PA04
|
||||||
|
#define GPIO_QTOUCH_SLIDER_1_MUX MUX_PA04G_CATB_SENSE0
|
||||||
|
#define GPIO_QTOUCH_SLIDER_2 PIN_PA05
|
||||||
|
#define GPIO_QTOUCH_SLIDER_2_MASK GPIO_PA05
|
||||||
|
#define GPIO_QTOUCH_SLIDER_2_MUX MUX_PA05G_CATB_SENSE1
|
||||||
|
#define GPIO_QTOUCH_DISCHARGE PIN_PB03
|
||||||
|
#define GPIO_QTOUCH_DISCHARGE_MASK GPIO_PB03
|
||||||
|
#define GPIO_QTOUCH_DISCHARGE_MUX MUX_PB03G_CATB_DIS
|
||||||
|
#define GPIO_QTOUCH_BUTTON PIN_PB04
|
||||||
|
#define GPIO_QTOUCH_BUTTON_MASK GPIO_PB04
|
||||||
|
#define GPIO_QTOUCH_BUTTON_MUX MUX_PB04G_CATB_SENSE24
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name Touch sensors pin assignements
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define QTOUCH_PINSEL_SLIDER_0 23
|
||||||
|
#define QTOUCH_PINSEL_SLIDER_1 0
|
||||||
|
#define QTOUCH_PINSEL_SLIDER_2 1
|
||||||
|
#define QTOUCH_PINSEL_BUTTON 24
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of SAM4L4C VBUS monitoring
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#if defined(SAM4L_EK_REV1)
|
||||||
|
#define USB_VBUS_FLAGS IOPORT_MODE_GLITCH_FILTER
|
||||||
|
#define USB_VBUS_PIN PIN_PC14 /* As IO pin input */
|
||||||
|
/* No EIC for VBus pin */
|
||||||
|
#elif 0 // The Vbus monitoring can not be used on SAM4L_EK Rev. 2
|
||||||
|
#define USB_VBUS_FLAGS IOPORT_MODE_GLITCH_FILTER
|
||||||
|
#define USB_VBUS_EIC PIN_PA06C_EIC_EXTINT1 /* As EIC input */
|
||||||
|
#define USB_VBUS_EIC_MUX IOPORT_MODE_MUX_C
|
||||||
|
#define USB_VBUS_EIC_LINE 1
|
||||||
|
#define USB_VBUS_EIC_IRQn EIC_1_IRQn
|
||||||
|
#endif
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of SAM4L4C VBUS Power Control
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define USB_VBOF_PIN PIN_PC08 /* As IO pin output */
|
||||||
|
#define USB_VBOF_ACTIVE_LEVEL 0
|
||||||
|
#define USB_VBOF_INACTIVE_LEVEL 1
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of SAM4L4C VBUS error detecting
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define USB_VBERR_FLAGS IOPORT_MODE_PULLUP | IOPORT_MODE_GLITCH_FILTER
|
||||||
|
#define USB_VBERR_PIN PIN_PC07 /* As IO pin input */
|
||||||
|
/* No EIC for VBErr pin */
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name GPIO Connections of SAM4L4C ID detecting
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define USB_ID_FLAGS IOPORT_MODE_PULLUP | IOPORT_MODE_GLITCH_FILTER
|
||||||
|
#define USB_ID_PIN PIN_PB05 /* As IO pin input */
|
||||||
|
/* No EIC for ID pin */
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
//! \name USART connections to GPIO for Virtual Com Port
|
||||||
|
// @{
|
||||||
|
#define COM_PORT_USART USART2
|
||||||
|
#define COM_PORT_USART_ID ID_USART2
|
||||||
|
#define COM_PORT_RX_PIN PIN_PC11B_USART2_RXD
|
||||||
|
#define COM_PORT_RX_GPIO GPIO_PC11B_USART2_RXD
|
||||||
|
#define COM_PORT_RX_MUX MUX_PC11B_USART2_RXD
|
||||||
|
#define COM_PORT_TX_PIN PIN_PC12B_USART2_TXD
|
||||||
|
#define COM_PORT_TX_GPIO GPIO_PC12B_USART2_TXD
|
||||||
|
#define COM_PORT_TX_MUX MUX_PC12B_USART2_TXD
|
||||||
|
// @}
|
||||||
|
|
||||||
|
//! \name USART connections to the Board Monitor
|
||||||
|
// @{
|
||||||
|
#define BM_USART_USART USART0
|
||||||
|
#define BM_USART_USART_ID ID_USART0
|
||||||
|
#define BM_USART_RX_PIN PIN_PC02C_USART0_RXD
|
||||||
|
#define BM_USART_RX_GPIO GPIO_PC02C_USART0_RXD
|
||||||
|
#define BM_USART_RX_MUX MUX_PC02C_USART0_RXD
|
||||||
|
#define BM_USART_TX_PIN PIN_PA07B_USART0_TXD
|
||||||
|
#define BM_USART_TX_GPIO GPIO_PA07B_USART0_TXD
|
||||||
|
#define BM_USART_TX_MUX MUX_PA07B_USART0_TXD
|
||||||
|
// @}
|
||||||
|
|
||||||
|
//! \name USART connections to the RS485
|
||||||
|
// @{
|
||||||
|
#define RS485_USART_USART USART0
|
||||||
|
#define RS485_USART_USART_ID ID_USART0
|
||||||
|
#define RS485_USART_RX_PIN PIN_PC02C_USART0_RXD
|
||||||
|
#define RS485_USART_RX_GPIO GPIO_PC02C_USART0_RXD
|
||||||
|
#define RS485_USART_RX_MUX MUX_PC02C_USART0_RXD
|
||||||
|
#define RS485_USART_TX_PIN PIN_PA07B_USART0_TXD
|
||||||
|
#define RS485_USART_TX_GPIO GPIO_PA07B_USART0_TXD
|
||||||
|
#define RS485_USART_TX_MUX MUX_PA07B_USART0_TXD
|
||||||
|
#define RS485_USART_RTS_PIN PIN_PA06B_USART0_RTS
|
||||||
|
#define RS485_USART_RTS_GPIO GPIO_PA06B_USART0_RTS
|
||||||
|
#define RS485_USART_RTS_MUX MUX_PA06B_USART0_RTS
|
||||||
|
#define RS485_USART_CTS_PIN PIN_PC08E_USART2_CTS
|
||||||
|
#define RS485_USART_CTS_GPIO GPIO_PC08E_USART2_CTS
|
||||||
|
#define RS485_USART_CTS_MUX MUX_PC08E_USART2_CTS
|
||||||
|
// @}
|
||||||
|
|
||||||
|
//! \name TWIMS1 pins
|
||||||
|
// @{
|
||||||
|
#define TWIMS1_TWI_SDA_PIN PIN_PB00A_TWIMS1_TWD
|
||||||
|
#define TWIMS1_TWI_SDA_GPIO GPIO_PB00A_TWIMS1_TWD
|
||||||
|
#define TWIMS1_TWI_SDA_MUX MUX_PB00A_TWIMS1_TWD
|
||||||
|
#define TWIMS1_TWI_SCL_PIN PIN_PB01A_TWIMS1_TWCK
|
||||||
|
#define TWIMS1_TWI_SCL_GPIO GPIO_PB01A_TWIMS1_TWCK
|
||||||
|
#define TWIMS1_TWI_SCL_MUX MUX_PB01A_TWIMS1_TWCK
|
||||||
|
// @}
|
||||||
|
|
||||||
|
//! \name USART0 pins
|
||||||
|
// @{
|
||||||
|
#define USART0_RX_PIN PIN_PC02C_USART0_RXD
|
||||||
|
#define USART0_RX_MUX MUX_PC02C_USART0_RXD
|
||||||
|
#define USART0_RX_GPIO GPIO_PC02C_USART0_RXD
|
||||||
|
#define USART0_TX_PIN PIN_PA07B_USART0_TXD
|
||||||
|
#define USART0_TX_MUX MUX_PA07B_USART0_TXD
|
||||||
|
#define USART0_TX_GPIO GPIO_PA07B_USART0_TXD
|
||||||
|
// @}
|
||||||
|
|
||||||
|
//! \name DACC pins
|
||||||
|
// @{
|
||||||
|
#define DACC_EXT_TRIG0_PIN PIN_PB04E_DACC_EXT_TRIG0
|
||||||
|
#define DACC_EXT_TRIG0_GPIO GPIO_PB04E_DACC_EXT_TRIG0
|
||||||
|
#define DACC_EXT_TRIG0_MUX MUX_PB04E_DACC_EXT_TRIG0
|
||||||
|
#define DACC_VOUT_PIN PIN_PA06A_DACC_VOUT
|
||||||
|
#define DACC_VOUT_GPIO GPIO_PA06A_DACC_VOUT
|
||||||
|
#define DACC_VOUT_MUX MUX_PA06A_DACC_VOUT
|
||||||
|
// @}
|
||||||
|
|
||||||
|
/* Select the SPI module that AT25DFx is connected to */
|
||||||
|
#define AT25DFX_SPI_MODULE SPI
|
||||||
|
|
||||||
|
/* Chip select used by AT25DFx components on the SPI module instance */
|
||||||
|
#define AT25DFX_CS 2
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* SAM4L_EK_INCLUDED */
|
||||||
|
|
@ -0,0 +1,820 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief AST driver for SAM.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ast.h"
|
||||||
|
#include "sysclk.h"
|
||||||
|
#include "sleepmgr.h"
|
||||||
|
#include "conf_ast.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \internal
|
||||||
|
* \brief AST callback function pointer array
|
||||||
|
*/
|
||||||
|
ast_callback_t ast_callback_pointer[AST_INTERRUPT_SOURCE_NUM];
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Check the status of AST.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return true If AST is enabled, else it will return false.
|
||||||
|
*/
|
||||||
|
bool ast_is_enabled(Ast *ast)
|
||||||
|
{
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
return ((ast->AST_CR & AST_CR_EN) != 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable the AST.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*/
|
||||||
|
void ast_enable(Ast *ast)
|
||||||
|
{
|
||||||
|
sysclk_enable_peripheral_clock(ast);
|
||||||
|
sleepmgr_lock_mode(SLEEPMGR_BACKUP);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable the AST. It also disables the AST module.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*/
|
||||||
|
void ast_disable(Ast *ast)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Disable the AST */
|
||||||
|
ast->AST_CR &= ~(AST_CR_EN);
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
sysclk_disable_peripheral_clock(ast);
|
||||||
|
sleepmgr_unlock_mode(SLEEPMGR_BACKUP);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function enables the option to clear the counter on AST alarm.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param alarm_channel AST Alarm Channel.
|
||||||
|
*/
|
||||||
|
void ast_enable_counter_clear_on_alarm(Ast *ast,
|
||||||
|
uint8_t alarm_channel)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Enable Clear Counter on Alarm */
|
||||||
|
ast->AST_CR
|
||||||
|
|= (alarm_channel ? 0 : AST_CR_CA0);
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function clears the AST periodic prescalar counter to zero.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*/
|
||||||
|
void ast_clear_prescalar(Ast *ast)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Clear Counter on Alarm */
|
||||||
|
ast->AST_CR |= AST_CR_PCLR;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function will initialize the AST module in
|
||||||
|
* calendar or counter Mode. It then enables the AST module.
|
||||||
|
*
|
||||||
|
* \note If you use the 32 KHz oscillator, it will enable this module.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param ast_conf The AST configuration
|
||||||
|
*
|
||||||
|
* \return 1 if the initialization succeeds otherwise it will return 0.
|
||||||
|
*/
|
||||||
|
uint32_t ast_set_config(Ast *ast, struct ast_config *ast_conf)
|
||||||
|
{
|
||||||
|
uint32_t time_out = AST_POLL_TIMEOUT;
|
||||||
|
while (ast_is_clkbusy(ast)) {
|
||||||
|
if (--time_out == 0) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
ast->AST_CLOCK = ast_conf->osc_type << AST_CLOCK_CSSEL_Pos;
|
||||||
|
time_out = AST_POLL_TIMEOUT;
|
||||||
|
while (ast_is_clkbusy(ast)) {
|
||||||
|
if (--time_out == 0) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
ast->AST_CLOCK |= AST_CLOCK_CEN;
|
||||||
|
time_out = AST_POLL_TIMEOUT;
|
||||||
|
while (ast_is_clkbusy(ast)) {
|
||||||
|
if (--time_out == 0) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* Set the new AST configuration */
|
||||||
|
if (ast_conf->mode == AST_CALENDAR_MODE) {
|
||||||
|
ast->AST_CR = AST_CR_CAL | ast_conf->psel << AST_CR_PSEL_Pos;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ast_conf->mode == AST_COUNTER_MODE) {
|
||||||
|
ast->AST_CR = ast_conf->psel << AST_CR_PSEL_Pos;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set the calendar */
|
||||||
|
if (ast_conf->mode == AST_CALENDAR_MODE) {
|
||||||
|
ast_write_calendar_value(ast, ast_conf->calendar);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ast_conf->mode == AST_COUNTER_MODE) {
|
||||||
|
ast_write_counter_value(ast, ast_conf->counter);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Enable the AST */
|
||||||
|
ast->AST_CR |= AST_CR_EN;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Function to tune the AST prescalar frequency to the desired frequency
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param input_freq Prescaled AST Clock Frequency
|
||||||
|
* \param tuned_freq Desired AST frequency
|
||||||
|
*
|
||||||
|
* \retval 0 If invalid frequency is passed
|
||||||
|
* \retval 1 If configuration succeeds
|
||||||
|
*
|
||||||
|
* \note Parameter Calculation:
|
||||||
|
* Formula: \n
|
||||||
|
* ADD=0 -> ft= fi(1 - (1/((div_ceil(256/value) * (2^exp)) + 1))) \n
|
||||||
|
* ADD=1 -> ft= fi(1 + (1/((div_ceil(256/value) * (2^exp)) - 1))) \n
|
||||||
|
* Specifications: \n
|
||||||
|
* exp > 0, value > 1 \n
|
||||||
|
* Let X = (2 ^ exp), Y = div_ceil(256 / value) \n
|
||||||
|
* Tuned Frequency -> ft \n
|
||||||
|
* Input Frequency -> fi \n
|
||||||
|
*
|
||||||
|
* IF ft < fi \n
|
||||||
|
* ADD = 0 \n
|
||||||
|
* Z = (ft / (fi - ft)) \n
|
||||||
|
* ELSE IF ft > fi \n
|
||||||
|
* ADD = 1 \n
|
||||||
|
* Z = (ft / (ft - fi)) \n
|
||||||
|
* ELSE \n
|
||||||
|
* exit function -> Tuned Frequency = Input Frequency \n
|
||||||
|
*
|
||||||
|
* The equation can be reduced to (X * Y) = Z
|
||||||
|
*
|
||||||
|
* Frequency Limits \n
|
||||||
|
* (1/((div_ceil(256/value) * (2^exp)) + 1)) should be min to get the lowest
|
||||||
|
* possible output from Digital Tuner.\n
|
||||||
|
* (1/((div_ceil(256/value) * (2^exp)) - 1)) should be min to get the highest
|
||||||
|
* possible output from Digital Tuner.\n
|
||||||
|
* For that, div_ceil(256/value) & (2^exp) should be minimum \n
|
||||||
|
* min (EXP) = 1 (Note: EXP > 0) \n
|
||||||
|
* min (div_ceil(256/value)) = 2 \n
|
||||||
|
* max (Ft) = (4*fi)/3 \n
|
||||||
|
* min (Ft) = (4*fi)/5 \n
|
||||||
|
*
|
||||||
|
* Using the above details, X & Y that will closely satisfy the equation is
|
||||||
|
* found in this function.
|
||||||
|
*/
|
||||||
|
uint32_t ast_configure_digital_tuner(Ast *ast,
|
||||||
|
uint32_t input_freq, uint32_t tuned_freq)
|
||||||
|
{
|
||||||
|
bool add;
|
||||||
|
uint8_t value;
|
||||||
|
uint8_t exp;
|
||||||
|
uint32_t x, y, z;
|
||||||
|
uint32_t diff;
|
||||||
|
if (tuned_freq < input_freq) {
|
||||||
|
/* Check for Frequency Limit */
|
||||||
|
if (tuned_freq < ((4 * input_freq) / 5)) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set the ADD to 0 when freq less than input freq */
|
||||||
|
add = false;
|
||||||
|
/* Calculate the frequency difference */
|
||||||
|
diff = input_freq - tuned_freq;
|
||||||
|
} else if (tuned_freq > input_freq) {
|
||||||
|
/* Check for Frequency Limit */
|
||||||
|
if (tuned_freq > ((4 * input_freq) / 3)) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set the ADD to 1 when freq greater than input freq */
|
||||||
|
add = true;
|
||||||
|
/* Calculate the frequency difference */
|
||||||
|
diff = tuned_freq - input_freq;
|
||||||
|
} else {
|
||||||
|
/* required & input freq are equal */
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
z = (tuned_freq) / (diff);
|
||||||
|
if ((tuned_freq % diff) > (diff / 2)) {
|
||||||
|
z++;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Initialize with minimum possible values.
|
||||||
|
* exp value should be greater than zero, min(exp) = 1 -> min(x)= (2^1)
|
||||||
|
* = 2
|
||||||
|
* y should be greater than one -> div_ceil(256/value) where value- 0 to
|
||||||
|
* 255
|
||||||
|
* min(y) = div_ceil(256/255) = 2
|
||||||
|
*/
|
||||||
|
y = 2;
|
||||||
|
x = 2;
|
||||||
|
exp = 1;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Keep exp constant and increase y value until it reaches its limit.
|
||||||
|
* Increment exp and follow the same steps until we found the closest
|
||||||
|
* possible match for the required frequency.
|
||||||
|
*/
|
||||||
|
do {
|
||||||
|
if (y < 255) {
|
||||||
|
y++;
|
||||||
|
} else {
|
||||||
|
x = x << 1;
|
||||||
|
y = 2;
|
||||||
|
exp++;
|
||||||
|
}
|
||||||
|
} while (z > (x * y));
|
||||||
|
/* Decrement y value after exit from loop */
|
||||||
|
y = y - 1;
|
||||||
|
/* Find VALUE from y */
|
||||||
|
value = div_ceil(256, y);
|
||||||
|
/* Initialize the Digital Tuner using the required parameters */
|
||||||
|
ast_init_digital_tuner(ast, add, value, exp);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function will initialize the digital tuner of AST module.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param add set to true if frequency has to be increased, false if it
|
||||||
|
* has to be decreased.
|
||||||
|
* \param value Parameter used in the formula
|
||||||
|
* \param exp Parameter used in the formula
|
||||||
|
*
|
||||||
|
* \return 1 if the initialization succeeds otherwise it will return 0.
|
||||||
|
*/
|
||||||
|
void ast_init_digital_tuner(Ast *ast, bool add,
|
||||||
|
uint8_t value, uint8_t exp)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
if (add) {
|
||||||
|
ast->AST_DTR = AST_DTR_ADD | AST_DTR_VALUE(value) | AST_DTR_EXP(
|
||||||
|
exp);
|
||||||
|
} else {
|
||||||
|
ast->AST_DTR = AST_DTR_VALUE(value) | AST_DTR_EXP(exp);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function will disable the digital tuner of AST module.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*/
|
||||||
|
void ast_disable_digital_tuner(Ast *ast)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
ast->AST_DTR &= ~(AST_DTR_VALUE_Msk);
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function sets the AST current calendar value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param ast_calendar Startup date
|
||||||
|
*/
|
||||||
|
void ast_write_calendar_value(Ast *ast,
|
||||||
|
struct ast_calendar calendar)
|
||||||
|
{
|
||||||
|
/* Wait until we can write into the VAL register */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Set the new val value */
|
||||||
|
ast->AST_CALV = calendar.field;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function sets the AST current counter value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param ast_counter Startup counter value
|
||||||
|
*/
|
||||||
|
void ast_write_counter_value(Ast *ast,
|
||||||
|
uint32_t ast_counter)
|
||||||
|
{
|
||||||
|
/* Wait until we can write into the VAL register */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Set the new val value */
|
||||||
|
ast->AST_CV = ast_counter;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function returns the AST current calendar value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return The AST current calendar value.
|
||||||
|
*/
|
||||||
|
struct ast_calendar ast_read_calendar_value(Ast *ast)
|
||||||
|
{
|
||||||
|
struct ast_calendar calendar;
|
||||||
|
calendar.field = ast->AST_CALV;
|
||||||
|
return calendar;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function set the AST alarm0 value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param alarm_value AST alarm0 value.
|
||||||
|
*/
|
||||||
|
void ast_write_alarm0_value(Ast *ast, uint32_t alarm_value)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Set the new alarm0 compare value */
|
||||||
|
ast->AST_AR0 = alarm_value;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function set the AST periodic0 value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param pir AST periodic0.
|
||||||
|
*/
|
||||||
|
void ast_write_periodic0_value(Ast *ast, uint32_t pir)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
/* Set the periodic prescaler value */
|
||||||
|
ast->AST_PIR0 = pir;
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function enables the AST interrupts
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST Interrupts to be enabled
|
||||||
|
*/
|
||||||
|
void ast_enable_interrupt(Ast *ast, ast_interrupt_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_INTERRUPT_ALARM:
|
||||||
|
ast->AST_IER = AST_IER_ALARM0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_PER:
|
||||||
|
ast->AST_IER = AST_IER_PER0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_OVF:
|
||||||
|
ast->AST_IER = AST_IER_OVF_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_READY:
|
||||||
|
ast->AST_IER = AST_IER_READY_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_CLKREADY:
|
||||||
|
ast->AST_IER = AST_IER_CLKRDY_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function disables the AST interrupts.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST Interrupts to be disabled
|
||||||
|
*/
|
||||||
|
void ast_disable_interrupt(Ast *ast, ast_interrupt_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_INTERRUPT_ALARM:
|
||||||
|
ast->AST_IDR = AST_IDR_ALARM0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_PER:
|
||||||
|
ast->AST_IDR = AST_IDR_PER0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_OVF:
|
||||||
|
ast->AST_IDR = AST_IDR_OVF_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_READY:
|
||||||
|
ast->AST_IDR = AST_IDR_READY_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_CLKREADY:
|
||||||
|
ast->AST_IDR = AST_IDR_CLKRDY_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function clears the AST status flags.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST status flag to be cleared
|
||||||
|
*/
|
||||||
|
void ast_clear_interrupt_flag(Ast *ast, ast_interrupt_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_INTERRUPT_ALARM:
|
||||||
|
ast->AST_SCR = AST_SCR_ALARM0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_PER:
|
||||||
|
ast->AST_SCR = AST_SCR_PER0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_OVF:
|
||||||
|
ast->AST_SCR = AST_SCR_OVF;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_READY:
|
||||||
|
ast->AST_SCR = AST_SCR_READY;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_INTERRUPT_CLKREADY:
|
||||||
|
ast->AST_SCR = AST_SCR_CLKRDY;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set callback for AST
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST interrupt source.
|
||||||
|
* \param callback callback function pointer.
|
||||||
|
* \param irq_line interrupt line.
|
||||||
|
* \param irq_level interrupt level.
|
||||||
|
*/
|
||||||
|
void ast_set_callback(Ast *ast, ast_interrupt_source_t source,
|
||||||
|
ast_callback_t callback, uint8_t irq_line, uint8_t irq_level)
|
||||||
|
{
|
||||||
|
ast_callback_pointer[source] = callback;
|
||||||
|
NVIC_ClearPendingIRQ((IRQn_Type)irq_line);
|
||||||
|
NVIC_SetPriority((IRQn_Type)irq_line, irq_level);
|
||||||
|
NVIC_EnableIRQ((IRQn_Type)irq_line);
|
||||||
|
ast_enable_interrupt(ast, source);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST.
|
||||||
|
*/
|
||||||
|
void ast_interrupt_handler(void)
|
||||||
|
{
|
||||||
|
uint32_t status, mask;
|
||||||
|
|
||||||
|
status = ast_read_status(AST);
|
||||||
|
mask = ast_read_interrupt_mask(AST);
|
||||||
|
|
||||||
|
if ((status & AST_SR_ALARM0) && (mask & AST_IMR_ALARM0)) {
|
||||||
|
ast_callback_pointer[AST_INTERRUPT_ALARM]();
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((status & AST_SR_PER0) && (mask & AST_IMR_PER0)) {
|
||||||
|
ast_callback_pointer[AST_INTERRUPT_PER]();
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((status & AST_SR_OVF) && (mask & AST_IMR_OVF_1)) {
|
||||||
|
ast_callback_pointer[AST_INTERRUPT_OVF]();
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((status & AST_SR_READY) && (mask & AST_IMR_READY_1)) {
|
||||||
|
ast_callback_pointer[AST_INTERRUPT_READY]();
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((status & AST_SR_CLKRDY) && (mask & AST_IMR_CLKRDY_1)) {
|
||||||
|
ast_callback_pointer[AST_INTERRUPT_CLKREADY]();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST periodic.
|
||||||
|
*/
|
||||||
|
#ifdef AST_PER_ENABLE
|
||||||
|
void AST_PER_Handler(void)
|
||||||
|
{
|
||||||
|
ast_interrupt_handler();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST alarm.
|
||||||
|
*/
|
||||||
|
#ifdef AST_ALARM_ENABLE
|
||||||
|
void AST_ALARM_Handler(void)
|
||||||
|
{
|
||||||
|
ast_interrupt_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST periodic.
|
||||||
|
*/
|
||||||
|
#ifdef AST_OVF_ENABLE
|
||||||
|
void AST_OVF_Handler(void)
|
||||||
|
{
|
||||||
|
ast_interrupt_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST alarm.
|
||||||
|
*/
|
||||||
|
#ifdef AST_READY_ENABLE
|
||||||
|
void AST_READY_Handler(void)
|
||||||
|
{
|
||||||
|
ast_interrupt_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Interrupt handler for AST periodic.
|
||||||
|
*/
|
||||||
|
#ifdef AST_CLKREADY_ENABLE
|
||||||
|
void AST_CLKREADY_Handler(void)
|
||||||
|
{
|
||||||
|
ast_interrupt_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function enables the AST Asynchronous wake-up.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST wake-up flag to be enabled.
|
||||||
|
*/
|
||||||
|
void ast_enable_wakeup(Ast *ast, ast_wakeup_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_WAKEUP_ALARM:
|
||||||
|
ast->AST_WER |= AST_WER_ALARM0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_WAKEUP_PER:
|
||||||
|
ast->AST_WER |= AST_WER_PER0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_WAKEUP_OVF:
|
||||||
|
ast->AST_WER |= AST_WER_OVF_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function disables the AST Asynchronous wake-up.
|
||||||
|
* 8
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST wake-up flag to be disabled.
|
||||||
|
*/
|
||||||
|
void ast_disable_wakeup(Ast *ast, ast_wakeup_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_WAKEUP_ALARM:
|
||||||
|
ast->AST_WER &= ~AST_WER_ALARM0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_WAKEUP_PER:
|
||||||
|
ast->AST_WER &= ~AST_WER_PER0_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_WAKEUP_OVF:
|
||||||
|
ast->AST_WER &= ~AST_WER_OVF_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function enables the AST event.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST event flag to be enabled.
|
||||||
|
*/
|
||||||
|
void ast_enable_event(Ast *ast, ast_event_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_EVENT_ALARM:
|
||||||
|
ast->AST_EVE = AST_EVE_ALARM0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_EVENT_PER:
|
||||||
|
ast->AST_EVE = AST_EVE_PER0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_EVENT_OVF:
|
||||||
|
ast->AST_EVE = AST_EVE_OVF;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function disables the AST event.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
* \param source AST event flag to be disabled.
|
||||||
|
*/
|
||||||
|
void ast_disable_event(Ast *ast, ast_event_source_t source)
|
||||||
|
{
|
||||||
|
/* Wait until the ast CTRL register is up-to-date */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (source) {
|
||||||
|
case AST_EVENT_ALARM:
|
||||||
|
ast->AST_EVD = AST_EVD_ALARM0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_EVENT_PER:
|
||||||
|
ast->AST_EVD = AST_EVD_PER0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case AST_EVENT_OVF:
|
||||||
|
ast->AST_EVD = AST_EVD_OVF;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until write is done */
|
||||||
|
while (ast_is_busy(ast)) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,356 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief AST driver for SAM.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef AST_H_INCLUDED
|
||||||
|
#define AST_H_INCLUDED
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_sam_drivers_ast AST - Asynchronous Timer
|
||||||
|
*
|
||||||
|
* Driver for the AST (Asynchronous Timer).
|
||||||
|
* Provides functions for configuring and operating the AST in the calendar or
|
||||||
|
* timer/counter modes.
|
||||||
|
*
|
||||||
|
* \{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
|
||||||
|
/// @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/// @endcond */
|
||||||
|
|
||||||
|
/** Timeout to prevent code hang in clock initialization */
|
||||||
|
#define AST_POLL_TIMEOUT 10000
|
||||||
|
|
||||||
|
/** \name Predefined PSEL Values
|
||||||
|
*/
|
||||||
|
/* @{ */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* The PSEL value to set the AST source clock (after the prescaler) to 1 Hz,
|
||||||
|
* when using an external 32-kHz crystal.
|
||||||
|
*/
|
||||||
|
#define AST_PSEL_32KHZ_1HZ 14
|
||||||
|
|
||||||
|
/**
|
||||||
|
* The PSEL value to set the AST source clock (after the prescaler)
|
||||||
|
* to 1.76 Hz when using the internal RC oscillator (~ 115 kHz)
|
||||||
|
*/
|
||||||
|
#define AST_PSEL_RC_1_76HZ 15
|
||||||
|
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/* Description for Calendar Field.*/
|
||||||
|
struct ast_calv {
|
||||||
|
uint32_t sec : 6;
|
||||||
|
uint32_t min : 6;
|
||||||
|
uint32_t hour : 5;
|
||||||
|
uint32_t day : 5;
|
||||||
|
uint32_t month : 4;
|
||||||
|
uint32_t year : 6;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Input when initializing AST in calendar mode.*/
|
||||||
|
struct ast_calendar {
|
||||||
|
union {
|
||||||
|
uint32_t field;
|
||||||
|
struct ast_calv FIELD;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
typedef enum ast_mode {
|
||||||
|
AST_COUNTER_MODE = 0,
|
||||||
|
AST_CALENDAR_MODE = 1,
|
||||||
|
} ast_mode_t;
|
||||||
|
|
||||||
|
typedef enum ast_oscillator_type {
|
||||||
|
AST_OSC_RC = 0,
|
||||||
|
AST_OSC_32KHZ = 1,
|
||||||
|
AST_OSC_PB = 2,
|
||||||
|
AST_OSC_GCLK = 3,
|
||||||
|
AST_OSC_1KHZ = 4,
|
||||||
|
} ast_oscillator_type_t;
|
||||||
|
|
||||||
|
#define AST_INTERRUPT_SOURCE_NUM 5
|
||||||
|
typedef enum ast_interrupt_source {
|
||||||
|
AST_INTERRUPT_ALARM = 0,
|
||||||
|
AST_INTERRUPT_PER,
|
||||||
|
AST_INTERRUPT_OVF,
|
||||||
|
AST_INTERRUPT_READY,
|
||||||
|
AST_INTERRUPT_CLKREADY,
|
||||||
|
} ast_interrupt_source_t;
|
||||||
|
|
||||||
|
typedef enum ast_wakeup_source {
|
||||||
|
AST_WAKEUP_ALARM = 0,
|
||||||
|
AST_WAKEUP_PER,
|
||||||
|
AST_WAKEUP_OVF,
|
||||||
|
} ast_wakeup_source_t;
|
||||||
|
|
||||||
|
typedef enum ast_event_source {
|
||||||
|
AST_EVENT_ALARM = 0,
|
||||||
|
AST_EVENT_PER,
|
||||||
|
AST_EVENT_OVF,
|
||||||
|
} ast_event_source_t;
|
||||||
|
|
||||||
|
struct ast_config {
|
||||||
|
/*
|
||||||
|
* Mode: Calendar mode:
|
||||||
|
* \ref AST_CALENDAR_MODE or
|
||||||
|
* \ref Counter mode: AST_COUNTER_MODE.
|
||||||
|
*/
|
||||||
|
ast_mode_t mode;
|
||||||
|
/* Oscillator type */
|
||||||
|
ast_oscillator_type_t osc_type;
|
||||||
|
/* Prescaler Value. */
|
||||||
|
uint8_t psel;
|
||||||
|
/* Initial counter Value. */
|
||||||
|
uint32_t counter;
|
||||||
|
/* Initial calendar Value. */
|
||||||
|
struct ast_calendar calendar;
|
||||||
|
};
|
||||||
|
|
||||||
|
typedef void (*ast_callback_t)(void);
|
||||||
|
|
||||||
|
bool ast_is_enabled(Ast *ast);
|
||||||
|
|
||||||
|
void ast_enable(Ast *ast);
|
||||||
|
void ast_disable(Ast *ast);
|
||||||
|
|
||||||
|
uint32_t ast_set_config(Ast *ast, struct ast_config *ast_conf);
|
||||||
|
void ast_set_callback(Ast *ast, ast_interrupt_source_t source,
|
||||||
|
ast_callback_t callback, uint8_t irq_line, uint8_t irq_level);
|
||||||
|
uint32_t ast_configure_digital_tuner(Ast *ast, uint32_t input_freq,
|
||||||
|
uint32_t tuned_freq);
|
||||||
|
void ast_init_digital_tuner(Ast *ast, bool add, uint8_t value,
|
||||||
|
uint8_t exp);
|
||||||
|
void ast_disable_digital_tuner(Ast *ast);
|
||||||
|
|
||||||
|
void ast_write_calendar_value(Ast *ast, struct ast_calendar ast_calendar);
|
||||||
|
struct ast_calendar ast_read_calendar_value(Ast *ast);
|
||||||
|
void ast_write_counter_value(Ast *ast, uint32_t ast_counter);
|
||||||
|
void ast_enable_counter_clear_on_alarm(Ast *ast, uint8_t alarm_channel);
|
||||||
|
void ast_clear_prescalar(Ast *ast);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function returns the AST current counter value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return The AST current counter value.
|
||||||
|
*/
|
||||||
|
static inline uint32_t ast_read_counter_value(Ast *ast)
|
||||||
|
{
|
||||||
|
return ast->AST_CV;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Check the busy status of AST clock
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return 1 If AST clock is busy, else it will return 0.
|
||||||
|
*/
|
||||||
|
static inline bool ast_is_clkbusy(Ast *ast)
|
||||||
|
{
|
||||||
|
return (ast->AST_SR & AST_SR_CLKBUSY) != 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Check the busy status of AST.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return 1 If AST is busy, else it will return 0.
|
||||||
|
*/
|
||||||
|
static inline bool ast_is_busy(Ast *ast)
|
||||||
|
{
|
||||||
|
return (ast->AST_SR & AST_SR_BUSY) != 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get status of AST.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST (i.e. Ast).
|
||||||
|
*
|
||||||
|
* \return status of AST.
|
||||||
|
*/
|
||||||
|
static inline uint32_t ast_read_status(Ast *ast)
|
||||||
|
{
|
||||||
|
return ast->AST_SR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This function return the AST interrupts mask value.
|
||||||
|
*
|
||||||
|
* \param ast Base address of the AST.
|
||||||
|
*
|
||||||
|
* \return Interrupt mask value
|
||||||
|
*/
|
||||||
|
static inline uint32_t ast_read_interrupt_mask(Ast *ast)
|
||||||
|
{
|
||||||
|
return ast->AST_IMR;
|
||||||
|
}
|
||||||
|
|
||||||
|
void ast_write_alarm0_value(Ast *ast, uint32_t alarm_value);
|
||||||
|
void ast_write_periodic0_value(Ast *ast, uint32_t pir);
|
||||||
|
|
||||||
|
void ast_enable_interrupt(Ast *ast, ast_interrupt_source_t source);
|
||||||
|
void ast_disable_interrupt(Ast *ast, ast_interrupt_source_t source);
|
||||||
|
void ast_clear_interrupt_flag(Ast *ast, ast_interrupt_source_t source);
|
||||||
|
|
||||||
|
void ast_enable_wakeup(Ast *ast, ast_wakeup_source_t source);
|
||||||
|
void ast_disable_wakeup(Ast *ast, ast_wakeup_source_t source);
|
||||||
|
|
||||||
|
void ast_enable_event(Ast *ast, ast_event_source_t source);
|
||||||
|
void ast_disable_event(Ast *ast, ast_event_source_t source);
|
||||||
|
|
||||||
|
/// @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/// @endcond */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page sam_ast_quick_start Quick Start Guide for the AST driver
|
||||||
|
*
|
||||||
|
* This is the quick start guide for the \ref group_sam_drivers_ast, with
|
||||||
|
* step-by-step instructions on how to configure and use the driver for
|
||||||
|
* a specific use case.The code examples can be copied into e.g the main
|
||||||
|
* application loop or any other function that will need to control the
|
||||||
|
* AST module.
|
||||||
|
*
|
||||||
|
* \section ast_qs_use_cases Use cases
|
||||||
|
* - \ref ast_basic
|
||||||
|
*
|
||||||
|
* \section ast_basic AST basic usage
|
||||||
|
*
|
||||||
|
* This use case will demonstrate how to initialize the AST module to
|
||||||
|
* calendar or counter mode.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* \section ast_basic_setup Setup steps
|
||||||
|
*
|
||||||
|
* \subsection ast_basic_prereq Prerequisites
|
||||||
|
*
|
||||||
|
* This module requires the following service
|
||||||
|
* - \ref clk_group
|
||||||
|
*
|
||||||
|
* \subsection ast_basic_setup_code
|
||||||
|
*
|
||||||
|
* Add this to the main loop or a setup function:
|
||||||
|
* \code
|
||||||
|
* osc_priv_enable_osc32();
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection ast_basic_setup_workflow
|
||||||
|
*
|
||||||
|
* -# Enable the AST module
|
||||||
|
* - \code ast_enable(AST); \endcode
|
||||||
|
* -# Initialize the AST to counter mode
|
||||||
|
* - \code
|
||||||
|
* struct ast_config ast_conf;
|
||||||
|
* ast_conf.mode = AST_COUNTER_MODE;
|
||||||
|
* ast_conf.osc_type = AST_OSC_32KHZ;
|
||||||
|
* ast_conf.psel = AST_PSEL_32KHZ_1HZ;
|
||||||
|
* ast_conf.counter = 0;
|
||||||
|
* ast_set_config(AST, &ast_conf)
|
||||||
|
* \endcode
|
||||||
|
* -# Or initialize the AST to calendar mode
|
||||||
|
* - \code
|
||||||
|
* struct ast_calendar calendar;
|
||||||
|
* struct ast_config ast_conf;
|
||||||
|
* calendar.FIELD.sec = 0;
|
||||||
|
* calendar.FIELD.min = 15;
|
||||||
|
* calendar.FIELD.hour = 12;
|
||||||
|
* calendar.FIELD.day = 20;
|
||||||
|
* calendar.FIELD.month = 9;
|
||||||
|
* calendar.FIELD.year = 12;
|
||||||
|
* struct ast_config ast_conf;
|
||||||
|
* ast_conf.mode = AST_CALENDAR_MODE;
|
||||||
|
* ast_conf.osc_type = AST_OSC_32KHZ;
|
||||||
|
* ast_conf.psel = AST_PSEL_32KHZ_1HZ;
|
||||||
|
* ast_conf.calendar = calendar;
|
||||||
|
* ast_set_config(AST, &ast_conf)
|
||||||
|
* \endcode
|
||||||
|
* - \note We need to set the clock after prescaler to 1HZ.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* \section ast_basic_usage Usage steps
|
||||||
|
*
|
||||||
|
* \subsection ast_basic_usage_code
|
||||||
|
*
|
||||||
|
* We can get the calendar value by
|
||||||
|
* \code
|
||||||
|
* calendar = ast_read_calendar_value(AST);
|
||||||
|
* \endcode
|
||||||
|
* Or we can get the counter value by
|
||||||
|
* \code
|
||||||
|
* ast_counter = ast_read_counter_value(AST);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* We can set the alarm interrupt by
|
||||||
|
* \code
|
||||||
|
* ast_write_alarm0_value(AST, calendar.field + 1);
|
||||||
|
* ast_set_callback(AST, ast_interrupt_alarm, ast_alarm_callback,
|
||||||
|
* AST_ALARM_IRQn, 1);
|
||||||
|
* \endcode
|
||||||
|
* And we can set the periodic interrupt by
|
||||||
|
* \code
|
||||||
|
* ast_write_periodic0_value(AST, AST_PSEL_32KHZ_1HZ - 4);
|
||||||
|
* ast_set_callback(AST, ast_interrupt_per, ast_per_callback,
|
||||||
|
* AST_PER_IRQn, 1);
|
||||||
|
* \endcode
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* AST_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,298 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief BPM driver
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
#include "bpm.h"
|
||||||
|
|
||||||
|
RAMFUNC bool bpm_ps_no_halt_exec(Bpm *bpm, uint32_t pmcon);
|
||||||
|
/**
|
||||||
|
* \brief Execute Power Scaling No Halt with a delay loop
|
||||||
|
*
|
||||||
|
* \note SysTick is used to check timeout.
|
||||||
|
*
|
||||||
|
* \param bpm BPM register base
|
||||||
|
* \param pmcon BPM_PMCON value to write
|
||||||
|
*
|
||||||
|
* \return PSOK status, true if set.
|
||||||
|
*/
|
||||||
|
RAMFUNC bool bpm_ps_no_halt_exec(Bpm *bpm, uint32_t pmcon)
|
||||||
|
{
|
||||||
|
bool b_psok = false;
|
||||||
|
bool b_timeout = false;
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
do {
|
||||||
|
b_psok = (BPM->BPM_SR & BPM_SR_PSOK);
|
||||||
|
b_timeout = (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk);
|
||||||
|
} while (!b_psok && !b_timeout);
|
||||||
|
return b_psok;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
bool bpm_power_scaling_cpu_failsafe(Bpm *bpm, uint32_t ps_value,
|
||||||
|
uint32_t timeout)
|
||||||
|
{
|
||||||
|
uint32_t pmcon = 0;
|
||||||
|
|
||||||
|
/* Read last PM_CON value */
|
||||||
|
pmcon = bpm->BPM_PMCON;
|
||||||
|
|
||||||
|
/* Clear last PS Value & Write new one */
|
||||||
|
pmcon &= ~BPM_PMCON_PS_Msk;
|
||||||
|
pmcon |= BPM_PMCON_PS(ps_value);
|
||||||
|
|
||||||
|
/* Set PSCM Value: PS change no halt */
|
||||||
|
pmcon |= BPM_PMCON_PSCM;
|
||||||
|
|
||||||
|
/* Power Scaling Change Request */
|
||||||
|
pmcon |= BPM_PMCON_PSCREQ;
|
||||||
|
|
||||||
|
/* Execute power scaling no halt in RAM */
|
||||||
|
irqflags_t flags;
|
||||||
|
bool b_psok;
|
||||||
|
uint32_t ctrl, load, val;
|
||||||
|
/* Avoid interrupt while flash halt */
|
||||||
|
flags = cpu_irq_save();
|
||||||
|
|
||||||
|
/* Save SysTick */
|
||||||
|
val = SysTick->VAL;
|
||||||
|
ctrl = SysTick->CTRL;
|
||||||
|
load = SysTick->LOAD;
|
||||||
|
/* Setup SysTick & start counting */
|
||||||
|
SysTick->LOAD = timeout;
|
||||||
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
|
||||||
|
|
||||||
|
b_psok = bpm_ps_no_halt_exec(bpm, pmcon);
|
||||||
|
|
||||||
|
/* Restore SysTick */
|
||||||
|
SysTick->CTRL = 0;
|
||||||
|
SysTick->LOAD = load;
|
||||||
|
SysTick->VAL = val;
|
||||||
|
SysTick->CTRL = ctrl;
|
||||||
|
|
||||||
|
cpu_irq_restore(flags);
|
||||||
|
return b_psok;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_power_scaling_cpu(Bpm *bpm, uint32_t ps_value)
|
||||||
|
{
|
||||||
|
uint32_t pmcon = 0;
|
||||||
|
/* Read last PM_CON value */
|
||||||
|
pmcon = bpm->BPM_PMCON;
|
||||||
|
/* Clear last PS Value */
|
||||||
|
pmcon &= ~BPM_PMCON_PS_Msk;
|
||||||
|
/* Write new PS Value */
|
||||||
|
pmcon |= BPM_PMCON_PS(ps_value);
|
||||||
|
/* PSCM: without CPU halt */
|
||||||
|
pmcon |= BPM_PMCON_PSCM;
|
||||||
|
/* Power Scaling Change Request */
|
||||||
|
pmcon |= BPM_PMCON_PSCREQ;
|
||||||
|
/* Unlock PMCON register */
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
/* Write back PM_CON value */
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_enable_fast_wakeup(Bpm *bpm)
|
||||||
|
{
|
||||||
|
uint32_t pmcon = bpm->BPM_PMCON | BPM_PMCON_FASTWKUP;
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_disable_fast_wakeup(Bpm *bpm)
|
||||||
|
{
|
||||||
|
uint32_t pmcon = bpm->BPM_PMCON & (~BPM_PMCON_FASTWKUP);
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_set_clk32_source(Bpm *bpm, uint32_t source)
|
||||||
|
{
|
||||||
|
uint32_t pmcon;
|
||||||
|
|
||||||
|
/* Read PMCON first */
|
||||||
|
pmcon = bpm->BPM_PMCON;
|
||||||
|
if (source == BPM_CLK32_SOURCE_OSC32K) {
|
||||||
|
/* Clear CK32S for OSC32K */
|
||||||
|
pmcon &= ~BPM_PMCON_CK32S;
|
||||||
|
} else {
|
||||||
|
/* Set CK32S for RC32K */
|
||||||
|
pmcon |= BPM_PMCON_CK32S;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Unlock PMCON register */
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t bpm_get_backup_wakeup_cause(Bpm *bpm)
|
||||||
|
{
|
||||||
|
return bpm->BPM_BKUPWCAUSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_enable_wakeup_source(Bpm *bpm, uint32_t sources)
|
||||||
|
{
|
||||||
|
/* Write BKUPWEN value */
|
||||||
|
bpm->BPM_BKUPWEN |= sources;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_disable_wakeup_source(Bpm *bpm, uint32_t sources)
|
||||||
|
{
|
||||||
|
/* Write BKUPWEN value */
|
||||||
|
bpm->BPM_BKUPWEN &= ~sources;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_enable_backup_pin(Bpm *bpm, uint32_t backup_pins)
|
||||||
|
{
|
||||||
|
/* Write back BKUPPMUX value */
|
||||||
|
bpm->BPM_BKUPPMUX |= backup_pins;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_disable_backup_pin(Bpm *bpm, uint32_t backup_pins)
|
||||||
|
{
|
||||||
|
/* Write back BKUPPMUX value */
|
||||||
|
bpm->BPM_BKUPPMUX &= ~backup_pins;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_enable_io_retention(Bpm *bpm)
|
||||||
|
{
|
||||||
|
bpm->BPM_IORET |= BPM_IORET_RET;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_disable_io_retention(Bpm *bpm)
|
||||||
|
{
|
||||||
|
bpm->BPM_IORET &= ~BPM_IORET_RET;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_enable_interrupt(Bpm *bpm, uint32_t sources)
|
||||||
|
{
|
||||||
|
bpm->BPM_IER = sources;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_disable_interrupt(Bpm *bpm, uint32_t sources)
|
||||||
|
{
|
||||||
|
bpm->BPM_IDR = sources;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t bpm_get_interrupt_mask(Bpm *bpm)
|
||||||
|
{
|
||||||
|
return bpm->BPM_IMR;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t bpm_get_interrupt_status(Bpm *bpm)
|
||||||
|
{
|
||||||
|
return bpm->BPM_ISR;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_clear_interrupt(Bpm *bpm, uint32_t sources)
|
||||||
|
{
|
||||||
|
bpm->BPM_ICR = sources;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t bpm_get_status(Bpm *bpm)
|
||||||
|
{
|
||||||
|
return bpm->BPM_SR;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t bpm_get_version(Bpm *bpm)
|
||||||
|
{
|
||||||
|
return bpm->BPM_VERSION;
|
||||||
|
}
|
||||||
|
|
||||||
|
void bpm_sleep(Bpm *bpm, uint32_t sleep_mode)
|
||||||
|
{
|
||||||
|
uint32_t pmcon;
|
||||||
|
|
||||||
|
/* Read PMCON register */
|
||||||
|
pmcon = bpm->BPM_PMCON;
|
||||||
|
pmcon &= ~BPM_PMCON_BKUP;
|
||||||
|
pmcon &= ~BPM_PMCON_RET;
|
||||||
|
pmcon &= ~BPM_PMCON_SLEEP_Msk;
|
||||||
|
|
||||||
|
/* Unlock PMCON register */
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
|
||||||
|
if (sleep_mode == BPM_SM_SLEEP_0) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(0);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_1) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(1);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_2) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(2);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_3) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(3);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_WAIT) {
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_RET) {
|
||||||
|
pmcon |= BPM_PMCON_RET;
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else { /* if (sleep_mode == BPM_SM_BACKUP) */
|
||||||
|
pmcon |= BPM_PMCON_BKUP;
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until vreg is ok. */
|
||||||
|
while(!(BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_VREGOK));
|
||||||
|
asm volatile ("wfi");
|
||||||
|
/* ensure sleep request propagation to flash. */
|
||||||
|
asm volatile ("nop");
|
||||||
|
|
||||||
|
/* The interrupts wake-up from the previous wfi, but there are still
|
||||||
|
* masked since we are in the critical section thanks to the previous
|
||||||
|
* set_pri_mask(1). Thus, we need to leave the critical section.
|
||||||
|
* Please note that we should probably use something like
|
||||||
|
* cpu_leave_critical(), using set_pri_mask(0)
|
||||||
|
*/
|
||||||
|
cpu_irq_enable();
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,501 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief BPM driver.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2012 - 2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BPM_H_INCLUDED
|
||||||
|
#define BPM_H_INCLUDED
|
||||||
|
|
||||||
|
#include "compiler.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_sam_drivers_bpm BPM - Backup Power Manager
|
||||||
|
*
|
||||||
|
* Driver for the BPM (Backup Power Manager).
|
||||||
|
* This driver provides access to the main features of the BPM controller.
|
||||||
|
* It provides functions for different power mode management.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** BPM unlock macro */
|
||||||
|
#define BPM_UNLOCK(reg) \
|
||||||
|
do { \
|
||||||
|
BPM->BPM_UNLOCK = BPM_UNLOCK_KEY(0xAAu) \
|
||||||
|
| BPM_UNLOCK_ADDR((uint32_t)&BPM->BPM_##reg - (uint32_t)BPM);\
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
/** \name Sleep mode definitions */
|
||||||
|
/* @{ */
|
||||||
|
#define BPM_SM_ACTIVE 0 /**< Active mode */
|
||||||
|
#define BPM_SM_SLEEP_0 1 /**< Sleep mode 0 */
|
||||||
|
#define BPM_SM_SLEEP_1 2 /**< Sleep mode 1 */
|
||||||
|
#define BPM_SM_SLEEP_2 3 /**< Sleep mode 2 */
|
||||||
|
#define BPM_SM_SLEEP_3 4 /**< Sleep mode 3 */
|
||||||
|
#define BPM_SM_WAIT 5 /**< Wait mode */
|
||||||
|
#define BPM_SM_RET 6 /**< Retention mode */
|
||||||
|
#define BPM_SM_BACKUP 7 /**< Backup mode */
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/** \anchor power_scaling_change_mode */
|
||||||
|
/** \name Power scaling change mode */
|
||||||
|
/* @{ */
|
||||||
|
/** Power scaling change mode: halting the CPU execution */
|
||||||
|
#define BPM_PSCM_CPU_HALT 0
|
||||||
|
/** Power scaling change mode: CPU execution not halted */
|
||||||
|
#define BPM_PSCM_CPU_NOT_HALT 1
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/** \anchor power_scaling_mode_value */
|
||||||
|
/** \name Power scaling mode value */
|
||||||
|
/* @{ */
|
||||||
|
/** Power scaling mode 0 */
|
||||||
|
#define BPM_PS_0 0
|
||||||
|
/** Power scaling mode 1 */
|
||||||
|
#define BPM_PS_1 1
|
||||||
|
/** Power scaling mode 2 */
|
||||||
|
#define BPM_PS_2 2
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/** \anchor CLK32_32Khz_1Khz */
|
||||||
|
/** \name CLK32 32Khz-1Khz clock source selection */
|
||||||
|
/* @{ */
|
||||||
|
/** OSC32K : Low frequency crystal oscillator */
|
||||||
|
#define BPM_CLK32_SOURCE_OSC32K 0
|
||||||
|
/** RC32K : Internal Low frequency RC oscillator */
|
||||||
|
#define BPM_CLK32_SOURCE_RC32K 1
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/** \anchor backup_wake_up_sources */
|
||||||
|
/** \name Backup wake up sources */
|
||||||
|
/* @{ */
|
||||||
|
/** EIC wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_EIC (1UL << BPM_BKUPWEN_EIC)
|
||||||
|
/** AST wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_AST (1UL << BPM_BKUPWEN_AST)
|
||||||
|
/** WDT wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_WDT (1UL << BPM_BKUPWEN_WDT)
|
||||||
|
/** BOD33 wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_BOD33 (1UL << BPM_BKUPWEN_BOD33)
|
||||||
|
/** BOD18 wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_BOD18 (1UL << BPM_BKUPWEN_BOD18)
|
||||||
|
/** PICOUART wake up */
|
||||||
|
#define BPM_BKUP_WAKEUP_SRC_PICOUART (1UL << BPM_BKUPWEN_PICOUART)
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/** \anchor backup_pin_muxing */
|
||||||
|
/** \name Backup pin muxing */
|
||||||
|
/* @{ */
|
||||||
|
#define BPM_BKUP_PIN_PB01_EIC0 BPM_BKUPPMUX_BKUPPMUX(0)
|
||||||
|
#define BPM_BKUP_PIN_PA06_EIC1 BPM_BKUPPMUX_BKUPPMUX(1)
|
||||||
|
#define BPM_BKUP_PIN_PA04_EIC2 BPM_BKUPPMUX_BKUPPMUX(2)
|
||||||
|
#define BPM_BKUP_PIN_PA05_EIC3 BPM_BKUPPMUX_BKUPPMUX(3)
|
||||||
|
#define BPM_BKUP_PIN_PA07_EIC4 BPM_BKUPPMUX_BKUPPMUX(4)
|
||||||
|
#define BPM_BKUP_PIN_PC03_EIC5 BPM_BKUPPMUX_BKUPPMUX(5)
|
||||||
|
#define BPM_BKUP_PIN_PC04_EIC6 BPM_BKUPPMUX_BKUPPMUX(6)
|
||||||
|
#define BPM_BKUP_PIN_PC05_EIC7 BPM_BKUPPMUX_BKUPPMUX(7)
|
||||||
|
#define BPM_BKUP_PIN_PC06_EIC8 BPM_BKUPPMUX_BKUPPMUX(8)
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Power management
|
||||||
|
*/
|
||||||
|
/* @{ */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Change Power Scaling mode
|
||||||
|
*
|
||||||
|
* PSOK is not checked while switching PS mode.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param ps_value Power scaling value, see \ref power_scaling_mode_value.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
void bpm_power_scaling_cpu(Bpm *bpm, uint32_t ps_value);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Change Power Scaling mode and check results
|
||||||
|
*
|
||||||
|
* Wait for a while to check if PSOK is ready.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param ps_value Power scaling value, see \ref power_scaling_mode_value.
|
||||||
|
*
|
||||||
|
* \param timeout Timeout, in number of processor clocks, max 0xFFFFFF.
|
||||||
|
* \return true if PSOK is ready.
|
||||||
|
*/
|
||||||
|
bool bpm_power_scaling_cpu_failsafe(Bpm *bpm, uint32_t ps_value,
|
||||||
|
uint32_t timeout);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Configure power scaling mode.
|
||||||
|
*
|
||||||
|
* While checking PSOK in power safe (no halt) mode, timeout is set to
|
||||||
|
* 240000 by default, which takes 20ms when 12MHz clock is used.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param ps_value Power scaling value, see \ref power_scaling_mode_value.
|
||||||
|
*
|
||||||
|
* \param no_halt No halt or Fail safe, see \c bpm_power_scaling_cpu()
|
||||||
|
* and bpm_power_scaling_cpu_failsafe()
|
||||||
|
* \return true if no error.
|
||||||
|
*/
|
||||||
|
__always_inline static
|
||||||
|
bool bpm_configure_power_scaling(Bpm *bpm, uint32_t ps_value, uint32_t no_halt)
|
||||||
|
{
|
||||||
|
if (!no_halt) {
|
||||||
|
bpm_power_scaling_cpu(bpm, ps_value);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
return bpm_power_scaling_cpu_failsafe(bpm, ps_value, 240000);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable fast wakeup for analog modules.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*/
|
||||||
|
void bpm_enable_fast_wakeup(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable fast wakeup for analog modules.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*/
|
||||||
|
void bpm_disable_fast_wakeup(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Set clock source for 32KHz clock.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param source Clock source, see \ref CLK32_32Khz_1Khz.
|
||||||
|
*/
|
||||||
|
void bpm_set_clk32_source(Bpm *bpm, uint32_t source);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get wakeup cause from backup mode.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*/
|
||||||
|
uint32_t bpm_get_backup_wakeup_cause(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable wakeup source.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param sources Wakeup source mask, see \ref backup_wake_up_sources.
|
||||||
|
*/
|
||||||
|
void bpm_enable_wakeup_source(Bpm *bpm, uint32_t sources);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable wakeup source.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param sources Wakeup source mask, see \ref backup_wake_up_sources.
|
||||||
|
*/
|
||||||
|
void bpm_disable_wakeup_source(Bpm *bpm, uint32_t sources);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable backup pin for wakeup.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param backup_pins Backup pin mask, see \ref backup_pin_muxing.
|
||||||
|
*/
|
||||||
|
void bpm_enable_backup_pin(Bpm *bpm, uint32_t backup_pins);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable backup pin for wakeup.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param backup_pins Backup pin mask, see \ref backup_pin_muxing.
|
||||||
|
*/
|
||||||
|
void bpm_disable_backup_pin(Bpm *bpm, uint32_t backup_pins);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable IO retention for backup mode.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*/
|
||||||
|
void bpm_enable_io_retention(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable IO retention for backup mode.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*/
|
||||||
|
void bpm_disable_io_retention(Bpm *bpm);
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \name Interrupt and status management
|
||||||
|
*/
|
||||||
|
/* @{ */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Enable interrupt with given sources mask.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param sources BPM interrupt source mask.
|
||||||
|
*/
|
||||||
|
void bpm_enable_interrupt(Bpm *bpm, uint32_t sources);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Disable interrupt with given sources mask.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param sources BPM interrupt source mask.
|
||||||
|
*/
|
||||||
|
void bpm_disable_interrupt(Bpm *bpm, uint32_t sources);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get BPM interrupt mask.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*
|
||||||
|
* \return BPM interrupt mask.
|
||||||
|
*/
|
||||||
|
uint32_t bpm_get_interrupt_mask(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get BPM interrupt status.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*
|
||||||
|
* \return BPM interrupt status.
|
||||||
|
*/
|
||||||
|
uint32_t bpm_get_interrupt_status(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Clear BPM interrupt.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
* \param sources BPM interrupt source mask.
|
||||||
|
*/
|
||||||
|
void bpm_clear_interrupt(Bpm *bpm, uint32_t sources);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get BPM status.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*
|
||||||
|
* \return BPM status.
|
||||||
|
*/
|
||||||
|
uint32_t bpm_get_status(Bpm *bpm);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Get version of BPM module.
|
||||||
|
*
|
||||||
|
* \param bpm Base address of the BPM instance.
|
||||||
|
*
|
||||||
|
* \return Version of BPM module.
|
||||||
|
*/
|
||||||
|
uint32_t bpm_get_version(Bpm *bpm);
|
||||||
|
/* @} */
|
||||||
|
|
||||||
|
/* @} */
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page sam_bpm_quickstart Quick start guide for the SAM BPM module
|
||||||
|
*
|
||||||
|
* This is the quick start guide for the
|
||||||
|
* \ref group_sam_drivers_bpm "BPM Module", with step-by-step instructions on
|
||||||
|
* how to configure and use the driver in a selection of use cases.
|
||||||
|
*
|
||||||
|
* The use cases contain several code fragments. The code fragments in the
|
||||||
|
* steps for setup can be copied into a custom initialization function, while
|
||||||
|
* the steps for usage can be copied into, e.g., the main application function.
|
||||||
|
*
|
||||||
|
* \section bpm_use_cases BPM use cases
|
||||||
|
* - \ref bpm_use_case_1 Basic use case - Entering Sleep Modes
|
||||||
|
* - \ref bpm_use_case_2 Advanced use case - Switch Power Scaling Modes
|
||||||
|
*
|
||||||
|
* \section bpm_use_case_1 Basic use case - Entering Sleep Modes
|
||||||
|
* In this use case, the BPM module can put system into different power saving
|
||||||
|
* modes. Check the current of the system to see consumptions.
|
||||||
|
*
|
||||||
|
* \section bpm_use_case_1_setup Setup
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_1_setup_prereq Prerequisites
|
||||||
|
* Sleep mode itself does not require any IO input, but to wakeup an interrupt
|
||||||
|
* is needed.
|
||||||
|
* -# \ref ioport_group "Common IOPORT (for GPIO)"
|
||||||
|
* -# \ref sam_drivers_eic_group "External Interrupt Controller (EIC)"
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_1_setup_prereq_code Code
|
||||||
|
*
|
||||||
|
* \code
|
||||||
|
* #define EIC_INT5_ENABLE
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* The following code needs to be added to the user application, to wakeup
|
||||||
|
* system and switch to next power mode.
|
||||||
|
* \code
|
||||||
|
* static void push_button_eic_handler()
|
||||||
|
* {
|
||||||
|
* eic_line_clear_interrupt(EIC, GPIO_PUSH_BUTTON_EIC_LINE);
|
||||||
|
* }
|
||||||
|
* \endcode
|
||||||
|
* \code
|
||||||
|
* my_eic_init()
|
||||||
|
* {
|
||||||
|
* struct eic_line_config eic_opt={
|
||||||
|
* EIC_MODE_EDGE_TRIGGERED,
|
||||||
|
* EIC_EDGE_FALLING_EDGE,
|
||||||
|
* EIC_LEVEL_LOW_LEVEL,
|
||||||
|
* EIC_FILTER_DISABLED,
|
||||||
|
* EIC_ASYNCH_MODE
|
||||||
|
* };
|
||||||
|
* eic_enable(EIC);
|
||||||
|
* eic_line_set_config(EIC, GPIO_PUSH_BUTTON_EIC_LINE, &eic_opt);
|
||||||
|
* eic_line_set_callback(EIC, GPIO_PUSH_BUTTON_EIC_LINE,
|
||||||
|
* push_button_eic_handler, EIC_5_IRQn, 1);
|
||||||
|
* eic_line_enable(EIC, GPIO_PUSH_BUTTON_EIC_LINE);
|
||||||
|
* }
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_1_setup_prereq_flow Workflow
|
||||||
|
* -# Ensure that ioport and eic driver is available.
|
||||||
|
* -# Ensure that push button is configured as external interrupt in
|
||||||
|
* conf_board.h:
|
||||||
|
* \code #define CONF_BOARD_EIC \endcode
|
||||||
|
* -# Add EIC initialize to application C-file:
|
||||||
|
* \code my_eic_init(); \endcode
|
||||||
|
*
|
||||||
|
* \section bpm_use_case_1_usage Use case
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_1_usage_code Example code
|
||||||
|
* Add to application C-file:
|
||||||
|
* \code
|
||||||
|
* // Enable wakeup by EIC
|
||||||
|
* bpm_enable_wakeup_source(BPM, 1 << BPM_BKUPWEN_EIC);
|
||||||
|
* // Enable backup wakeup by Push button EIC line
|
||||||
|
* bpm_enable_backup_pin(BPM, 1 << GPIO_PUSH_BUTTON_EIC_LINE);
|
||||||
|
* // Retain I/O lines after wakeup from backup mode
|
||||||
|
* bpm_enable_io_retention(BPM);
|
||||||
|
* // Enable fast wakeup
|
||||||
|
* bpm_enable_fast_wakeup(BPM);
|
||||||
|
* // Enter wait mode
|
||||||
|
* // critical section when going to sleep
|
||||||
|
* cpu_irq_disable();
|
||||||
|
* bpm_sleep(BPM, BPM_SM_WAIT);
|
||||||
|
* // Enter retention mode
|
||||||
|
* cpu_irq_disable();
|
||||||
|
* bpm_sleep(BPM, BPM_SM_RET);
|
||||||
|
* // Enter backup mode
|
||||||
|
* cpu_irq_disable();
|
||||||
|
* bpm_sleep(BPM, BPM_SM_BACKUP);
|
||||||
|
* while(1);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_1_usage_flow Workflow
|
||||||
|
* -# Enable wakeup by EIC:
|
||||||
|
* \code
|
||||||
|
* bpm_enable_wakeup_source(BPM, 1 << BPM_BKUPWEN_EIC);
|
||||||
|
* bpm_enable_backup_pin(BPM, 1 << GPIO_PUSH_BUTTON_EIC_LINE);
|
||||||
|
* \endcode
|
||||||
|
* -# Setup IO retention:
|
||||||
|
* \code bpm_enable_io_retention(BPM); \endcode
|
||||||
|
* -# Setup fast wakeup:
|
||||||
|
* \code bpm_enable_fast_wakeup(BPM); \endcode
|
||||||
|
* -# Enter sleep/wait/backup mode:
|
||||||
|
* \code
|
||||||
|
* // critical section when going to sleep
|
||||||
|
* cpu_irq_disable();
|
||||||
|
* bpm_sleep(BPM, BPM_SM_WAIT);
|
||||||
|
* \endcode
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page bpm_use_case_2 Advanced use case - Switch Power Scaling Modes
|
||||||
|
* In this use case, the BPM module can switch the power scaling modes of the
|
||||||
|
* system. Check the current of the system to see consumptions.
|
||||||
|
*
|
||||||
|
* \section bpm_use_case_2_setup Setup
|
||||||
|
* \subsection bpm_use_case_2_setup_prereq Prerequisites
|
||||||
|
* Some power scaling modes only work on limited system clock frequency (The
|
||||||
|
* maximum CPU frequency under PS1 is 12MHz, other peripherals also have speed
|
||||||
|
* limitations), please refer to the electrical characteristics for more
|
||||||
|
* details.
|
||||||
|
* -# \ref clk_group "Clock management"
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_2_setup_code Code
|
||||||
|
* Content of conf_clock.h
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST // Uses Fast RC
|
||||||
|
* #define CONFIG_RCFAST_FRANGE 2 // Fast RC is 12MHz
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_2_setup_workflow Workflow
|
||||||
|
* -# Ensure that conf_clock.h is available and contains the following
|
||||||
|
* parameters which configure system clock to 12MHz fast RC:
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST // Uses Fast RC
|
||||||
|
* #define CONFIG_RCFAST_FRANGE 2 // Fast RC is 12MHz
|
||||||
|
* \endcode
|
||||||
|
* -# Initialize system clock with \c sysclk_init().
|
||||||
|
*
|
||||||
|
* \section bpm_use_case_2_usage Use case
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_2_usage_code Example code
|
||||||
|
* Add to application C-file:
|
||||||
|
* \code
|
||||||
|
* bpm_power_scaling_cpu(BPM, BPM_PMCON_PS(BPM_PS_1));
|
||||||
|
* while((bpm_get_status(BPM) & BPM_SR_PSOK) == 0);
|
||||||
|
* while(1);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection bpm_use_case_2_usage_workflow Workflow
|
||||||
|
* -# Switch the power scaling mode:
|
||||||
|
* \code bpm_power_scaling_cpu(BPM, BPM_PMCON_PS(BPM_PS_1));
|
||||||
|
* \endcode
|
||||||
|
* -# Wait power scaling done:
|
||||||
|
* \code while((bpm_get_status(BPM) & BPM_SR_PSOK) == 0); \endcode
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* BPM_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,141 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Sleep mode access
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SLEEP_H
|
||||||
|
#define SLEEP_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <compiler.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup sleep_group Backup Power Manager (BPM)
|
||||||
|
*
|
||||||
|
* This is a stub on the SAM4L Backup Power Manager(BPM) for the sleepmgr service.
|
||||||
|
*
|
||||||
|
* \note To minimize the code overhead, these functions do not feature
|
||||||
|
* interrupt-protected access since they are likely to be called inside
|
||||||
|
* interrupt handlers or in applications where such protection is not
|
||||||
|
* necessary. If such protection is needed, it must be ensured by the calling
|
||||||
|
* code.
|
||||||
|
*
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* \brief Sets the MCU in the specified sleep mode
|
||||||
|
* \param sleep_mode Sleep mode to set.
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "bpm.h"
|
||||||
|
|
||||||
|
static inline void bpm_sleep(Bpm *bpm, uint32_t sleep_mode)
|
||||||
|
{
|
||||||
|
uint32_t pmcon;
|
||||||
|
|
||||||
|
/* Read PMCON register */
|
||||||
|
pmcon = bpm->BPM_PMCON;
|
||||||
|
pmcon &= ~BPM_PMCON_BKUP;
|
||||||
|
pmcon &= ~BPM_PMCON_RET;
|
||||||
|
pmcon &= ~BPM_PMCON_SLEEP_Msk;
|
||||||
|
|
||||||
|
/* Unlock PMCON register */
|
||||||
|
BPM_UNLOCK(PMCON);
|
||||||
|
|
||||||
|
if (sleep_mode == BPM_SM_SLEEP_0) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(0);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_1) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(1);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_2) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(2);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_SLEEP_3) {
|
||||||
|
pmcon |= BPM_PMCON_SLEEP(3);
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_WAIT) {
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else if (sleep_mode == BPM_SM_RET) {
|
||||||
|
pmcon |= BPM_PMCON_RET;
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
} else { /* if (sleep_mode == BPM_SM_BACKUP) */
|
||||||
|
pmcon |= BPM_PMCON_BKUP;
|
||||||
|
bpm->BPM_PMCON = pmcon;
|
||||||
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until vreg is ok. */
|
||||||
|
while(!(BSCIF->BSCIF_PCLKSR & BSCIF_PCLKSR_VREGOK));
|
||||||
|
asm volatile ("wfi");
|
||||||
|
/* ensure sleep request propagation to flash. */
|
||||||
|
asm volatile ("nop");
|
||||||
|
|
||||||
|
/* The interrupts wake-up from the previous wfi, but there are still
|
||||||
|
* masked since we are in the critical section thanks to the previous
|
||||||
|
* set_pri_mask(1). Thus, we need to leave the critical section.
|
||||||
|
* Please note that we should probably use something like
|
||||||
|
* cpu_leave_critical(), using set_pri_mask(0)
|
||||||
|
*/
|
||||||
|
cpu_irq_enable();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* SLEEP_H */
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,399 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief FlashCALW driver for SAM4L.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef FLASHCALW_H_INCLUDED
|
||||||
|
#define FLASHCALW_H_INCLUDED
|
||||||
|
|
||||||
|
#include <stddef.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include "compiler.h"
|
||||||
|
|
||||||
|
/* These defines should be part of the auto-generated header files */
|
||||||
|
#if (!defined FLASH_PAGE_SIZE)
|
||||||
|
# define FLASH_PAGE_SIZE 512UL
|
||||||
|
#endif
|
||||||
|
#if (!defined FLASH_NB_OF_REGIONS)
|
||||||
|
# define FLASH_NB_OF_REGIONS 16
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* ! Number of flash regions defined by the FLASHCALW. */
|
||||||
|
#define FLASHCALW_REGIONS FLASH_NB_OF_REGIONS
|
||||||
|
|
||||||
|
/** \brief Maximum operating frequency when FWS is 1 in PS0 mode and
|
||||||
|
the Fast wakeup is enabled */
|
||||||
|
#define FLASH_FREQ_PS1_FWS_1_FWU_MAX_FREQ (12000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 0 in PS0 mode */
|
||||||
|
#define FLASH_FREQ_PS0_FWS_0_MAX_FREQ (18000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 1 in PS0 mode */
|
||||||
|
#define FLASH_FREQ_PS0_FWS_1_MAX_FREQ (36000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 0 in PS1 mode */
|
||||||
|
#define FLASH_FREQ_PS1_FWS_0_MAX_FREQ (8000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 1 in PS1 mode */
|
||||||
|
#define FLASH_FREQ_PS1_FWS_1_MAX_FREQ (12000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 0 in PS2 mode */
|
||||||
|
#define FLASH_FREQ_PS2_FWS_0_MAX_FREQ (24000000UL)
|
||||||
|
/** \brief Maximum operating frequency when FWS is 1 in PS2 mode */
|
||||||
|
#define FLASH_FREQ_PS2_FWS_1_MAX_FREQ (48000000UL)
|
||||||
|
/*! \name Flash Properties
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_flash_size(void);
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_page_count(void);
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_page_count_per_region(void);
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_page_region(int32_t page_number);
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_region_first_page_number(uint32_t region);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name FLASHCALW Control
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_wait_state(void);
|
||||||
|
|
||||||
|
void flashcalw_set_wait_state(uint32_t wait_state);
|
||||||
|
|
||||||
|
void flashcalw_set_flash_waitstate_and_readmode(uint32_t cpu_f_hz,
|
||||||
|
uint32_t ps_value, bool is_fwu_enabled);
|
||||||
|
|
||||||
|
/*! \brief Alias on the flashcalw_set_flash_waitstate_and_readmode() function.
|
||||||
|
*
|
||||||
|
* \param cpu_f_hz The CPU frequency
|
||||||
|
* \param ps_value (boolean), Power Scaling mode
|
||||||
|
* \param is_fwu_enabled (boolean), Fast wakeup mode
|
||||||
|
*/
|
||||||
|
#define flash_set_bus_freq(cpu_f_hz, ps_value, is_fwu_enabled) \
|
||||||
|
flashcalw_set_flash_waitstate_and_readmode(cpu_f_hz, ps_value, is_fwu_enabled)
|
||||||
|
|
||||||
|
bool flashcalw_is_ready_int_enabled(void);
|
||||||
|
|
||||||
|
void flashcalw_enable_ready_int(bool enable);
|
||||||
|
|
||||||
|
bool flashcalw_is_lock_error_int_enabled(void);
|
||||||
|
|
||||||
|
void flashcalw_enable_lock_error_int(bool enable);
|
||||||
|
|
||||||
|
bool flashcalw_is_prog_error_int_enabled(void);
|
||||||
|
|
||||||
|
void flashcalw_enable_prog_error_int(bool enable);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name FLASHCALW Status
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
bool flashcalw_is_ready(void);
|
||||||
|
|
||||||
|
void flashcalw_default_wait_until_ready(void);
|
||||||
|
|
||||||
|
extern void (*volatile flashcalw_wait_until_ready)(void);
|
||||||
|
|
||||||
|
bool flashcalw_is_lock_error(void);
|
||||||
|
|
||||||
|
bool flashcalw_is_programming_error(void);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name FLASHCALW Command Control
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_command(void);
|
||||||
|
|
||||||
|
uint32_t flashcalw_get_page_number(void);
|
||||||
|
|
||||||
|
void flashcalw_issue_command(uint32_t command, int page_number);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name FLASHCALW Global Commands
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
void flashcalw_no_operation(void);
|
||||||
|
|
||||||
|
void flashcalw_erase_all(void);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name FLASHCALW Protection Mechanisms
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
bool flashcalw_is_security_bit_active(void);
|
||||||
|
|
||||||
|
void flashcalw_set_security_bit(void);
|
||||||
|
|
||||||
|
bool flashcalw_is_page_region_locked(uint32_t page_number);
|
||||||
|
|
||||||
|
bool flashcalw_is_region_locked(uint32_t region);
|
||||||
|
|
||||||
|
void flashcalw_lock_page_region(int page_number, bool lock);
|
||||||
|
|
||||||
|
void flashcalw_lock_region(uint32_t region, bool lock);
|
||||||
|
|
||||||
|
void flashcalw_lock_all_regions(bool lock);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name Access to General-Purpose Fuses
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
bool flashcalw_read_gp_fuse_bit(uint32_t gp_fuse_bit);
|
||||||
|
|
||||||
|
uint64_t flashcalw_read_gp_fuse_bitfield(uint32_t pos, uint32_t width);
|
||||||
|
|
||||||
|
uint8_t flashcalw_read_gp_fuse_byte(uint32_t gp_fuse_byte);
|
||||||
|
|
||||||
|
uint64_t flashcalw_read_all_gp_fuses(void);
|
||||||
|
|
||||||
|
bool flashcalw_erase_gp_fuse_bit(uint32_t gp_fuse_bit, bool check);
|
||||||
|
|
||||||
|
bool flashcalw_erase_gp_fuse_bitfield(uint32_t pos, uint32_t width,
|
||||||
|
bool check);
|
||||||
|
|
||||||
|
bool flashcalw_erase_gp_fuse_byte(uint32_t gp_fuse_byte, bool check);
|
||||||
|
|
||||||
|
bool flashcalw_erase_all_gp_fuses(bool check);
|
||||||
|
|
||||||
|
void flashcalw_write_gp_fuse_bit(uint32_t gp_fuse_bit, bool value);
|
||||||
|
|
||||||
|
void flashcalw_write_gp_fuse_bitfield(uint32_t pos, uint32_t width,
|
||||||
|
uint64_t value);
|
||||||
|
|
||||||
|
void flashcalw_write_gp_fuse_byte(uint32_t gp_fuse_byte, uint8_t value);
|
||||||
|
|
||||||
|
void flashcalw_write_all_gp_fuses(uint64_t value);
|
||||||
|
|
||||||
|
void flashcalw_set_gp_fuse_bit(uint32_t gp_fuse_bit, bool value);
|
||||||
|
|
||||||
|
void flashcalw_set_gp_fuse_bitfield(uint32_t pos, uint32_t width,
|
||||||
|
uint64_t value);
|
||||||
|
|
||||||
|
void flashcalw_set_gp_fuse_byte(uint32_t gp_fuse_byte, uint8_t value);
|
||||||
|
|
||||||
|
void flashcalw_set_all_gp_fuses(uint64_t value);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
|
||||||
|
/*! \name Access to Flash Pages
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
void flashcalw_clear_page_buffer(void);
|
||||||
|
|
||||||
|
bool flashcalw_is_page_erased(void);
|
||||||
|
|
||||||
|
bool flashcalw_quick_page_read(int page_number);
|
||||||
|
|
||||||
|
bool flashcalw_erase_page(int page_number, bool check);
|
||||||
|
|
||||||
|
bool flashcalw_erase_all_pages(bool check);
|
||||||
|
|
||||||
|
void flashcalw_write_page(int page_number);
|
||||||
|
|
||||||
|
bool flashcalw_quick_user_page_read(void);
|
||||||
|
|
||||||
|
bool flashcalw_erase_user_page(bool check);
|
||||||
|
|
||||||
|
void flashcalw_write_user_page(void);
|
||||||
|
|
||||||
|
volatile void *flashcalw_memset8(volatile void *dst, uint8_t src,
|
||||||
|
size_t nbytes, bool erase);
|
||||||
|
|
||||||
|
volatile void *flashcalw_memset16(volatile void *dst, uint16_t src,
|
||||||
|
size_t nbytes, bool erase);
|
||||||
|
|
||||||
|
volatile void *flashcalw_memset32(volatile void *dst, uint32_t src,
|
||||||
|
size_t nbytes, bool erase);
|
||||||
|
|
||||||
|
volatile void *flashcalw_memset64(volatile void *dst, uint64_t src,
|
||||||
|
size_t nbytes, bool erase);
|
||||||
|
|
||||||
|
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
|
||||||
|
* from the repeated \a src big-endian source pattern.
|
||||||
|
*
|
||||||
|
* All pointer and size alignments are supported.
|
||||||
|
*
|
||||||
|
* \param dst Pointer to flash destination.
|
||||||
|
* \param src Source double-word.
|
||||||
|
* \param src_width \a src width in bits: 8, 16, 32 or 64.
|
||||||
|
* \param nbytes Number of bytes to set.
|
||||||
|
* \param erase Whether to erase before writing: \c true or \c false.
|
||||||
|
*
|
||||||
|
* \return The value of \a dst.
|
||||||
|
*
|
||||||
|
* \warning This function may be called with \a erase set to \c false only if
|
||||||
|
* the destination consists only of erased words, i.e. this function
|
||||||
|
* can not be used to write only one bit of a previously written word.
|
||||||
|
* E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
|
||||||
|
* resulting value in flash may be different from \c 0x00000000.
|
||||||
|
*
|
||||||
|
* \warning A Lock Error is issued if the command is applied to pages belonging
|
||||||
|
* to a locked region or to the bootloader protected area.
|
||||||
|
*
|
||||||
|
* \note The FLASHCALW error status returned by \ref flashcalw_is_lock_error and
|
||||||
|
* \ref flashcalw_is_programming_error is updated.
|
||||||
|
*/
|
||||||
|
#define flashcalw_memset(dst, src, src_width, nbytes, erase) \
|
||||||
|
TPASTE2(flashcalw_memset, src_width) ((dst), (src), (nbytes), (erase))
|
||||||
|
|
||||||
|
volatile void *flashcalw_memcpy(volatile void *dst, const void *src,
|
||||||
|
size_t nbytes, bool erase);
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name PicoCache interfaces.
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
|
||||||
|
void flashcalw_picocache_enable(void);
|
||||||
|
|
||||||
|
void flashcalw_picocache_disable(void);
|
||||||
|
|
||||||
|
uint32_t flashcalw_picocache_get_status(void);
|
||||||
|
|
||||||
|
void flashcalw_picocache_invalid_all(void);
|
||||||
|
|
||||||
|
void flashcalw_picocache_invalid_line(uint32_t index);
|
||||||
|
|
||||||
|
void flashcalw_picocache_set_monitor_mode(uint32_t mode);
|
||||||
|
|
||||||
|
void flashcalw_picocache_enable_monitor(void);
|
||||||
|
|
||||||
|
void flashcalw_picocache_disable_monitor(void);
|
||||||
|
|
||||||
|
void flashcalw_picocache_reset_monitor( void );
|
||||||
|
|
||||||
|
uint32_t flashcalw_picocache_get_monitor_cnt( void );
|
||||||
|
|
||||||
|
uint32_t flashcalw_picocache_get_version( void );
|
||||||
|
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \page sam_flashcalw_quickstart Quickstart guide for SAM FLASHCALW driver
|
||||||
|
*
|
||||||
|
* This is the quickstart guide for the \ref group_sam_drivers_flashcalw
|
||||||
|
* "SAM FLASHCALW driver", with step-by-step instructions on how to
|
||||||
|
* configure and use the driver in a selection of use cases.
|
||||||
|
*
|
||||||
|
* The use cases contain several code fragments. The code fragments in the
|
||||||
|
* steps for setup can be copied into a custom initialization function, while
|
||||||
|
* the steps for usage can be copied into, e.g., the main application function.
|
||||||
|
*
|
||||||
|
* \section flashcalw_basic_use_case Basic use case
|
||||||
|
* In this basic use case, the last page page and the user page will be written
|
||||||
|
* with a specific magic number.
|
||||||
|
*
|
||||||
|
* \subsection sam_flashcalw_quickstart_prereq Prerequisites
|
||||||
|
* -# \ref sysclk_group "System Clock Management (Sysclock)"
|
||||||
|
*
|
||||||
|
* \section flashcalw_basic_use_case_setup Setup steps
|
||||||
|
* \note The CLK_FLASHCALW_AHB, CLK_FLASHCALW_APB are enabled
|
||||||
|
* by default.
|
||||||
|
* \subsection flashcalw_basic_use_case_setup_code Example code
|
||||||
|
* Enable the following macro in the conf_clock.h:
|
||||||
|
* \code
|
||||||
|
* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST
|
||||||
|
* #define CONFIG_RCFAST_FRANGE 2
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* Add the following code in the application C-file:
|
||||||
|
* \code
|
||||||
|
* sysclk_init();
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection flashcalw_basic_use_case_setup_flow Workflow
|
||||||
|
* -# Set system clock source as fast RC oscillator:
|
||||||
|
* - \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST \endcode
|
||||||
|
* -# Set fast RC oscillator as 12MHz:
|
||||||
|
* - \code #define CONFIG_RCFAST_FRANGE 2 \endcode
|
||||||
|
* -# Initialize the system clock.
|
||||||
|
* - \code sysclk_init(); \endcode
|
||||||
|
*
|
||||||
|
* \section flashcalw_basic_use_case_usage Usage steps
|
||||||
|
* \subsection flashcalw_basic_use_case_usage_code Example code
|
||||||
|
* Add to, e.g., main loop in application C-file:
|
||||||
|
* \code
|
||||||
|
* #define MAGIC_NUM 0x4c4d5441
|
||||||
|
* #define PAGE_ADDRESS (FLASH_ADDR + FLASH_SIZE - FLASH_PAGE_SIZE)
|
||||||
|
* #define USER_PAGE_ADDRESS (FLASH_USER_PAGE_ADDR + 8)
|
||||||
|
* static const uint32_t write_data = MAGIC_NUM;
|
||||||
|
*
|
||||||
|
* flashcalw_memcpy((void *)PAGE_ADDRESS, &write_data, 4, true);
|
||||||
|
* flashcalw_memcpy((void *)USER_PAGE_ADDRESS, &write_data, 4, true);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
* \subsection flashcalw_basic_use_case_usage_flow Workflow
|
||||||
|
* -# Define the written locations and magic number:
|
||||||
|
* - \code #define MAGIC_NUM 0x4c4d5441 \endcode
|
||||||
|
* - \code #define PAGE_ADDRESS (FLASH_ADDR + FLASH_SIZE - FLASH_PAGE_SIZE)
|
||||||
|
* \endcode
|
||||||
|
* - \code USER_PAGE_ADDRESS (FLASH_USER_PAGE_ADDR + 8) \endcode
|
||||||
|
* - \note The storage location must not at the beginning of the user page as the first 2
|
||||||
|
* words of the user page is reserved.
|
||||||
|
* - \code static const uint32_t write_data = MAGIC_NUM; \endcode
|
||||||
|
* -# Write the magic number to the flash array:
|
||||||
|
* - \code flashcalw_memcpy((void *)PAGE_ADDRESS, &write_data, 4, true); \endcode
|
||||||
|
* -# Write the magic number to the user page:
|
||||||
|
* - \code flashcalw_memcpy((void *)USER_PAGE_ADDRESS, &write_data, 4, true);
|
||||||
|
* \endcode
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#endif /* FLASHCALW_H_INCLUDED */
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,122 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief ASF Patch Header file definitions for SAM4L.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SAM4L_PATCH_ASF_H_INCLUDED
|
||||||
|
#define SAM4L_PATCH_ASF_H_INCLUDED
|
||||||
|
|
||||||
|
// These defines are used for sam/drivers/flashcalw implementation.
|
||||||
|
#define FLASHCALW_FCMD_CMD_HSEN (0x10u << 0)
|
||||||
|
#define FLASHCALW_FCMD_CMD_HSDIS (0x11u << 0)
|
||||||
|
|
||||||
|
// These defines are used to keep compatibility with existing
|
||||||
|
// sam/drivers/usart implementation from SAM3/4 products with SAM4L product.
|
||||||
|
#define US_MR_USART_MODE_HW_HANDSHAKING US_MR_USART_MODE_HARDWARE
|
||||||
|
#define US_MR_USART_MODE_IS07816_T_0 US_MR_USART_MODE_ISO7816_T0
|
||||||
|
#define US_MR_USART_MODE_IS07816_T_1 US_MR_USART_MODE_ISO7816_T1
|
||||||
|
#define US_MR_NBSTOP_2_BIT US_MR_NBSTOP_2
|
||||||
|
#define US_MR_NBSTOP_1_5_BIT US_MR_NBSTOP_1_5
|
||||||
|
#define US_MR_NBSTOP_1_BIT US_MR_NBSTOP_1
|
||||||
|
#define US_MR_CHRL_8_BIT US_MR_CHRL_8
|
||||||
|
#define US_MR_PAR_NO US_MR_PAR_NONE
|
||||||
|
#define US_MR_PAR_MULTIDROP US_MR_PAR_MULTI
|
||||||
|
#define US_IF US_IFR
|
||||||
|
#define US_WPSR_WPVS US_WPSR_WPV_1
|
||||||
|
|
||||||
|
#if (!defined SCIF_RCOSC_FREQUENCY)
|
||||||
|
# define SCIF_RCOSC_FREQUENCY 115200
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// These defines for homogeneity with other SAM header files.
|
||||||
|
#define CHIP_FREQ_FWS_0 (18000000UL) /**< \brief Maximum operating frequency when FWS is 0 */
|
||||||
|
#define CHIP_FREQ_FWS_1 (36000000UL) /**< \brief Maximum operating frequency when FWS is 1 */
|
||||||
|
// WARNING NOTE: these are preliminary values.
|
||||||
|
#define CHIP_FREQ_FLASH_HSEN_FWS_0 (18000000UL) /**< \brief Maximum operating frequency when FWS is 0 and the FLASH HS mode is enabled */
|
||||||
|
#define CHIP_FREQ_FLASH_HSEN_FWS_1 (36000000UL) /**< \brief Maximum operating frequency when FWS is 1 and the FLASH HS mode is enabled */
|
||||||
|
|
||||||
|
// Size of HRAMC1 with 32-bit access
|
||||||
|
#undef HRAMC1_SIZE
|
||||||
|
#define HRAMC1_SIZE (0x800UL)
|
||||||
|
|
||||||
|
// USBC related offsets
|
||||||
|
#define USBC_UHINT_P0INT_Pos 8
|
||||||
|
#define USBC_UHINTE_P0INTE_Pos 8
|
||||||
|
#define USBC_UPCFG0_PBK_Pos 2
|
||||||
|
#define USBC_UPCFG0_PBK_Msk (0x1u << USBC_UPCFG0_PBK_Pos)
|
||||||
|
|
||||||
|
// These defines are used to keep compatibility with existing
|
||||||
|
// sam/drivers/tc implementation from SAM3/4 products with SAM4L product.
|
||||||
|
#define TC_SMMR TC_SMC
|
||||||
|
#define TC_CMR_LDRA_RISING TC_CMR_LDRA_POS_EDGE_TIOA
|
||||||
|
#define TC_CMR_LDRB_FALLING TC_CMR_LDRB_NEG_EDGE_TIOA
|
||||||
|
#define TC_CMR_ETRGEDG_FALLING TC_CMR_ETRGEDG_NEG_EDGE
|
||||||
|
|
||||||
|
// These defines are used to keep compatibility with existing
|
||||||
|
// sam/drivers/spi implementation from SAM3/4 products with SAM4L product.
|
||||||
|
#define SPI_CSR_BITS_8_BIT SPI_CSR_BITS_8_BPT
|
||||||
|
|
||||||
|
#define SPI_WPSR_WPVS_Pos SPI_WPSR_SPIWPVS_Pos
|
||||||
|
#define SPI_WPSR_WPVS_Msk SPI_WPSR_SPIWPVS_Msk
|
||||||
|
#define SPI_WPSR_WPVSRC_Pos SPI_WPSR_SPIWPVSRC_Pos
|
||||||
|
#define SPI_WPSR_WPVSRC_Msk SPI_WPSR_SPIWPVSRC_Msk
|
||||||
|
|
||||||
|
// These defines are used to keep compatibility with existing
|
||||||
|
// sam/drivers/crccu implementation from SAM3/4 products with SAM4L product.
|
||||||
|
#define CRCCU_DMA_EN CRCCU_DMAEN
|
||||||
|
#define CRCCU_DMA_DIS CRCCU_DMADIS
|
||||||
|
#define CRCCU_DMA_SR CRCCU_DMASR
|
||||||
|
#define CRCCU_DMA_IER CRCCU_DMAIER
|
||||||
|
#define CRCCU_DMA_IDR CRCCU_DMAIDR
|
||||||
|
#define CRCCU_DMA_IMR CRCCU_DMAIMR
|
||||||
|
#define CRCCU_DMA_ISR CRCCU_DMAISR
|
||||||
|
#define CRCCU_DMA_EN_DMAEN CRCCU_DMAEN_DMAEN
|
||||||
|
#define CRCCU_DMA_DIS_DMADIS CRCCU_DMADIS_DMADIS
|
||||||
|
#define CRCCU_DMA_SR_DMASR CRCCU_DMASR_DMASR
|
||||||
|
#define CRCCU_DMA_IER_DMAIER CRCCU_DMAIER_DMAIER
|
||||||
|
#define CRCCU_DMA_IDR_DMAIDR CRCCU_DMAIDR_DMAIDR
|
||||||
|
#define CRCCU_DMA_IMR_DMAIMR CRCCU_DMAIMR_DMAIMR
|
||||||
|
#define CRCCU_DMA_ISR_DMAISR CRCCU_DMAISR_DMAISR
|
||||||
|
#define CRCCU_MR_PTYPE_CCITT8023 CRCCU_MR_PTYPE(0)
|
||||||
|
#define CRCCU_MR_PTYPE_CASTAGNOLI CRCCU_MR_PTYPE(1)
|
||||||
|
#define CRCCU_MR_PTYPE_CCITT16 CRCCU_MR_PTYPE(2)
|
||||||
|
|
||||||
|
#endif // SAM4L_PATCH_ASF_H_INCLUDED
|
||||||
|
|
@ -0,0 +1,269 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief This file contains the default exception handlers.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
* \par Purpose
|
||||||
|
*
|
||||||
|
* This file provides basic support for Cortex-M processor based
|
||||||
|
* microcontrollers.
|
||||||
|
*
|
||||||
|
* \note
|
||||||
|
* The exception handler has weak aliases.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "exceptions.h"
|
||||||
|
|
||||||
|
/* @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/* @endcond */
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
/* Cortex-M3 core handlers */
|
||||||
|
void Reset_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void NMI_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void MemManage_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void BusFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void UsageFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SVC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void DebugMon_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
|
||||||
|
/* Peripherals handlers */
|
||||||
|
void ABDACB_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void ACIFC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void ADCIFE_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AESA_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AST_ALARM_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AST_CLKREADY_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AST_OVF_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AST_PER_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AST_READY_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void BPM_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void BSCIF_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void CATB_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void CRCCU_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void DACC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_2_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_3_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_4_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_5_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_6_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_7_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EIC_8_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void FREQM_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_0_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_10_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_11_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_2_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_3_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_4_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_5_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_6_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_7_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_8_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void GPIO_9_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void HFLASHC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void IISC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void LCDCA_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PARC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_0_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_10_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_11_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_12_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_13_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_14_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_15_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_2_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_3_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_4_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_5_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_6_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_7_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_8_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PDCA_9_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PEVC_OV_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PEVC_TR_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void PM_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SCIF_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SPI_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC00_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC01_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC02_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC10_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC11_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC12_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TRNG_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIM0_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIM1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIM2_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIM3_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIS0_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TWIS1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void USART0_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void USART1_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void USART2_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void USART3_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void USBC_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void WDT_Handler(void) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif /* __GNUC__ */
|
||||||
|
|
||||||
|
#ifdef __ICCARM__
|
||||||
|
/* Cortex-M3 core handlers */
|
||||||
|
#pragma weak Reset_Handler=Dummy_Handler
|
||||||
|
#pragma weak NMI_Handler=Dummy_Handler
|
||||||
|
#pragma weak HardFault_Handler=Dummy_Handler
|
||||||
|
#pragma weak MemManage_Handler=Dummy_Handler
|
||||||
|
#pragma weak BusFault_Handler=Dummy_Handler
|
||||||
|
#pragma weak UsageFault_Handler=Dummy_Handler
|
||||||
|
#pragma weak SVC_Handler=Dummy_Handler
|
||||||
|
#pragma weak DebugMon_Handler=Dummy_Handler
|
||||||
|
#pragma weak PendSV_Handler=Dummy_Handler
|
||||||
|
#pragma weak SysTick_Handler=Dummy_Handler
|
||||||
|
|
||||||
|
/* Peripherals handlers */
|
||||||
|
#pragma weak ABDACB_Handler = Dummy_Handler
|
||||||
|
#pragma weak ACIFC_Handler = Dummy_Handler
|
||||||
|
#pragma weak ADCIFE_Handler = Dummy_Handler
|
||||||
|
#pragma weak AESA_Handler = Dummy_Handler
|
||||||
|
#pragma weak AST_ALARM_Handler = Dummy_Handler
|
||||||
|
#pragma weak AST_CLKREADY_Handler = Dummy_Handler
|
||||||
|
#pragma weak AST_OVF_Handler = Dummy_Handler
|
||||||
|
#pragma weak AST_PER_Handler = Dummy_Handler
|
||||||
|
#pragma weak AST_READY_Handler = Dummy_Handler
|
||||||
|
#pragma weak BPM_Handler = Dummy_Handler
|
||||||
|
#pragma weak BSCIF_Handler = Dummy_Handler
|
||||||
|
#pragma weak CATB_Handler = Dummy_Handler
|
||||||
|
#pragma weak CRCCU_Handler = Dummy_Handler
|
||||||
|
#pragma weak DACC_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_1_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_2_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_3_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_4_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_5_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_6_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_7_Handler = Dummy_Handler
|
||||||
|
#pragma weak EIC_8_Handler = Dummy_Handler
|
||||||
|
#pragma weak FREQM_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_0_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_1_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_10_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_11_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_2_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_3_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_4_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_5_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_6_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_7_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_8_Handler = Dummy_Handler
|
||||||
|
#pragma weak GPIO_9_Handler = Dummy_Handler
|
||||||
|
#pragma weak HFLASHC_Handler = Dummy_Handler
|
||||||
|
#pragma weak IISC_Handler = Dummy_Handler
|
||||||
|
#pragma weak LCDCA_Handler = Dummy_Handler
|
||||||
|
#pragma weak PARC_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_0_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_1_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_10_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_11_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_12_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_13_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_14_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_15_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_2_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_3_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_4_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_5_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_6_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_7_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_8_Handler = Dummy_Handler
|
||||||
|
#pragma weak PDCA_9_Handler = Dummy_Handler
|
||||||
|
#pragma weak PEVC_OV_Handler = Dummy_Handler
|
||||||
|
#pragma weak PEVC_TR_Handler = Dummy_Handler
|
||||||
|
#pragma weak PM_Handler = Dummy_Handler
|
||||||
|
#pragma weak SCIF_Handler = Dummy_Handler
|
||||||
|
#pragma weak SPI_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC00_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC01_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC02_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC10_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC11_Handler = Dummy_Handler
|
||||||
|
#pragma weak TC12_Handler = Dummy_Handler
|
||||||
|
#pragma weak TRNG_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIM0_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIM1_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIM2_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIM3_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIS0_Handler = Dummy_Handler
|
||||||
|
#pragma weak TWIS1_Handler = Dummy_Handler
|
||||||
|
#pragma weak USART0_Handler = Dummy_Handler
|
||||||
|
#pragma weak USART1_Handler = Dummy_Handler
|
||||||
|
#pragma weak USART2_Handler = Dummy_Handler
|
||||||
|
#pragma weak USART3_Handler = Dummy_Handler
|
||||||
|
#pragma weak USBC_Handler = Dummy_Handler
|
||||||
|
#pragma weak WDT_Handler = Dummy_Handler
|
||||||
|
#endif /* __ICCARM__ */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Default interrupt handler for unused IRQs.
|
||||||
|
*/
|
||||||
|
void Dummy_Handler(void)
|
||||||
|
{
|
||||||
|
while (1) {
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/* @endcond */
|
||||||
|
|
@ -0,0 +1,71 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief This file contains the interface for default exception handlers.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef EXCEPTIONS_H_INCLUDED
|
||||||
|
#define EXCEPTIONS_H_INCLUDED
|
||||||
|
|
||||||
|
#include "sam4l.h"
|
||||||
|
|
||||||
|
/* @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/* @endcond */
|
||||||
|
|
||||||
|
/* Function prototype for exception table items (interrupt handler). */
|
||||||
|
typedef void (*IntFunc) (void);
|
||||||
|
|
||||||
|
/* Default empty handler */
|
||||||
|
void Dummy_Handler(void);
|
||||||
|
|
||||||
|
/* @cond 0 */
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/* @endcond */
|
||||||
|
|
||||||
|
#endif /* EXCEPTIONS_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,205 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief GCC Startup file for SAM4L.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "exceptions.h"
|
||||||
|
#include "sam4l.h"
|
||||||
|
#include "system_sam4l.h"
|
||||||
|
|
||||||
|
/* Initialize segments */
|
||||||
|
extern uint32_t _sfixed;
|
||||||
|
extern uint32_t _efixed;
|
||||||
|
extern uint32_t _etext;
|
||||||
|
extern uint32_t _srelocate;
|
||||||
|
extern uint32_t _erelocate;
|
||||||
|
extern uint32_t _szero;
|
||||||
|
extern uint32_t _ezero;
|
||||||
|
extern uint32_t _sstack;
|
||||||
|
extern uint32_t _estack;
|
||||||
|
|
||||||
|
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
|
||||||
|
int main(void);
|
||||||
|
/** \endcond */
|
||||||
|
|
||||||
|
void __libc_init_array(void);
|
||||||
|
|
||||||
|
/* Exception Table */
|
||||||
|
__attribute__ ((section(".vectors")))
|
||||||
|
IntFunc exception_table[] = {
|
||||||
|
|
||||||
|
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||||
|
(IntFunc) (&_estack),
|
||||||
|
Reset_Handler,
|
||||||
|
|
||||||
|
NMI_Handler,
|
||||||
|
HardFault_Handler,
|
||||||
|
MemManage_Handler,
|
||||||
|
BusFault_Handler,
|
||||||
|
UsageFault_Handler,
|
||||||
|
0, 0, 0, 0, /* Reserved */
|
||||||
|
SVC_Handler,
|
||||||
|
DebugMon_Handler,
|
||||||
|
0, /* Reserved */
|
||||||
|
PendSV_Handler,
|
||||||
|
SysTick_Handler,
|
||||||
|
|
||||||
|
// Configurable interrupts
|
||||||
|
HFLASHC_Handler, // 0
|
||||||
|
PDCA_0_Handler, // 1
|
||||||
|
PDCA_1_Handler, // 2
|
||||||
|
PDCA_2_Handler, // 3
|
||||||
|
PDCA_3_Handler, // 4
|
||||||
|
PDCA_4_Handler, // 5
|
||||||
|
PDCA_5_Handler, // 6
|
||||||
|
PDCA_6_Handler, // 7
|
||||||
|
PDCA_7_Handler, // 8
|
||||||
|
PDCA_8_Handler, // 9
|
||||||
|
PDCA_9_Handler, // 10
|
||||||
|
PDCA_10_Handler, // 11
|
||||||
|
PDCA_11_Handler, // 12
|
||||||
|
PDCA_12_Handler, // 13
|
||||||
|
PDCA_13_Handler, // 14
|
||||||
|
PDCA_14_Handler, // 15
|
||||||
|
PDCA_15_Handler, // 16
|
||||||
|
CRCCU_Handler, // 17
|
||||||
|
USBC_Handler, // 18
|
||||||
|
PEVC_TR_Handler, // 19
|
||||||
|
PEVC_OV_Handler, // 20
|
||||||
|
AESA_Handler, // 21
|
||||||
|
PM_Handler, // 22
|
||||||
|
SCIF_Handler, // 23
|
||||||
|
FREQM_Handler, // 24
|
||||||
|
GPIO_0_Handler, // 25
|
||||||
|
GPIO_1_Handler, // 26
|
||||||
|
GPIO_2_Handler, // 27
|
||||||
|
GPIO_3_Handler, // 28
|
||||||
|
GPIO_4_Handler, // 29
|
||||||
|
GPIO_5_Handler, // 30
|
||||||
|
GPIO_6_Handler, // 31
|
||||||
|
GPIO_7_Handler, // 32
|
||||||
|
GPIO_8_Handler, // 33
|
||||||
|
GPIO_9_Handler, // 34
|
||||||
|
GPIO_10_Handler, // 35
|
||||||
|
GPIO_11_Handler, // 36
|
||||||
|
BPM_Handler, // 37
|
||||||
|
BSCIF_Handler, // 38
|
||||||
|
AST_ALARM_Handler, // 39
|
||||||
|
AST_PER_Handler, // 40
|
||||||
|
AST_OVF_Handler, // 41
|
||||||
|
AST_READY_Handler, // 42
|
||||||
|
AST_CLKREADY_Handler, // 43
|
||||||
|
WDT_Handler, // 44
|
||||||
|
EIC_1_Handler, // 45
|
||||||
|
EIC_2_Handler, // 46
|
||||||
|
EIC_3_Handler, // 47
|
||||||
|
EIC_4_Handler, // 48
|
||||||
|
EIC_5_Handler, // 49
|
||||||
|
EIC_6_Handler, // 50
|
||||||
|
EIC_7_Handler, // 51
|
||||||
|
EIC_8_Handler, // 52
|
||||||
|
IISC_Handler, // 53
|
||||||
|
SPI_Handler, // 54
|
||||||
|
TC00_Handler, // 55
|
||||||
|
TC01_Handler, // 56
|
||||||
|
TC02_Handler, // 57
|
||||||
|
TC10_Handler, // 58
|
||||||
|
TC11_Handler, // 59
|
||||||
|
TC12_Handler, // 60
|
||||||
|
TWIM0_Handler, // 61
|
||||||
|
TWIS0_Handler, // 62
|
||||||
|
TWIM1_Handler, // 63
|
||||||
|
TWIS1_Handler, // 64
|
||||||
|
USART0_Handler, // 65
|
||||||
|
USART1_Handler, // 66
|
||||||
|
USART2_Handler, // 67
|
||||||
|
USART3_Handler, // 68
|
||||||
|
ADCIFE_Handler, // 69
|
||||||
|
DACC_Handler, // 70
|
||||||
|
ACIFC_Handler, // 71
|
||||||
|
ABDACB_Handler, // 72
|
||||||
|
TRNG_Handler, // 73
|
||||||
|
PARC_Handler, // 74
|
||||||
|
CATB_Handler, // 75
|
||||||
|
Dummy_Handler, // one not used
|
||||||
|
TWIM2_Handler, // 77
|
||||||
|
TWIM3_Handler, // 78
|
||||||
|
LCDCA_Handler // 79
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief This is the code that gets called on processor reset.
|
||||||
|
* To initialize the device, and call the main() routine.
|
||||||
|
*/
|
||||||
|
void Reset_Handler(void)
|
||||||
|
{
|
||||||
|
uint32_t *pSrc, *pDest;
|
||||||
|
|
||||||
|
/* Initialize the relocate segment */
|
||||||
|
pSrc = &_etext;
|
||||||
|
pDest = &_srelocate;
|
||||||
|
|
||||||
|
if (pSrc != pDest) {
|
||||||
|
for (; pDest < &_erelocate;) {
|
||||||
|
*pDest++ = *pSrc++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Clear the zero segment */
|
||||||
|
for (pDest = &_szero; pDest < &_ezero;) {
|
||||||
|
*pDest++ = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set the vector table base address */
|
||||||
|
pSrc = (uint32_t *) &_sfixed;
|
||||||
|
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
|
||||||
|
|
||||||
|
/* Initialize the C library */
|
||||||
|
__libc_init_array();
|
||||||
|
|
||||||
|
/* Branch to main function */
|
||||||
|
main();
|
||||||
|
|
||||||
|
/* Infinite loop */
|
||||||
|
while (1);
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,62 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Low-level initialization functions called upon chip startup.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SYSTEM_SAM4L_H_INCLUDED
|
||||||
|
#define SYSTEM_SAM4L_H_INCLUDED
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
void SystemInit(void);
|
||||||
|
void SystemCoreClockUpdate(void);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* SYSTEM_SAM4L_H_INCLUDED */
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,90 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Arch file for SAM.
|
||||||
|
*
|
||||||
|
* This file defines common SAM series.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _SAM_IO_
|
||||||
|
#define _SAM_IO_
|
||||||
|
|
||||||
|
/* SAM3 family */
|
||||||
|
|
||||||
|
/* SAM3S series */
|
||||||
|
#if (SAM3S)
|
||||||
|
# if (SAM3S8 || SAM3SD8)
|
||||||
|
# include "sam3s8.h"
|
||||||
|
# else
|
||||||
|
# include "sam3s.h"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM3U series */
|
||||||
|
#if (SAM3U)
|
||||||
|
# include "sam3u.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM3N series */
|
||||||
|
#if (SAM3N)
|
||||||
|
# include "sam3n.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM3XA series */
|
||||||
|
#if (SAM3XA)
|
||||||
|
# include "sam3xa.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM4S series */
|
||||||
|
#if (SAM4S)
|
||||||
|
# include "sam4s.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM4L series */
|
||||||
|
#if (SAM4L)
|
||||||
|
# include "sam4l.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SAM4E series */
|
||||||
|
#if (SAM4E)
|
||||||
|
# include "sam4e.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* _SAM_IO_ */
|
||||||
|
|
@ -0,0 +1,154 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Flash Linker script for SAM.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||||
|
OUTPUT_ARCH(arm)
|
||||||
|
SEARCH_DIR(.)
|
||||||
|
|
||||||
|
/* Memory Spaces Definitions */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 /* flash, 256K */
|
||||||
|
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* sram, 32K */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
|
||||||
|
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
|
||||||
|
|
||||||
|
/* Section Definitions */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sfixed = .;
|
||||||
|
KEEP(*(.vectors .vectors.*))
|
||||||
|
*(.text .text.* .gnu.linkonce.t.*)
|
||||||
|
*(.glue_7t) *(.glue_7)
|
||||||
|
*(.rodata .rodata* .gnu.linkonce.r.*)
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
|
||||||
|
/* Support C constructors, and C destructors in both user code
|
||||||
|
and the C library. This also provides support for C++ code. */
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.init))
|
||||||
|
. = ALIGN(4);
|
||||||
|
__preinit_array_start = .;
|
||||||
|
KEEP (*(.preinit_array))
|
||||||
|
__preinit_array_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__init_array_start = .;
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array))
|
||||||
|
__init_array_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(0x4);
|
||||||
|
KEEP (*crtbegin.o(.ctors))
|
||||||
|
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||||
|
KEEP (*(SORT(.ctors.*)))
|
||||||
|
KEEP (*crtend.o(.ctors))
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__fini_array_start = .;
|
||||||
|
KEEP (*(.fini_array))
|
||||||
|
KEEP (*(SORT(.fini_array.*)))
|
||||||
|
__fini_array_end = .;
|
||||||
|
|
||||||
|
KEEP (*crtbegin.o(.dtors))
|
||||||
|
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||||
|
KEEP (*(SORT(.dtors.*)))
|
||||||
|
KEEP (*crtend.o(.dtors))
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_efixed = .; /* End of text section */
|
||||||
|
} > rom
|
||||||
|
|
||||||
|
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||||
|
PROVIDE_HIDDEN (__exidx_start = .);
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
} > rom
|
||||||
|
PROVIDE_HIDDEN (__exidx_end = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_etext = .;
|
||||||
|
|
||||||
|
.relocate : AT (_etext)
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_srelocate = .;
|
||||||
|
*(.ramfunc .ramfunc.*);
|
||||||
|
*(.data .data.*);
|
||||||
|
. = ALIGN(4);
|
||||||
|
_erelocate = .;
|
||||||
|
} > ram
|
||||||
|
|
||||||
|
/* .bss section which is used for uninitialized data */
|
||||||
|
.bss (NOLOAD) :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sbss = . ;
|
||||||
|
_szero = .;
|
||||||
|
*(.bss .bss.*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN(4);
|
||||||
|
_ebss = . ;
|
||||||
|
_ezero = .;
|
||||||
|
} > ram
|
||||||
|
|
||||||
|
/* stack section */
|
||||||
|
.stack (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(8);
|
||||||
|
_sstack = .;
|
||||||
|
. = . + __stack_size__;
|
||||||
|
. = ALIGN(8);
|
||||||
|
_estack = .;
|
||||||
|
} > ram
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_end = . ;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,496 @@
|
||||||
|
# List of available make goals:
|
||||||
|
#
|
||||||
|
# all Default target, builds the project
|
||||||
|
# clean Clean up the project
|
||||||
|
# rebuild Rebuild the project
|
||||||
|
# debug_flash Builds the project and debug in flash
|
||||||
|
# debug_sram Builds the project and debug in sram
|
||||||
|
#
|
||||||
|
# doc Build the documentation
|
||||||
|
# cleandoc Clean up the documentation
|
||||||
|
# rebuilddoc Rebuild the documentation
|
||||||
|
#
|
||||||
|
# \file
|
||||||
|
#
|
||||||
|
# Copyright (c) 2011 - 2012 Atmel Corporation. All rights reserved.
|
||||||
|
#
|
||||||
|
# \asf_license_start
|
||||||
|
#
|
||||||
|
# \page License
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions are met:
|
||||||
|
#
|
||||||
|
# 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
# this list of conditions and the following disclaimer.
|
||||||
|
#
|
||||||
|
# 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
# this list of conditions and the following disclaimer in the documentation
|
||||||
|
# and/or other materials provided with the distribution.
|
||||||
|
#
|
||||||
|
# 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
# from this software without specific prior written permission.
|
||||||
|
#
|
||||||
|
# 4. This software may only be redistributed and used in connection with an
|
||||||
|
# Atmel microcontroller product.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
# EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
# POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
# \asf_license_stop
|
||||||
|
#
|
||||||
|
|
||||||
|
# Include the config.mk file from the current working path, e.g., where the
|
||||||
|
# user called make.
|
||||||
|
include config.mk
|
||||||
|
|
||||||
|
# Tool to use to generate documentation from the source code
|
||||||
|
DOCGEN ?= doxygen
|
||||||
|
|
||||||
|
# Look for source files relative to the top-level source directory
|
||||||
|
VPATH := $(PRJ_PATH)
|
||||||
|
|
||||||
|
# Output target file
|
||||||
|
project_type := $(PROJECT_TYPE)
|
||||||
|
|
||||||
|
# Output target file
|
||||||
|
ifeq ($(project_type),flash)
|
||||||
|
target := $(TARGET_FLASH)
|
||||||
|
linker_script := $(PRJ_PATH)/$(LINKER_SCRIPT_FLASH)
|
||||||
|
debug_script := $(PRJ_PATH)/$(DEBUG_SCRIPT_FLASH)
|
||||||
|
else
|
||||||
|
target := $(TARGET_SRAM)
|
||||||
|
linker_script := $(PRJ_PATH)/$(LINKER_SCRIPT_SRAM)
|
||||||
|
debug_script := $(PRJ_PATH)/$(DEBUG_SCRIPT_SRAM)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Output project name (target name minus suffix)
|
||||||
|
project := $(basename $(target))
|
||||||
|
|
||||||
|
# Output target file (typically ELF or static library)
|
||||||
|
ifeq ($(suffix $(target)),.a)
|
||||||
|
target_type := lib
|
||||||
|
else
|
||||||
|
ifeq ($(suffix $(target)),.elf)
|
||||||
|
target_type := elf
|
||||||
|
else
|
||||||
|
$(error "Target type $(target_type) is not supported")
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Allow override of operating system detection. The user can add OS=Linux or
|
||||||
|
# OS=Windows on the command line to explicit set the host OS.
|
||||||
|
#
|
||||||
|
# This allows to work around broken uname utility on certain systems.
|
||||||
|
ifdef OS
|
||||||
|
ifeq ($(strip $(OS)), Linux)
|
||||||
|
os_type := Linux
|
||||||
|
endif
|
||||||
|
ifeq (Windows,$(findstring Windows,$(OS)))
|
||||||
|
os_type := windows32_64
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
#os_type ?= $(strip $(shell uname))
|
||||||
|
|
||||||
|
#ifeq ($(os_type),windows32)
|
||||||
|
#os := Windows
|
||||||
|
#else
|
||||||
|
#ifeq ($(os_type),windows64)
|
||||||
|
#os := Windows
|
||||||
|
#else
|
||||||
|
#ifeq ($(os_type),)
|
||||||
|
#os := Windows
|
||||||
|
#else
|
||||||
|
## Default to Linux style operating system. Both Cygwin and mingw are fully
|
||||||
|
## compatible (for this Makefile) with Linux.
|
||||||
|
#os := Linux
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
ifeq ($(os_type),windows32_64)
|
||||||
|
os := Windows
|
||||||
|
else
|
||||||
|
ifeq ($(os_type),Linux)
|
||||||
|
os := Linux
|
||||||
|
else
|
||||||
|
os := Linux
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Output documentation directory and configuration file.
|
||||||
|
docdir := ../doxygen/html
|
||||||
|
doccfg := ../doxygen/doxyfile.doxygen
|
||||||
|
|
||||||
|
CROSS ?= arm-none-eabi-
|
||||||
|
AR := $(CROSS)ar
|
||||||
|
AS := $(CROSS)as
|
||||||
|
CC := $(CROSS)gcc
|
||||||
|
CPP := $(CROSS)gcc -E
|
||||||
|
CXX := $(CROSS)g++
|
||||||
|
LD := $(CROSS)g++
|
||||||
|
NM := $(CROSS)nm
|
||||||
|
OBJCOPY := $(CROSS)objcopy
|
||||||
|
OBJDUMP := $(CROSS)objdump
|
||||||
|
SIZE := $(CROSS)size
|
||||||
|
GDB := $(CROSS)gdb
|
||||||
|
|
||||||
|
RM := rm -f
|
||||||
|
ifeq ($(os),Windows)
|
||||||
|
#RMDIR := rmdir /S /Q
|
||||||
|
RMDIR := rm -rf
|
||||||
|
else
|
||||||
|
RMDIR := rmdir -p --ignore-fail-on-non-empty
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Strings for beautifying output
|
||||||
|
MSG_CLEAN_FILES = "RM *.o *.d"
|
||||||
|
MSG_CLEAN_DIRS = "RMDIR $(strip $(clean-dirs))"
|
||||||
|
MSG_CLEAN_DOC = "RMDIR $(docdir)"
|
||||||
|
MSG_MKDIR = "MKDIR $(dir $@)"
|
||||||
|
|
||||||
|
MSG_INFO = "INFO "
|
||||||
|
|
||||||
|
MSG_ARCHIVING = "AR $@"
|
||||||
|
MSG_ASSEMBLING = "AS $@"
|
||||||
|
MSG_BINARY_IMAGE = "OBJCOPY $@"
|
||||||
|
MSG_COMPILING = "CC $@"
|
||||||
|
MSG_COMPILING_CXX = "CXX $@"
|
||||||
|
MSG_EXTENDED_LISTING = "OBJDUMP $@"
|
||||||
|
MSG_IHEX_IMAGE = "OBJCOPY $@"
|
||||||
|
MSG_LINKING = "LN $@"
|
||||||
|
MSG_PREPROCESSING = "CPP $@"
|
||||||
|
MSG_SIZE = "SIZE $@"
|
||||||
|
MSG_SYMBOL_TABLE = "NM $@"
|
||||||
|
|
||||||
|
MSG_GENERATING_DOC = "DOXYGEN $(docdir)"
|
||||||
|
|
||||||
|
# Don't use make's built-in rules and variables
|
||||||
|
MAKEFLAGS += -rR
|
||||||
|
|
||||||
|
# Don't print 'Entering directory ...'
|
||||||
|
MAKEFLAGS += --no-print-directory
|
||||||
|
|
||||||
|
# Function for reversing the order of a list
|
||||||
|
reverse = $(if $(1),$(call reverse,$(wordlist 2,$(words $(1)),$(1)))) $(firstword $(1))
|
||||||
|
|
||||||
|
# Hide command output by default, but allow the user to override this
|
||||||
|
# by adding V=1 on the command line.
|
||||||
|
#
|
||||||
|
# This is inspired by the Kbuild system used by the Linux kernel.
|
||||||
|
ifdef V
|
||||||
|
ifeq ("$(origin V)", "command line")
|
||||||
|
VERBOSE = $(V)
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
ifndef VERBOSE
|
||||||
|
VERBOSE = 0
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(VERBOSE), 1)
|
||||||
|
Q =
|
||||||
|
else
|
||||||
|
# Q = @
|
||||||
|
Q =
|
||||||
|
endif
|
||||||
|
|
||||||
|
arflags-gnu-y := $(ARFLAGS)
|
||||||
|
asflags-gnu-y := $(ASFLAGS)
|
||||||
|
cflags-gnu-y := $(CFLAGS)
|
||||||
|
cxxflags-gnu-y := $(CXXFLAGS)
|
||||||
|
cppflags-gnu-y := $(CPPFLAGS)
|
||||||
|
cpuflags-gnu-y :=
|
||||||
|
dbgflags-gnu-y := $(DBGFLAGS)
|
||||||
|
libflags-gnu-y := $(foreach LIB,$(LIBS),-l$(LIB))
|
||||||
|
ldflags-gnu-y := $(LDFLAGS)
|
||||||
|
flashflags-gnu-y :=
|
||||||
|
clean-files :=
|
||||||
|
clean-dirs :=
|
||||||
|
|
||||||
|
clean-files += $(wildcard $(target) $(project).map)
|
||||||
|
clean-files += $(wildcard $(project).hex $(project).bin)
|
||||||
|
clean-files += $(wildcard $(project).lss $(project).sym)
|
||||||
|
clean-files += $(wildcard $(build))
|
||||||
|
|
||||||
|
# Use pipes instead of temporary files for communication between processes
|
||||||
|
cflags-gnu-y += -pipe
|
||||||
|
asflags-gnu-y += -pipe
|
||||||
|
ldflags-gnu-y += -pipe
|
||||||
|
|
||||||
|
# Archiver flags.
|
||||||
|
arflags-gnu-y += rcs
|
||||||
|
|
||||||
|
# Always enable warnings. And be very careful about implicit
|
||||||
|
# declarations.
|
||||||
|
cflags-gnu-y += -Wall -Wstrict-prototypes -Wmissing-prototypes
|
||||||
|
cflags-gnu-y += -Werror-implicit-function-declaration
|
||||||
|
cxxflags-gnu-y += -Wall
|
||||||
|
# IAR doesn't allow arithmetic on void pointers, so warn about that.
|
||||||
|
cflags-gnu-y += -Wpointer-arith
|
||||||
|
cxxflags-gnu-y += -Wpointer-arith
|
||||||
|
|
||||||
|
# Preprocessor flags.
|
||||||
|
cppflags-gnu-y += $(foreach INC,$(addprefix $(PRJ_PATH)/,$(INC_PATH)),-I$(INC))
|
||||||
|
asflags-gnu-y += $(foreach INC,$(addprefix $(PRJ_PATH)/,$(INC_PATH)),'-Wa,-I$(INC)')
|
||||||
|
|
||||||
|
# CPU specific flags.
|
||||||
|
cpuflags-gnu-y += -mcpu=$(ARCH) -mthumb -D=__$(PART)__
|
||||||
|
|
||||||
|
# Dependency file flags.
|
||||||
|
depflags = -MD -MP -MQ $@
|
||||||
|
|
||||||
|
# Debug specific flags.
|
||||||
|
ifdef BUILD_DEBUG_LEVEL
|
||||||
|
dbgflags-gnu-y += -g$(BUILD_DEBUG_LEVEL)
|
||||||
|
else
|
||||||
|
dbgflags-gnu-y += -g3
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Optimization specific flags.
|
||||||
|
ifdef BUILD_OPTIMIZATION
|
||||||
|
optflags-gnu-y = -O$(BUILD_OPTIMIZATION)
|
||||||
|
else
|
||||||
|
optflags-gnu-y = $(OPTIMIZATION)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Always preprocess assembler files.
|
||||||
|
asflags-gnu-y += -x assembler-with-cpp
|
||||||
|
# Compile C files using the GNU99 standard.
|
||||||
|
cflags-gnu-y += -std=gnu99
|
||||||
|
# Compile C++ files using the GNU++98 standard.
|
||||||
|
cxxflags-gnu-y += -std=gnu++98
|
||||||
|
|
||||||
|
|
||||||
|
# Separate each function and data into its own separate section to allow
|
||||||
|
# garbage collection of unused sections.
|
||||||
|
cflags-gnu-y += -ffunction-sections -fdata-sections
|
||||||
|
cxxflags-gnu-y += -ffunction-sections -fdata-sections
|
||||||
|
|
||||||
|
# Various cflags.
|
||||||
|
cflags-gnu-y += -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
|
||||||
|
cflags-gnu-y += -Wmain -Wparentheses
|
||||||
|
cflags-gnu-y += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
|
||||||
|
cflags-gnu-y += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
|
||||||
|
cflags-gnu-y += -Wshadow -Wbad-function-cast -Wwrite-strings
|
||||||
|
cflags-gnu-y += -Wsign-compare -Waggregate-return
|
||||||
|
cflags-gnu-y += -Wmissing-declarations
|
||||||
|
cflags-gnu-y += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
|
||||||
|
cflags-gnu-y += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
|
||||||
|
cflags-gnu-y += -Wunreachable-code
|
||||||
|
cflags-gnu-y += -Wcast-align
|
||||||
|
cflags-gnu-y += --param max-inline-insns-single=500
|
||||||
|
|
||||||
|
# To reduce application size use only integer printf function.
|
||||||
|
cflags-gnu-y += -Dprintf=iprintf
|
||||||
|
|
||||||
|
# Garbage collect unreferred sections when linking.
|
||||||
|
ldflags-gnu-y += -Wl,--gc-sections
|
||||||
|
|
||||||
|
# Use the linker script if provided by the project.
|
||||||
|
ifneq ($(strip $(linker_script)),)
|
||||||
|
ldflags-gnu-y += -Wl,-T $(linker_script)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Output a link map file and a cross reference table
|
||||||
|
ldflags-gnu-y += -Wl,-Map=$(project).map,--cref
|
||||||
|
|
||||||
|
# Add library search paths relative to the top level directory.
|
||||||
|
ldflags-gnu-y += $(foreach _LIB_PATH,$(addprefix $(PRJ_PATH)/,$(LIB_PATH)),-L$(_LIB_PATH))
|
||||||
|
|
||||||
|
a_flags = $(cpuflags-gnu-y) $(depflags) $(cppflags-gnu-y) $(asflags-gnu-y) -D__ASSEMBLY__
|
||||||
|
c_flags = $(cpuflags-gnu-y) $(dbgflags-gnu-y) $(depflags) $(optflags-gnu-y) $(cppflags-gnu-y) $(cflags-gnu-y)
|
||||||
|
cxx_flags= $(cpuflags-gnu-y) $(dbgflags-gnu-y) $(depflags) $(optflags-gnu-y) $(cppflags-gnu-y) $(cxxflags-gnu-y)
|
||||||
|
l_flags = -Wl,--entry=Reset_Handler -Wl,--cref $(cpuflags-gnu-y) $(optflags-gnu-y) $(ldflags-gnu-y)
|
||||||
|
ar_flags = $(arflags-gnu-y)
|
||||||
|
|
||||||
|
# Source files list and part informations must already be included before
|
||||||
|
# running this makefile
|
||||||
|
|
||||||
|
# If a custom build directory is specified, use it -- force trailing / in directory name.
|
||||||
|
ifdef BUILD_DIR
|
||||||
|
build-dir := $(dir $(BUILD_DIR))$(if $(notdir $(BUILD_DIR)),$(notdir $(BUILD_DIR))/)
|
||||||
|
else
|
||||||
|
build-dir =
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Create object files list from source files list.
|
||||||
|
obj-y := $(addprefix $(build-dir), $(addsuffix .o,$(basename $(CSRCS) $(ASSRCS))))
|
||||||
|
# Create dependency files list from source files list.
|
||||||
|
dep-files := $(wildcard $(foreach f,$(obj-y),$(basename $(f)).d))
|
||||||
|
|
||||||
|
clean-files += $(wildcard $(obj-y))
|
||||||
|
clean-files += $(dep-files)
|
||||||
|
|
||||||
|
clean-dirs += $(call reverse,$(sort $(wildcard $(dir $(obj-y)))))
|
||||||
|
|
||||||
|
.PHONY: all
|
||||||
|
|
||||||
|
# Default target.
|
||||||
|
.PHONY: all
|
||||||
|
ifeq ($(project_type),all)
|
||||||
|
all:
|
||||||
|
$(MAKE) all PROJECT_TYPE=flash
|
||||||
|
$(MAKE) all PROJECT_TYPE=sram
|
||||||
|
else
|
||||||
|
ifeq ($(target_type),lib)
|
||||||
|
all: $(target) $(project).lss $(project).sym
|
||||||
|
else
|
||||||
|
ifeq ($(target_type),elf)
|
||||||
|
all: $(target) $(project).lss $(project).sym $(project).hex $(project).bin
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Default target.
|
||||||
|
.PHONY: os
|
||||||
|
os:
|
||||||
|
@echo OS '$(OS)'
|
||||||
|
@echo os type '$(os_type)'
|
||||||
|
@echo os '$(os)'
|
||||||
|
@echo '$(findstring Windows,$(OS))'
|
||||||
|
|
||||||
|
# Clean up the project.
|
||||||
|
.PHONY: clean
|
||||||
|
clean:
|
||||||
|
@$(if $(strip $(clean-files)),echo $(MSG_CLEAN_FILES))
|
||||||
|
$(if $(strip $(clean-files)),$(Q)$(RM) $(clean-files),)
|
||||||
|
@$(if $(strip $(clean-dirs)),echo $(MSG_CLEAN_DIRS))
|
||||||
|
# Remove created directories, and make sure we only remove existing
|
||||||
|
# directories, since recursive rmdir might help us a bit on the way.
|
||||||
|
ifeq ($(os),Windows)
|
||||||
|
$(Q)$(if $(strip $(clean-dirs)), \
|
||||||
|
$(RMDIR) $(strip $(subst /,\,$(clean-dirs))))
|
||||||
|
else
|
||||||
|
$(Q)$(if $(strip $(clean-dirs)), \
|
||||||
|
for directory in $(strip $(clean-dirs)); do \
|
||||||
|
if [ -d "$$directory" ]; then \
|
||||||
|
$(RMDIR) $$directory; \
|
||||||
|
fi \
|
||||||
|
done \
|
||||||
|
)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Rebuild the project.
|
||||||
|
.PHONY: rebuild
|
||||||
|
rebuild: clean all
|
||||||
|
|
||||||
|
# Debug the project in flash.
|
||||||
|
.PHONY: debug_flash
|
||||||
|
debug_flash: all
|
||||||
|
$(GDB) -x "$(PRJ_PATH)/$(DEBUG_SCRIPT_FLASH)" -ex "reset" -readnow -se $(TARGET_FLASH)
|
||||||
|
|
||||||
|
# Debug the project in sram.
|
||||||
|
.PHONY: debug_sram
|
||||||
|
debug_sram: all
|
||||||
|
$(GDB) -x "$(PRJ_PATH)/$(DEBUG_SCRIPT_SRAM)" -ex "reset" -readnow -se $(TARGET_SRAM)
|
||||||
|
|
||||||
|
.PHONY: objfiles
|
||||||
|
objfiles: $(obj-y)
|
||||||
|
|
||||||
|
# Create object files from C source files.
|
||||||
|
$(build-dir)%.o: %.c $(PRJ_PATH)/sam/utils/make/Makefile.in config.mk
|
||||||
|
@echo $(MSG_MKDIR)
|
||||||
|
ifeq ($(os),Windows)
|
||||||
|
-mkdir $(subst /,\,$(dir $@))
|
||||||
|
else
|
||||||
|
-mkdir -p $(dir $@)
|
||||||
|
endif
|
||||||
|
@echo $(MSG_COMPILING)
|
||||||
|
$(Q)$(CC) $(c_flags) -c $< -o $@
|
||||||
|
|
||||||
|
# Create object files from C++ source files.
|
||||||
|
$(build-dir)%.o: %.cpp $(PRJ_PATH)/sam/utils/make/Makefile.in config.mk
|
||||||
|
@echo $(MSG_MKDIR)
|
||||||
|
ifeq ($(os),Windows)
|
||||||
|
-mkdir $(subst /,\,$(dir $@))
|
||||||
|
else
|
||||||
|
-mkdir -p $(dir $@)
|
||||||
|
endif
|
||||||
|
@echo $(MSG_COMPILING_CXX)
|
||||||
|
$(Q)$(CXX) $(cxx_flags) -c $< -o $@
|
||||||
|
|
||||||
|
# Preprocess and assemble: create object files from assembler source files.
|
||||||
|
$(build-dir)%.o: %.S $(PRJ_PATH)/sam/utils/make/Makefile.in config.mk
|
||||||
|
@echo $(MSG_MKDIR)
|
||||||
|
ifeq ($(os),Windows)
|
||||||
|
-mkdir $(subst /,\,$(dir $@))
|
||||||
|
else
|
||||||
|
-mkdir -p $(dir $@)
|
||||||
|
endif
|
||||||
|
@echo $(MSG_ASSEMBLING)
|
||||||
|
$(Q)$(CC) $(a_flags) -c $< -o $@
|
||||||
|
|
||||||
|
# Include all dependency files to add depedency to all header files in use.
|
||||||
|
include $(dep-files)
|
||||||
|
|
||||||
|
ifeq ($(target_type),lib)
|
||||||
|
# Archive object files into an archive
|
||||||
|
$(target): $(PRJ_PATH)/sam/utils/make/Makefile.in config.mk $(obj-y)
|
||||||
|
@echo $(MSG_ARCHIVING)
|
||||||
|
$(Q)$(AR) $(ar_flags) $@ $(obj-y)
|
||||||
|
@echo $(MSG_SIZE)
|
||||||
|
$(Q)$(SIZE) -Bxt $@
|
||||||
|
else
|
||||||
|
ifeq ($(target_type),elf)
|
||||||
|
# Link the object files into an ELF file. Also make sure the target is rebuilt
|
||||||
|
# if the common Makefile.in or project config.mk is changed.
|
||||||
|
$(target): $(linker_script) $(PRJ_PATH)/sam/utils/make/Makefile.in config.mk $(obj-y)
|
||||||
|
@echo $(MSG_LINKING)
|
||||||
|
@echo $(Q)$(LD) $(l_flags) $(obj-y) $(libflags-gnu-y) -o $@
|
||||||
|
$(Q)$(LD) $(l_flags) $(obj-y) $(libflags-gnu-y) -o $@
|
||||||
|
@echo $(MSG_SIZE)
|
||||||
|
$(Q)$(SIZE) -Ax $@
|
||||||
|
$(Q)$(SIZE) -Bx $@
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Create extended function listing from target output file.
|
||||||
|
%.lss: $(target)
|
||||||
|
@echo $(MSG_EXTENDED_LISTING)
|
||||||
|
$(Q)$(OBJDUMP) -h -S $< > $@
|
||||||
|
|
||||||
|
# Create symbol table from target output file.
|
||||||
|
%.sym: $(target)
|
||||||
|
@echo $(MSG_SYMBOL_TABLE)
|
||||||
|
$(Q)$(NM) -n $< > $@
|
||||||
|
|
||||||
|
# Create Intel HEX image from ELF output file.
|
||||||
|
%.hex: $(target)
|
||||||
|
@echo $(MSG_IHEX_IMAGE)
|
||||||
|
$(Q)$(OBJCOPY) -O ihex $(flashflags-gnu-y) $< $@
|
||||||
|
|
||||||
|
# Create binary image from ELF output file.
|
||||||
|
%.bin: $(target)
|
||||||
|
@echo $(MSG_BINARY_IMAGE)
|
||||||
|
$(Q)$(OBJCOPY) -O binary $< $@
|
||||||
|
|
||||||
|
# Provide information about the detected host operating system.
|
||||||
|
.SECONDARY: info-os
|
||||||
|
info-os:
|
||||||
|
@echo $(MSG_INFO)$(os) build host detected
|
||||||
|
|
||||||
|
# Build Doxygen generated documentation.
|
||||||
|
.PHONY: doc
|
||||||
|
doc:
|
||||||
|
@echo $(MSG_GENERATING_DOC)
|
||||||
|
$(Q)cd $(dir $(doccfg)) && $(DOCGEN) $(notdir $(doccfg))
|
||||||
|
|
||||||
|
# Clean Doxygen generated documentation.
|
||||||
|
.PHONY: cleandoc
|
||||||
|
cleandoc:
|
||||||
|
@$(if $(wildcard $(docdir)),echo $(MSG_CLEAN_DOC))
|
||||||
|
$(Q)$(if $(wildcard $(docdir)),$(RM) --recursive $(docdir))
|
||||||
|
|
||||||
|
# Rebuild the Doxygen generated documentation.
|
||||||
|
.PHONY: rebuilddoc
|
||||||
|
rebuilddoc: cleandoc doc
|
||||||
|
|
@ -0,0 +1,336 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Preprocessor macro repeating utils.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _MREPEAT_H_
|
||||||
|
#define _MREPEAT_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_sam_utils_mrepeat Preprocessor - Macro Repeat
|
||||||
|
*
|
||||||
|
* \ingroup group_sam_utils
|
||||||
|
*
|
||||||
|
* \{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "preprocessor.h"
|
||||||
|
|
||||||
|
|
||||||
|
//! Maximal number of repetitions supported by MREPEAT.
|
||||||
|
#define MREPEAT_LIMIT 256
|
||||||
|
|
||||||
|
/*! \brief Macro repeat.
|
||||||
|
*
|
||||||
|
* This macro represents a horizontal repetition construct.
|
||||||
|
*
|
||||||
|
* \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
|
||||||
|
* \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
|
||||||
|
* the current repetition number and the auxiliary data argument.
|
||||||
|
* \param data Auxiliary data passed to macro.
|
||||||
|
*
|
||||||
|
* \return <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>
|
||||||
|
*/
|
||||||
|
#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data)
|
||||||
|
|
||||||
|
#define MREPEAT0( macro, data)
|
||||||
|
#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data)
|
||||||
|
#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data)
|
||||||
|
#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data)
|
||||||
|
#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data)
|
||||||
|
#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data)
|
||||||
|
#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data)
|
||||||
|
#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data)
|
||||||
|
#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data)
|
||||||
|
#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data)
|
||||||
|
#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data)
|
||||||
|
#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data)
|
||||||
|
#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data)
|
||||||
|
#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data)
|
||||||
|
#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data)
|
||||||
|
#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data)
|
||||||
|
#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data)
|
||||||
|
#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data)
|
||||||
|
#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data)
|
||||||
|
#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data)
|
||||||
|
#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data)
|
||||||
|
#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data)
|
||||||
|
#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data)
|
||||||
|
#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data)
|
||||||
|
#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data)
|
||||||
|
#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data)
|
||||||
|
#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data)
|
||||||
|
#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data)
|
||||||
|
#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data)
|
||||||
|
#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data)
|
||||||
|
#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data)
|
||||||
|
#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data)
|
||||||
|
#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data)
|
||||||
|
#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data)
|
||||||
|
#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data)
|
||||||
|
#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data)
|
||||||
|
#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data)
|
||||||
|
#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data)
|
||||||
|
#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data)
|
||||||
|
#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data)
|
||||||
|
#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data)
|
||||||
|
#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data)
|
||||||
|
#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data)
|
||||||
|
#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data)
|
||||||
|
#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data)
|
||||||
|
#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data)
|
||||||
|
#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data)
|
||||||
|
#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data)
|
||||||
|
#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data)
|
||||||
|
#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data)
|
||||||
|
#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data)
|
||||||
|
#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data)
|
||||||
|
#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data)
|
||||||
|
#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data)
|
||||||
|
#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data)
|
||||||
|
#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data)
|
||||||
|
#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data)
|
||||||
|
#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data)
|
||||||
|
#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data)
|
||||||
|
#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data)
|
||||||
|
#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data)
|
||||||
|
#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data)
|
||||||
|
#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data)
|
||||||
|
#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data)
|
||||||
|
#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data)
|
||||||
|
#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data)
|
||||||
|
#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data)
|
||||||
|
#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data)
|
||||||
|
#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data)
|
||||||
|
#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data)
|
||||||
|
#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data)
|
||||||
|
#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data)
|
||||||
|
#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data)
|
||||||
|
#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data)
|
||||||
|
#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data)
|
||||||
|
#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data)
|
||||||
|
#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data)
|
||||||
|
#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data)
|
||||||
|
#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data)
|
||||||
|
#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data)
|
||||||
|
#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data)
|
||||||
|
#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data)
|
||||||
|
#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data)
|
||||||
|
#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data)
|
||||||
|
#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data)
|
||||||
|
#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data)
|
||||||
|
#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data)
|
||||||
|
#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data)
|
||||||
|
#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data)
|
||||||
|
#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data)
|
||||||
|
#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data)
|
||||||
|
#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data)
|
||||||
|
#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data)
|
||||||
|
#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data)
|
||||||
|
#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data)
|
||||||
|
#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data)
|
||||||
|
#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data)
|
||||||
|
#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data)
|
||||||
|
#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data)
|
||||||
|
#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data)
|
||||||
|
#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data)
|
||||||
|
#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data)
|
||||||
|
#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data)
|
||||||
|
#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data)
|
||||||
|
#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data)
|
||||||
|
#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data)
|
||||||
|
#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data)
|
||||||
|
#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data)
|
||||||
|
#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data)
|
||||||
|
#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data)
|
||||||
|
#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data)
|
||||||
|
#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data)
|
||||||
|
#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data)
|
||||||
|
#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data)
|
||||||
|
#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data)
|
||||||
|
#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data)
|
||||||
|
#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data)
|
||||||
|
#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data)
|
||||||
|
#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data)
|
||||||
|
#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data)
|
||||||
|
#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data)
|
||||||
|
#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data)
|
||||||
|
#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data)
|
||||||
|
#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data)
|
||||||
|
#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data)
|
||||||
|
#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data)
|
||||||
|
#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data)
|
||||||
|
#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data)
|
||||||
|
#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data)
|
||||||
|
#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data)
|
||||||
|
#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data)
|
||||||
|
#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data)
|
||||||
|
#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data)
|
||||||
|
#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data)
|
||||||
|
#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data)
|
||||||
|
#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data)
|
||||||
|
#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data)
|
||||||
|
#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data)
|
||||||
|
#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data)
|
||||||
|
#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data)
|
||||||
|
#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data)
|
||||||
|
#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data)
|
||||||
|
#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data)
|
||||||
|
#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data)
|
||||||
|
#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data)
|
||||||
|
#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data)
|
||||||
|
#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data)
|
||||||
|
#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data)
|
||||||
|
#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data)
|
||||||
|
#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data)
|
||||||
|
#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data)
|
||||||
|
#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data)
|
||||||
|
#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data)
|
||||||
|
#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data)
|
||||||
|
#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data)
|
||||||
|
#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data)
|
||||||
|
#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data)
|
||||||
|
#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data)
|
||||||
|
#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data)
|
||||||
|
#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data)
|
||||||
|
#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data)
|
||||||
|
#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data)
|
||||||
|
#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data)
|
||||||
|
#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data)
|
||||||
|
#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data)
|
||||||
|
#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data)
|
||||||
|
#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data)
|
||||||
|
#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data)
|
||||||
|
#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data)
|
||||||
|
#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data)
|
||||||
|
#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data)
|
||||||
|
#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data)
|
||||||
|
#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data)
|
||||||
|
#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data)
|
||||||
|
#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data)
|
||||||
|
#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data)
|
||||||
|
#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data)
|
||||||
|
#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data)
|
||||||
|
#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data)
|
||||||
|
#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data)
|
||||||
|
#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data)
|
||||||
|
#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data)
|
||||||
|
#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data)
|
||||||
|
#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data)
|
||||||
|
#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data)
|
||||||
|
#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data)
|
||||||
|
#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data)
|
||||||
|
#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data)
|
||||||
|
#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data)
|
||||||
|
#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data)
|
||||||
|
#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data)
|
||||||
|
#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data)
|
||||||
|
#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data)
|
||||||
|
#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data)
|
||||||
|
#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data)
|
||||||
|
#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data)
|
||||||
|
#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data)
|
||||||
|
#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data)
|
||||||
|
#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data)
|
||||||
|
#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data)
|
||||||
|
#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data)
|
||||||
|
#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data)
|
||||||
|
#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data)
|
||||||
|
#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data)
|
||||||
|
#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data)
|
||||||
|
#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data)
|
||||||
|
#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data)
|
||||||
|
#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data)
|
||||||
|
#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data)
|
||||||
|
#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data)
|
||||||
|
#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data)
|
||||||
|
#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data)
|
||||||
|
#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data)
|
||||||
|
#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data)
|
||||||
|
#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data)
|
||||||
|
#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data)
|
||||||
|
#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data)
|
||||||
|
#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data)
|
||||||
|
#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data)
|
||||||
|
#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data)
|
||||||
|
#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data)
|
||||||
|
#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data)
|
||||||
|
#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data)
|
||||||
|
#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data)
|
||||||
|
#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data)
|
||||||
|
#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data)
|
||||||
|
#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data)
|
||||||
|
#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data)
|
||||||
|
#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data)
|
||||||
|
#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data)
|
||||||
|
#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data)
|
||||||
|
#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data)
|
||||||
|
#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data)
|
||||||
|
#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data)
|
||||||
|
#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data)
|
||||||
|
#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data)
|
||||||
|
#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data)
|
||||||
|
#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data)
|
||||||
|
#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data)
|
||||||
|
#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data)
|
||||||
|
#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data)
|
||||||
|
#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data)
|
||||||
|
#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data)
|
||||||
|
#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data)
|
||||||
|
#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data)
|
||||||
|
#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data)
|
||||||
|
#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data)
|
||||||
|
#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data)
|
||||||
|
#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data)
|
||||||
|
#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data)
|
||||||
|
#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data)
|
||||||
|
#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data)
|
||||||
|
#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data)
|
||||||
|
#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data)
|
||||||
|
#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data)
|
||||||
|
#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data)
|
||||||
|
#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif // _MREPEAT_H_
|
||||||
|
|
@ -0,0 +1,52 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Preprocessor utils.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PREPROCESSOR_H_
|
||||||
|
#define _PREPROCESSOR_H_
|
||||||
|
|
||||||
|
#include "tpaste.h"
|
||||||
|
#include "stringz.h"
|
||||||
|
#include "mrepeat.h"
|
||||||
|
|
||||||
|
|
||||||
|
#endif // _PREPROCESSOR_H_
|
||||||
|
|
@ -0,0 +1,82 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Preprocessor stringizing utils.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _STRINGZ_H_
|
||||||
|
#define _STRINGZ_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_sam_utils_stringz Preprocessor - Stringize
|
||||||
|
*
|
||||||
|
* \ingroup group_sam_utils
|
||||||
|
*
|
||||||
|
* \{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*! \brief Stringize.
|
||||||
|
*
|
||||||
|
* Stringize a preprocessing token, this token being allowed to be \#defined.
|
||||||
|
*
|
||||||
|
* May be used only within macros with the token passed as an argument if the token is \#defined.
|
||||||
|
*
|
||||||
|
* For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
|
||||||
|
* and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
|
||||||
|
* writing "A0".
|
||||||
|
*/
|
||||||
|
#define STRINGZ(x) #x
|
||||||
|
|
||||||
|
/*! \brief Absolute stringize.
|
||||||
|
*
|
||||||
|
* Stringize a preprocessing token, this token being allowed to be \#defined.
|
||||||
|
*
|
||||||
|
* No restriction of use if the token is \#defined.
|
||||||
|
*
|
||||||
|
* For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
|
||||||
|
* equivalent to writing "A0".
|
||||||
|
*/
|
||||||
|
#define ASTRINGZ(x) STRINGZ(x)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif // _STRINGZ_H_
|
||||||
|
|
@ -0,0 +1,102 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Preprocessor token pasting utils.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2010-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _TPASTE_H_
|
||||||
|
#define _TPASTE_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \defgroup group_sam_utils_tpaste Preprocessor - Token Paste
|
||||||
|
*
|
||||||
|
* \ingroup group_sam_utils
|
||||||
|
*
|
||||||
|
* \{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*! \name Token Paste
|
||||||
|
*
|
||||||
|
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
|
||||||
|
*
|
||||||
|
* May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
|
||||||
|
*
|
||||||
|
* For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
|
||||||
|
* UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
|
||||||
|
* equivalent to writing U32.
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define TPASTE2( a, b) a##b
|
||||||
|
#define TPASTE3( a, b, c) a##b##c
|
||||||
|
#define TPASTE4( a, b, c, d) a##b##c##d
|
||||||
|
#define TPASTE5( a, b, c, d, e) a##b##c##d##e
|
||||||
|
#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f
|
||||||
|
#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g
|
||||||
|
#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h
|
||||||
|
#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i
|
||||||
|
#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/*! \name Absolute Token Paste
|
||||||
|
*
|
||||||
|
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
|
||||||
|
*
|
||||||
|
* No restriction of use if the tokens are \#defined.
|
||||||
|
*
|
||||||
|
* For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
|
||||||
|
* as 32 is equivalent to writing U32.
|
||||||
|
*/
|
||||||
|
//! @{
|
||||||
|
#define ATPASTE2( a, b) TPASTE2( a, b)
|
||||||
|
#define ATPASTE3( a, b, c) TPASTE3( a, b, c)
|
||||||
|
#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)
|
||||||
|
#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)
|
||||||
|
#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)
|
||||||
|
#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)
|
||||||
|
#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)
|
||||||
|
#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)
|
||||||
|
#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)
|
||||||
|
//! @}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif // _TPASTE_H_
|
||||||
|
|
@ -0,0 +1,110 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Status code definitions.
|
||||||
|
*
|
||||||
|
* This file defines various status codes returned by functions,
|
||||||
|
* indicating success or failure as well as what kind of failure.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2013 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef STATUS_CODES_H_INCLUDED
|
||||||
|
#define STATUS_CODES_H_INCLUDED
|
||||||
|
|
||||||
|
/* Note: this is a local workaround to avoid a pre-processor clash due to the
|
||||||
|
* lwIP macro ERR_TIMEOUT. */
|
||||||
|
#if defined(__LWIP_ERR_H__) && defined(ERR_TIMEOUT)
|
||||||
|
#if (ERR_TIMEOUT != -3)
|
||||||
|
|
||||||
|
/* Internal check to make sure that the later restore of lwIP's ERR_TIMEOUT
|
||||||
|
* macro is set to the correct value. Note that it is highly improbable that
|
||||||
|
* this value ever changes in lwIP. */
|
||||||
|
#error ASF developers: check lwip err.h new value for ERR_TIMEOUT
|
||||||
|
#endif
|
||||||
|
#undef ERR_TIMEOUT
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Status code that may be returned by shell commands and protocol
|
||||||
|
* implementations.
|
||||||
|
*
|
||||||
|
* \note Any change to these status codes and the corresponding
|
||||||
|
* message strings is strictly forbidden. New codes can be added,
|
||||||
|
* however, but make sure that any message string tables are updated
|
||||||
|
* at the same time.
|
||||||
|
*/
|
||||||
|
enum status_code {
|
||||||
|
STATUS_OK = 0, //!< Success
|
||||||
|
STATUS_ERR_BUSY = 0x19,
|
||||||
|
STATUS_ERR_DENIED = 0x1C,
|
||||||
|
STATUS_ERR_TIMEOUT = 0x12,
|
||||||
|
ERR_IO_ERROR = -1, //!< I/O error
|
||||||
|
ERR_FLUSHED = -2, //!< Request flushed from queue
|
||||||
|
ERR_TIMEOUT = -3, //!< Operation timed out
|
||||||
|
ERR_BAD_DATA = -4, //!< Data integrity check failed
|
||||||
|
ERR_PROTOCOL = -5, //!< Protocol error
|
||||||
|
ERR_UNSUPPORTED_DEV = -6, //!< Unsupported device
|
||||||
|
ERR_NO_MEMORY = -7, //!< Insufficient memory
|
||||||
|
ERR_INVALID_ARG = -8, //!< Invalid argument
|
||||||
|
ERR_BAD_ADDRESS = -9, //!< Bad address
|
||||||
|
ERR_BUSY = -10, //!< Resource is busy
|
||||||
|
ERR_BAD_FORMAT = -11, //!< Data format not recognized
|
||||||
|
ERR_NO_TIMER = -12, //!< No timer available
|
||||||
|
ERR_TIMER_ALREADY_RUNNING = -13, //!< Timer already running
|
||||||
|
ERR_TIMER_NOT_RUNNING = -14, //!< Timer not running
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \brief Operation in progress
|
||||||
|
*
|
||||||
|
* This status code is for driver-internal use when an operation
|
||||||
|
* is currently being performed.
|
||||||
|
*
|
||||||
|
* \note Drivers should never return this status code to any
|
||||||
|
* callers. It is strictly for internal use.
|
||||||
|
*/
|
||||||
|
OPERATION_IN_PROGRESS = -128,
|
||||||
|
};
|
||||||
|
|
||||||
|
typedef enum status_code status_code_t;
|
||||||
|
|
||||||
|
#if defined(__LWIP_ERR_H__)
|
||||||
|
#define ERR_TIMEOUT -3
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STATUS_CODES_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,136 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Syscalls for SAM (GCC).
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <stdarg.h>
|
||||||
|
#include <sys/types.h>
|
||||||
|
#include <sys/stat.h>
|
||||||
|
|
||||||
|
/// @cond 0
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/// @endcond
|
||||||
|
|
||||||
|
#undef errno
|
||||||
|
extern int errno;
|
||||||
|
extern int _end;
|
||||||
|
|
||||||
|
extern caddr_t _sbrk(int incr);
|
||||||
|
extern int link(char *old, char *new);
|
||||||
|
extern int _close(int file);
|
||||||
|
extern int _fstat(int file, struct stat *st);
|
||||||
|
extern int _isatty(int file);
|
||||||
|
extern int _lseek(int file, int ptr, int dir);
|
||||||
|
extern void _exit(int status);
|
||||||
|
extern void _kill(int pid, int sig);
|
||||||
|
extern int _getpid(void);
|
||||||
|
|
||||||
|
extern caddr_t _sbrk(int incr)
|
||||||
|
{
|
||||||
|
static unsigned char *heap = NULL;
|
||||||
|
unsigned char *prev_heap;
|
||||||
|
|
||||||
|
if (heap == NULL) {
|
||||||
|
heap = (unsigned char *)&_end;
|
||||||
|
}
|
||||||
|
prev_heap = heap;
|
||||||
|
|
||||||
|
heap += incr;
|
||||||
|
|
||||||
|
return (caddr_t) prev_heap;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int link(char *old, char *new)
|
||||||
|
{
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int _close(int file)
|
||||||
|
{
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int _fstat(int file, struct stat *st)
|
||||||
|
{
|
||||||
|
st->st_mode = S_IFCHR;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int _isatty(int file)
|
||||||
|
{
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int _lseek(int file, int ptr, int dir)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void _exit(int status)
|
||||||
|
{
|
||||||
|
printf("Exiting with status %d.\n", status);
|
||||||
|
|
||||||
|
for (;;);
|
||||||
|
}
|
||||||
|
|
||||||
|
extern void _kill(int pid, int sig)
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int _getpid(void)
|
||||||
|
{
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// @cond 0
|
||||||
|
/**INDENT-OFF**/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
/**INDENT-ON**/
|
||||||
|
/// @endcond
|
||||||
Binary file not shown.
7057
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/arm_math.h
vendored
Normal file
7057
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/arm_math.h
vendored
Normal file
File diff suppressed because it is too large
Load diff
1689
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cm4.h
vendored
Normal file
1689
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cm4.h
vendored
Normal file
File diff suppressed because it is too large
Load diff
649
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cm4_simd.h
vendored
Normal file
649
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cm4_simd.h
vendored
Normal file
|
|
@ -0,0 +1,649 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cm4_simd.h
|
||||||
|
* @brief CMSIS Cortex-M4 SIMD Header File
|
||||||
|
* @version V3.00
|
||||||
|
* @date 19. January 2012
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef __CORE_CM4_SIMD_H
|
||||||
|
#define __CORE_CM4_SIMD_H
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Hardware Abstraction Layer
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/* ################### Compiler specific Intrinsics ########################### */
|
||||||
|
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||||
|
Access to dedicated SIMD instructions
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
#define __SADD8 __sadd8
|
||||||
|
#define __QADD8 __qadd8
|
||||||
|
#define __SHADD8 __shadd8
|
||||||
|
#define __UADD8 __uadd8
|
||||||
|
#define __UQADD8 __uqadd8
|
||||||
|
#define __UHADD8 __uhadd8
|
||||||
|
#define __SSUB8 __ssub8
|
||||||
|
#define __QSUB8 __qsub8
|
||||||
|
#define __SHSUB8 __shsub8
|
||||||
|
#define __USUB8 __usub8
|
||||||
|
#define __UQSUB8 __uqsub8
|
||||||
|
#define __UHSUB8 __uhsub8
|
||||||
|
#define __SADD16 __sadd16
|
||||||
|
#define __QADD16 __qadd16
|
||||||
|
#define __SHADD16 __shadd16
|
||||||
|
#define __UADD16 __uadd16
|
||||||
|
#define __UQADD16 __uqadd16
|
||||||
|
#define __UHADD16 __uhadd16
|
||||||
|
#define __SSUB16 __ssub16
|
||||||
|
#define __QSUB16 __qsub16
|
||||||
|
#define __SHSUB16 __shsub16
|
||||||
|
#define __USUB16 __usub16
|
||||||
|
#define __UQSUB16 __uqsub16
|
||||||
|
#define __UHSUB16 __uhsub16
|
||||||
|
#define __SASX __sasx
|
||||||
|
#define __QASX __qasx
|
||||||
|
#define __SHASX __shasx
|
||||||
|
#define __UASX __uasx
|
||||||
|
#define __UQASX __uqasx
|
||||||
|
#define __UHASX __uhasx
|
||||||
|
#define __SSAX __ssax
|
||||||
|
#define __QSAX __qsax
|
||||||
|
#define __SHSAX __shsax
|
||||||
|
#define __USAX __usax
|
||||||
|
#define __UQSAX __uqsax
|
||||||
|
#define __UHSAX __uhsax
|
||||||
|
#define __USAD8 __usad8
|
||||||
|
#define __USADA8 __usada8
|
||||||
|
#define __SSAT16 __ssat16
|
||||||
|
#define __USAT16 __usat16
|
||||||
|
#define __UXTB16 __uxtb16
|
||||||
|
#define __UXTAB16 __uxtab16
|
||||||
|
#define __SXTB16 __sxtb16
|
||||||
|
#define __SXTAB16 __sxtab16
|
||||||
|
#define __SMUAD __smuad
|
||||||
|
#define __SMUADX __smuadx
|
||||||
|
#define __SMLAD __smlad
|
||||||
|
#define __SMLADX __smladx
|
||||||
|
#define __SMLALD __smlald
|
||||||
|
#define __SMLALDX __smlaldx
|
||||||
|
#define __SMUSD __smusd
|
||||||
|
#define __SMUSDX __smusdx
|
||||||
|
#define __SMLSD __smlsd
|
||||||
|
#define __SMLSDX __smlsdx
|
||||||
|
#define __SMLSLD __smlsld
|
||||||
|
#define __SMLSLDX __smlsldx
|
||||||
|
#define __SEL __sel
|
||||||
|
#define __QADD __qadd
|
||||||
|
#define __QSUB __qsub
|
||||||
|
|
||||||
|
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
|
||||||
|
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
|
||||||
|
|
||||||
|
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
|
||||||
|
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
|
||||||
|
|
||||||
|
|
||||||
|
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
|
||||||
|
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
#include <cmsis_iar.h>
|
||||||
|
|
||||||
|
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
|
||||||
|
/* TI CCS specific functions */
|
||||||
|
|
||||||
|
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
#include <cmsis_ccs.h>
|
||||||
|
|
||||||
|
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define __SSAT16(ARG1,ARG2) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1); \
|
||||||
|
__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
#define __USAT16(ARG1,ARG2) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1); \
|
||||||
|
__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define __SMLALD(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
|
||||||
|
__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
|
||||||
|
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
|
||||||
|
})
|
||||||
|
|
||||||
|
#define __SMLALDX(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
|
||||||
|
__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
|
||||||
|
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
|
||||||
|
})
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define __SMLSLD(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
|
||||||
|
__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
|
||||||
|
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
|
||||||
|
})
|
||||||
|
|
||||||
|
#define __SMLSLDX(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
|
||||||
|
__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
|
||||||
|
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
|
||||||
|
})
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define __PKHBT(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
|
||||||
|
__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
#define __PKHTB(ARG1,ARG2,ARG3) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
|
||||||
|
if (ARG3 == 0) \
|
||||||
|
__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
|
||||||
|
else \
|
||||||
|
__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
|
||||||
|
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
/* not yet supported */
|
||||||
|
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* __CORE_CM4_SIMD_H */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
616
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cmFunc.h
vendored
Normal file
616
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cmFunc.h
vendored
Normal file
|
|
@ -0,0 +1,616 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cmFunc.h
|
||||||
|
* @brief CMSIS Cortex-M Core Function Access Header File
|
||||||
|
* @version V3.00
|
||||||
|
* @date 19. January 2012
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009-2012 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __CORE_CMFUNC_H
|
||||||
|
#define __CORE_CMFUNC_H
|
||||||
|
|
||||||
|
|
||||||
|
/* ########################### Core Function Access ########################### */
|
||||||
|
/** \ingroup CMSIS_Core_FunctionInterface
|
||||||
|
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400677)
|
||||||
|
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* intrinsic void __enable_irq(); */
|
||||||
|
/* intrinsic void __disable_irq(); */
|
||||||
|
|
||||||
|
/** \brief Get Control Register
|
||||||
|
|
||||||
|
This function returns the content of the Control Register.
|
||||||
|
|
||||||
|
\return Control Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regControl __ASM("control");
|
||||||
|
return(__regControl);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Control Register
|
||||||
|
|
||||||
|
This function writes the given value to the Control Register.
|
||||||
|
|
||||||
|
\param [in] control Control Register value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
register uint32_t __regControl __ASM("control");
|
||||||
|
__regControl = control;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get IPSR Register
|
||||||
|
|
||||||
|
This function returns the content of the IPSR Register.
|
||||||
|
|
||||||
|
\return IPSR Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_IPSR(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regIPSR __ASM("ipsr");
|
||||||
|
return(__regIPSR);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get APSR Register
|
||||||
|
|
||||||
|
This function returns the content of the APSR Register.
|
||||||
|
|
||||||
|
\return APSR Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regAPSR __ASM("apsr");
|
||||||
|
return(__regAPSR);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get xPSR Register
|
||||||
|
|
||||||
|
This function returns the content of the xPSR Register.
|
||||||
|
|
||||||
|
\return xPSR Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_xPSR(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regXPSR __ASM("xpsr");
|
||||||
|
return(__regXPSR);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Process Stack Pointer
|
||||||
|
|
||||||
|
This function returns the current value of the Process Stack Pointer (PSP).
|
||||||
|
|
||||||
|
\return PSP Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||||
|
return(__regProcessStackPointer);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Process Stack Pointer
|
||||||
|
|
||||||
|
This function assigns the given value to the Process Stack Pointer (PSP).
|
||||||
|
|
||||||
|
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||||
|
__regProcessStackPointer = topOfProcStack;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Main Stack Pointer
|
||||||
|
|
||||||
|
This function returns the current value of the Main Stack Pointer (MSP).
|
||||||
|
|
||||||
|
\return MSP Register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regMainStackPointer __ASM("msp");
|
||||||
|
return(__regMainStackPointer);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Main Stack Pointer
|
||||||
|
|
||||||
|
This function assigns the given value to the Main Stack Pointer (MSP).
|
||||||
|
|
||||||
|
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
register uint32_t __regMainStackPointer __ASM("msp");
|
||||||
|
__regMainStackPointer = topOfMainStack;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Priority Mask
|
||||||
|
|
||||||
|
This function returns the current state of the priority mask bit from the Priority Mask Register.
|
||||||
|
|
||||||
|
\return Priority Mask value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regPriMask __ASM("primask");
|
||||||
|
return(__regPriMask);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Priority Mask
|
||||||
|
|
||||||
|
This function assigns the given value to the Priority Mask Register.
|
||||||
|
|
||||||
|
\param [in] priMask Priority Mask
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
register uint32_t __regPriMask __ASM("primask");
|
||||||
|
__regPriMask = (priMask);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M >= 0x03)
|
||||||
|
|
||||||
|
/** \brief Enable FIQ
|
||||||
|
|
||||||
|
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
#define __enable_fault_irq __enable_fiq
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Disable FIQ
|
||||||
|
|
||||||
|
This function disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
#define __disable_fault_irq __disable_fiq
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Base Priority
|
||||||
|
|
||||||
|
This function returns the current value of the Base Priority register.
|
||||||
|
|
||||||
|
\return Base Priority register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regBasePri __ASM("basepri");
|
||||||
|
return(__regBasePri);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Base Priority
|
||||||
|
|
||||||
|
This function assigns the given value to the Base Priority register.
|
||||||
|
|
||||||
|
\param [in] basePri Base Priority value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
|
||||||
|
{
|
||||||
|
register uint32_t __regBasePri __ASM("basepri");
|
||||||
|
__regBasePri = (basePri & 0xff);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Fault Mask
|
||||||
|
|
||||||
|
This function returns the current value of the Fault Mask register.
|
||||||
|
|
||||||
|
\return Fault Mask register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
register uint32_t __regFaultMask __ASM("faultmask");
|
||||||
|
return(__regFaultMask);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Fault Mask
|
||||||
|
|
||||||
|
This function assigns the given value to the Fault Mask register.
|
||||||
|
|
||||||
|
\param [in] faultMask Fault Mask value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
register uint32_t __regFaultMask __ASM("faultmask");
|
||||||
|
__regFaultMask = (faultMask & (uint32_t)1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M >= 0x03) */
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M == 0x04)
|
||||||
|
|
||||||
|
/** \brief Get FPSCR
|
||||||
|
|
||||||
|
This function returns the current value of the Floating Point Status/Control register.
|
||||||
|
|
||||||
|
\return Floating Point Status/Control register value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||||
|
{
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
register uint32_t __regfpscr __ASM("fpscr");
|
||||||
|
return(__regfpscr);
|
||||||
|
#else
|
||||||
|
return(0);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set FPSCR
|
||||||
|
|
||||||
|
This function assigns the given value to the Floating Point Status/Control register.
|
||||||
|
|
||||||
|
\param [in] fpscr Floating Point Status/Control value to set
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||||
|
{
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
register uint32_t __regfpscr __ASM("fpscr");
|
||||||
|
__regfpscr = (fpscr);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M == 0x04) */
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
|
||||||
|
#include <cmsis_iar.h>
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
|
||||||
|
/* TI CCS specific functions */
|
||||||
|
|
||||||
|
#include <cmsis_ccs.h>
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/** \brief Enable IRQ Interrupts
|
||||||
|
|
||||||
|
This function enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("cpsie i");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Disable IRQ Interrupts
|
||||||
|
|
||||||
|
This function disables IRQ interrupts by setting the I-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("cpsid i");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Control Register
|
||||||
|
|
||||||
|
This function returns the content of the Control Register.
|
||||||
|
|
||||||
|
\return Control Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Control Register
|
||||||
|
|
||||||
|
This function writes the given value to the Control Register.
|
||||||
|
|
||||||
|
\param [in] control Control Register value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get IPSR Register
|
||||||
|
|
||||||
|
This function returns the content of the IPSR Register.
|
||||||
|
|
||||||
|
\return IPSR Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get APSR Register
|
||||||
|
|
||||||
|
This function returns the content of the APSR Register.
|
||||||
|
|
||||||
|
\return APSR Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get xPSR Register
|
||||||
|
|
||||||
|
This function returns the content of the xPSR Register.
|
||||||
|
|
||||||
|
\return xPSR Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Process Stack Pointer
|
||||||
|
|
||||||
|
This function returns the current value of the Process Stack Pointer (PSP).
|
||||||
|
|
||||||
|
\return PSP Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
register uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, psp\n" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Process Stack Pointer
|
||||||
|
|
||||||
|
This function assigns the given value to the Process Stack Pointer (PSP).
|
||||||
|
|
||||||
|
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Main Stack Pointer
|
||||||
|
|
||||||
|
This function returns the current value of the Main Stack Pointer (MSP).
|
||||||
|
|
||||||
|
\return MSP Register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
register uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, msp\n" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Main Stack Pointer
|
||||||
|
|
||||||
|
This function assigns the given value to the Main Stack Pointer (MSP).
|
||||||
|
|
||||||
|
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Priority Mask
|
||||||
|
|
||||||
|
This function returns the current state of the priority mask bit from the Priority Mask Register.
|
||||||
|
|
||||||
|
\return Priority Mask value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Priority Mask
|
||||||
|
|
||||||
|
This function assigns the given value to the Priority Mask Register.
|
||||||
|
|
||||||
|
\param [in] priMask Priority Mask
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M >= 0x03)
|
||||||
|
|
||||||
|
/** \brief Enable FIQ
|
||||||
|
|
||||||
|
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("cpsie f");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Disable FIQ
|
||||||
|
|
||||||
|
This function disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||||
|
Can only be executed in Privileged modes.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("cpsid f");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Base Priority
|
||||||
|
|
||||||
|
This function returns the current value of the Base Priority register.
|
||||||
|
|
||||||
|
\return Base Priority register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Base Priority
|
||||||
|
|
||||||
|
This function assigns the given value to the Base Priority register.
|
||||||
|
|
||||||
|
\param [in] basePri Base Priority value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Get Fault Mask
|
||||||
|
|
||||||
|
This function returns the current value of the Fault Mask register.
|
||||||
|
|
||||||
|
\return Fault Mask register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set Fault Mask
|
||||||
|
|
||||||
|
This function assigns the given value to the Fault Mask register.
|
||||||
|
|
||||||
|
\param [in] faultMask Fault Mask value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M >= 0x03) */
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M == 0x04)
|
||||||
|
|
||||||
|
/** \brief Get FPSCR
|
||||||
|
|
||||||
|
This function returns the current value of the Floating Point Status/Control register.
|
||||||
|
|
||||||
|
\return Floating Point Status/Control register value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||||
|
{
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
#else
|
||||||
|
return(0);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Set FPSCR
|
||||||
|
|
||||||
|
This function assigns the given value to the Floating Point Status/Control register.
|
||||||
|
|
||||||
|
\param [in] fpscr Floating Point Status/Control value to set
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||||
|
{
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M == 0x04) */
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* __CORE_CMFUNC_H */
|
||||||
618
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cmInstr.h
vendored
Normal file
618
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/Include/core_cmInstr.h
vendored
Normal file
|
|
@ -0,0 +1,618 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cmInstr.h
|
||||||
|
* @brief CMSIS Cortex-M Core Instruction Access Header File
|
||||||
|
* @version V3.00
|
||||||
|
* @date 07. February 2012
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009-2012 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __CORE_CMINSTR_H
|
||||||
|
#define __CORE_CMINSTR_H
|
||||||
|
|
||||||
|
|
||||||
|
/* ########################## Core Instruction Access ######################### */
|
||||||
|
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||||
|
Access to dedicated instructions
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400677)
|
||||||
|
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief No Operation
|
||||||
|
|
||||||
|
No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||||
|
*/
|
||||||
|
#define __NOP __nop
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Wait For Interrupt
|
||||||
|
|
||||||
|
Wait For Interrupt is a hint instruction that suspends execution
|
||||||
|
until one of a number of events occurs.
|
||||||
|
*/
|
||||||
|
#define __WFI __wfi
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Wait For Event
|
||||||
|
|
||||||
|
Wait For Event is a hint instruction that permits the processor to enter
|
||||||
|
a low-power state until one of a number of events occurs.
|
||||||
|
*/
|
||||||
|
#define __WFE __wfe
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Send Event
|
||||||
|
|
||||||
|
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||||
|
*/
|
||||||
|
#define __SEV __sev
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Instruction Synchronization Barrier
|
||||||
|
|
||||||
|
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||||
|
so that all instructions following the ISB are fetched from cache or
|
||||||
|
memory, after the instruction has been completed.
|
||||||
|
*/
|
||||||
|
#define __ISB() __isb(0xF)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Data Synchronization Barrier
|
||||||
|
|
||||||
|
This function acts as a special kind of Data Memory Barrier.
|
||||||
|
It completes when all explicit memory accesses before this instruction complete.
|
||||||
|
*/
|
||||||
|
#define __DSB() __dsb(0xF)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Data Memory Barrier
|
||||||
|
|
||||||
|
This function ensures the apparent order of the explicit memory operations before
|
||||||
|
and after the instruction, without ensuring their completion.
|
||||||
|
*/
|
||||||
|
#define __DMB() __dmb(0xF)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order (32 bit)
|
||||||
|
|
||||||
|
This function reverses the byte order in integer value.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
#define __REV __rev
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order (16 bit)
|
||||||
|
|
||||||
|
This function reverses the byte order in two unsigned short values.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
|
||||||
|
{
|
||||||
|
rev16 r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order in signed short value
|
||||||
|
|
||||||
|
This function reverses the byte order in a signed short value with sign extension to integer.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
|
||||||
|
{
|
||||||
|
revsh r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Rotate Right in unsigned value (32 bit)
|
||||||
|
|
||||||
|
This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||||
|
|
||||||
|
\param [in] value Value to rotate
|
||||||
|
\param [in] value Number of Bits to rotate
|
||||||
|
\return Rotated value
|
||||||
|
*/
|
||||||
|
#define __ROR __ror
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M >= 0x03)
|
||||||
|
|
||||||
|
/** \brief Reverse bit order of value
|
||||||
|
|
||||||
|
This function reverses the bit order of the given value.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
#define __RBIT __rbit
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (8 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 8 bit value.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint8_t at (*ptr)
|
||||||
|
*/
|
||||||
|
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (16 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 16 bit values.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint16_t at (*ptr)
|
||||||
|
*/
|
||||||
|
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (32 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 32 bit values.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint32_t at (*ptr)
|
||||||
|
*/
|
||||||
|
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (8 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 8 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
#define __STREXB(value, ptr) __strex(value, ptr)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (16 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 16 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
#define __STREXH(value, ptr) __strex(value, ptr)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (32 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 32 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
#define __STREXW(value, ptr) __strex(value, ptr)
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Remove the exclusive lock
|
||||||
|
|
||||||
|
This function removes the exclusive lock which is created by LDREX.
|
||||||
|
|
||||||
|
*/
|
||||||
|
#define __CLREX __clrex
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Signed Saturate
|
||||||
|
|
||||||
|
This function saturates a signed value.
|
||||||
|
|
||||||
|
\param [in] value Value to be saturated
|
||||||
|
\param [in] sat Bit position to saturate to (1..32)
|
||||||
|
\return Saturated value
|
||||||
|
*/
|
||||||
|
#define __SSAT __ssat
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Unsigned Saturate
|
||||||
|
|
||||||
|
This function saturates an unsigned value.
|
||||||
|
|
||||||
|
\param [in] value Value to be saturated
|
||||||
|
\param [in] sat Bit position to saturate to (0..31)
|
||||||
|
\return Saturated value
|
||||||
|
*/
|
||||||
|
#define __USAT __usat
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Count leading zeros
|
||||||
|
|
||||||
|
This function counts the number of leading zeros of a data value.
|
||||||
|
|
||||||
|
\param [in] value Value to count the leading zeros
|
||||||
|
\return number of leading zeros in value
|
||||||
|
*/
|
||||||
|
#define __CLZ __clz
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M >= 0x03) */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
|
||||||
|
#include <cmsis_iar.h>
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
|
||||||
|
/* TI CCS specific functions */
|
||||||
|
|
||||||
|
#include <cmsis_ccs.h>
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/** \brief No Operation
|
||||||
|
|
||||||
|
No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("nop");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Wait For Interrupt
|
||||||
|
|
||||||
|
Wait For Interrupt is a hint instruction that suspends execution
|
||||||
|
until one of a number of events occurs.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("wfi");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Wait For Event
|
||||||
|
|
||||||
|
Wait For Event is a hint instruction that permits the processor to enter
|
||||||
|
a low-power state until one of a number of events occurs.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("wfe");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Send Event
|
||||||
|
|
||||||
|
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("sev");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Instruction Synchronization Barrier
|
||||||
|
|
||||||
|
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||||
|
so that all instructions following the ISB are fetched from cache or
|
||||||
|
memory, after the instruction has been completed.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("isb");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Data Synchronization Barrier
|
||||||
|
|
||||||
|
This function acts as a special kind of Data Memory Barrier.
|
||||||
|
It completes when all explicit memory accesses before this instruction complete.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("dsb");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Data Memory Barrier
|
||||||
|
|
||||||
|
This function ensures the apparent order of the explicit memory operations before
|
||||||
|
and after the instruction, without ensuring their completion.
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("dmb");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order (32 bit)
|
||||||
|
|
||||||
|
This function reverses the byte order in integer value.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order (16 bit)
|
||||||
|
|
||||||
|
This function reverses the byte order in two unsigned short values.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Reverse byte order in signed short value
|
||||||
|
|
||||||
|
This function reverses the byte order in a signed short value with sign extension to integer.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Rotate Right in unsigned value (32 bit)
|
||||||
|
|
||||||
|
This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||||
|
|
||||||
|
\param [in] value Value to rotate
|
||||||
|
\param [in] value Number of Bits to rotate
|
||||||
|
\return Rotated value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||||||
|
{
|
||||||
|
|
||||||
|
__ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
|
||||||
|
return(op1);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__CORTEX_M >= 0x03)
|
||||||
|
|
||||||
|
/** \brief Reverse bit order of value
|
||||||
|
|
||||||
|
This function reverses the bit order of the given value.
|
||||||
|
|
||||||
|
\param [in] value Value to reverse
|
||||||
|
\return Reversed value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (8 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 8 bit value.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint8_t at (*ptr)
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint8_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (16 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 16 bit values.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint16_t at (*ptr)
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint16_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief LDR Exclusive (32 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive LDR command for 32 bit values.
|
||||||
|
|
||||||
|
\param [in] ptr Pointer to data
|
||||||
|
\return value of type uint32_t at (*ptr)
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (8 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 8 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (16 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 16 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief STR Exclusive (32 bit)
|
||||||
|
|
||||||
|
This function performs a exclusive STR command for 32 bit values.
|
||||||
|
|
||||||
|
\param [in] value Value to store
|
||||||
|
\param [in] ptr Pointer to location
|
||||||
|
\return 0 Function succeeded
|
||||||
|
\return 1 Function failed
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Remove the exclusive lock
|
||||||
|
|
||||||
|
This function removes the exclusive lock which is created by LDREX.
|
||||||
|
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
|
||||||
|
{
|
||||||
|
__ASM volatile ("clrex");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Signed Saturate
|
||||||
|
|
||||||
|
This function saturates a signed value.
|
||||||
|
|
||||||
|
\param [in] value Value to be saturated
|
||||||
|
\param [in] sat Bit position to saturate to (1..32)
|
||||||
|
\return Saturated value
|
||||||
|
*/
|
||||||
|
#define __SSAT(ARG1,ARG2) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1); \
|
||||||
|
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Unsigned Saturate
|
||||||
|
|
||||||
|
This function saturates an unsigned value.
|
||||||
|
|
||||||
|
\param [in] value Value to be saturated
|
||||||
|
\param [in] sat Bit position to saturate to (0..31)
|
||||||
|
\return Saturated value
|
||||||
|
*/
|
||||||
|
#define __USAT(ARG1,ARG2) \
|
||||||
|
({ \
|
||||||
|
uint32_t __RES, __ARG1 = (ARG1); \
|
||||||
|
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||||
|
__RES; \
|
||||||
|
})
|
||||||
|
|
||||||
|
|
||||||
|
/** \brief Count leading zeros
|
||||||
|
|
||||||
|
This function counts the number of leading zeros of a data value.
|
||||||
|
|
||||||
|
\param [in] value Value to count the leading zeros
|
||||||
|
\return number of leading zeros in value
|
||||||
|
*/
|
||||||
|
__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
|
||||||
|
{
|
||||||
|
uint8_t result;
|
||||||
|
|
||||||
|
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* (__CORTEX_M >= 0x03) */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||||
|
|
||||||
|
#endif /* __CORE_CMINSTR_H */
|
||||||
37
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/README.txt
vendored
Normal file
37
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/asf/thirdparty/CMSIS/README.txt
vendored
Normal file
|
|
@ -0,0 +1,37 @@
|
||||||
|
* -------------------------------------------------------------------
|
||||||
|
* Copyright (C) 2011 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* Date: 11 October 2011
|
||||||
|
* Revision: V3.00
|
||||||
|
*
|
||||||
|
* Project: Cortex Microcontroller Software Interface Standard (CMSIS)
|
||||||
|
* Title: Release Note for CMSIS
|
||||||
|
*
|
||||||
|
* -------------------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
|
NOTE - Open the index.html file to access CMSIS documentation
|
||||||
|
|
||||||
|
|
||||||
|
The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all
|
||||||
|
Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects
|
||||||
|
and reduces time-to-market for new embedded applications.
|
||||||
|
|
||||||
|
CMSIS is released under the terms of the end user license agreement ("CMSIS END USER LICENCE AGREEMENT.pdf").
|
||||||
|
Any user of the software package is bound to the terms and conditions of the end user license agreement.
|
||||||
|
|
||||||
|
|
||||||
|
You will find the following sub-directories:
|
||||||
|
|
||||||
|
Documentation - Contains CMSIS documentation.
|
||||||
|
|
||||||
|
DSP_Lib - MDK project files, Examples and source files etc.. to build the
|
||||||
|
CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors.
|
||||||
|
|
||||||
|
Include - CMSIS Core Support and CMSIS DSP Include Files.
|
||||||
|
|
||||||
|
Lib - CMSIS DSP Libraries.
|
||||||
|
|
||||||
|
RTOS - CMSIS RTOS API template header file.
|
||||||
|
|
||||||
|
SVD - CMSIS SVD Schema files and Conversion Utility.
|
||||||
|
|
@ -0,0 +1,196 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef FREERTOS_CONFIG_H
|
||||||
|
#define FREERTOS_CONFIG_H
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Application specific definitions.
|
||||||
|
*
|
||||||
|
* These definitions should be adjusted for your particular hardware and
|
||||||
|
* application requirements.
|
||||||
|
*
|
||||||
|
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||||
|
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||||
|
*
|
||||||
|
* See http://www.freertos.org/a00110.html.
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Set configCREATE_LOW_POWER_DEMO to one to run the simple blinky demo,
|
||||||
|
or 0 to run the more comprehensive test and demo application. */
|
||||||
|
#define configCREATE_LOW_POWER_DEMO 1
|
||||||
|
|
||||||
|
#if configCREATE_LOW_POWER_DEMO == 1
|
||||||
|
#define configCPU_CLOCK_HZ 16384 /*( sysclk_get_cpu_hz() )*/
|
||||||
|
#define configSYSTICK_CLOCK_HZ 16384
|
||||||
|
#define configUSE_TICKLESS_IDLE 1
|
||||||
|
#define configTICK_RATE_HZ ( ( portTickType ) 128 )
|
||||||
|
#else
|
||||||
|
#define configCPU_CLOCK_HZ sysclk_get_cpu_hz()
|
||||||
|
#define configUSE_TICKLESS_IDLE 0
|
||||||
|
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
|
||||||
|
#endif /* configCREATE_LOW_POWER_DEMO */
|
||||||
|
|
||||||
|
#define configUSE_PREEMPTION 1
|
||||||
|
#define configUSE_IDLE_HOOK 0
|
||||||
|
#define configUSE_TICK_HOOK 0
|
||||||
|
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
|
||||||
|
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 130 )
|
||||||
|
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 26000 ) )
|
||||||
|
#define configMAX_TASK_NAME_LEN ( 10 )
|
||||||
|
#define configUSE_TRACE_FACILITY 1
|
||||||
|
#define configUSE_16_BIT_TICKS 0
|
||||||
|
#define configIDLE_SHOULD_YIELD 1
|
||||||
|
#define configUSE_MUTEXES 1
|
||||||
|
#define configQUEUE_REGISTRY_SIZE 8
|
||||||
|
#define configCHECK_FOR_STACK_OVERFLOW 0
|
||||||
|
#define configUSE_RECURSIVE_MUTEXES 1
|
||||||
|
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||||
|
#define configUSE_APPLICATION_TASK_TAG 0
|
||||||
|
#define configUSE_COUNTING_SEMAPHORES 1
|
||||||
|
|
||||||
|
/* Co-routine definitions. */
|
||||||
|
#define configUSE_CO_ROUTINES 0
|
||||||
|
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||||
|
|
||||||
|
/* Software timer definitions. */
|
||||||
|
#define configUSE_TIMERS 1
|
||||||
|
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
|
||||||
|
#define configTIMER_QUEUE_LENGTH 5
|
||||||
|
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
|
||||||
|
|
||||||
|
/* Set the following definitions to 1 to include the API function, or zero
|
||||||
|
to exclude the API function. */
|
||||||
|
#define INCLUDE_vTaskPrioritySet 1
|
||||||
|
#define INCLUDE_uxTaskPriorityGet 1
|
||||||
|
#define INCLUDE_vTaskDelete 1
|
||||||
|
#define INCLUDE_vTaskCleanUpResources 1
|
||||||
|
#define INCLUDE_vTaskSuspend 1
|
||||||
|
#define INCLUDE_vTaskDelayUntil 1
|
||||||
|
#define INCLUDE_vTaskDelay 1
|
||||||
|
|
||||||
|
/* FreeRTOS+CLI definitions. */
|
||||||
|
|
||||||
|
/* Dimensions a buffer into which command outputs can be written. The buffer
|
||||||
|
can be declared in the CLI code itself, to allow multiple command consoles to
|
||||||
|
share the same buffer. For example, an application may allow access to the
|
||||||
|
command interpreter by UART and by Ethernet. Sharing a buffer is done purely
|
||||||
|
to save RAM. Note, however, that the command console itself is not re-entrant,
|
||||||
|
so only one command interpreter interface can be used at any one time. For
|
||||||
|
that reason, no attempt at providing mutual exclusion to the buffer is
|
||||||
|
attempted. */
|
||||||
|
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 400
|
||||||
|
|
||||||
|
|
||||||
|
/* Cortex-M specific definitions. */
|
||||||
|
|
||||||
|
#ifdef __NVIC_PRIO_BITS
|
||||||
|
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||||
|
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||||
|
#else
|
||||||
|
#define configPRIO_BITS 4 /* 15 priority levels */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||||
|
function. */
|
||||||
|
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0f
|
||||||
|
|
||||||
|
/* The highest interrupt priority that can be used by any interrupt service
|
||||||
|
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||||
|
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||||
|
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||||
|
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 10
|
||||||
|
|
||||||
|
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||||
|
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||||
|
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||||
|
|
||||||
|
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||||
|
header file. */
|
||||||
|
void vAssertCalled( void );
|
||||||
|
#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled();
|
||||||
|
#define INCLUDE_MODULE_TEST 0
|
||||||
|
|
||||||
|
/* The configPRE_SLEEP_PROCESSING() and configPOST_SLEEP_PROCESSING() macros
|
||||||
|
allow the application writer to add additional code before and after the MCU is
|
||||||
|
placed into the low power state respectively. The empty implementations
|
||||||
|
provided in this demo can be extended to save even more power. */
|
||||||
|
void vPreSleepProcessing( unsigned long xExpectedIdleTime );
|
||||||
|
void vPostSleepProcessing( unsigned long xExpectedIdleTime );
|
||||||
|
#define configPRE_SLEEP_PROCESSING( xExpectedIdleTime ) vPreSleepProcessing( xExpectedIdleTime );
|
||||||
|
#define configPOST_SLEEP_PROCESSING( xExpectedIdleTime ) vPostSleepProcessing( xExpectedIdleTime );
|
||||||
|
|
||||||
|
#endif /* FREERTOS_CONFIG_H */
|
||||||
|
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief AST configuration.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
//! Configuration of the AST driver
|
||||||
|
|
||||||
|
#ifndef CONF_AST_H_INCLUDED
|
||||||
|
#define CONF_AST_H_INCLUDED
|
||||||
|
|
||||||
|
//#define AST_PER_ENABLE
|
||||||
|
// #define AST_ALARM_ENABLE
|
||||||
|
// #define AST_OVF_ENABLE
|
||||||
|
// #define AST_READY_ENABLE
|
||||||
|
// #define AST_CLKREADY_ENABLE
|
||||||
|
|
||||||
|
#endif /* CONF_AST_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,53 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Configuration File for SAM4L-EK Board.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONF_BOARD_H_INCLUDED
|
||||||
|
#define CONF_BOARD_H_INCLUDED
|
||||||
|
|
||||||
|
/** Enable Com Port. */
|
||||||
|
#define CONF_BOARD_COM_PORT
|
||||||
|
|
||||||
|
/** Enable LCD backlight */
|
||||||
|
#define CONF_BOARD_BL
|
||||||
|
|
||||||
|
#endif /* CONF_BOARD_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,97 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific system clock manager configuration
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CONF_CLOCK_H_INCLUDED
|
||||||
|
#define CONF_CLOCK_H_INCLUDED
|
||||||
|
|
||||||
|
//#define CONFIG_SYSCLK_INIT_CPUMASK 0
|
||||||
|
//#define CONFIG_SYSCLK_INIT_PBAMASK ((1 << SYSCLK_USART2))
|
||||||
|
//#define CONFIG_SYSCLK_INIT_PBBMASK ((1 << SYSCLK_HFLASHC_REGS))
|
||||||
|
//#define CONFIG_SYSCLK_INIT_PBCMASK ((1 << SYSCLK_PM) | (1 << SYSCLK_SCIF) | (1 << SYSCLK_GPIO))
|
||||||
|
//#define CONFIG_SYSCLK_INIT_PBDMASK ((1 << SYSCLK_BPM) | (1 << SYSCLK_BSCIF) | (1 << SYSCLK_AST))
|
||||||
|
//#define CONFIG_SYSCLK_INIT_HSBMASK ((1 << SYSCLK_HFLASHC_DATA) | (SYSCLK_PBA_BRIDGE) | (SYSCLK_PBC_BRIDGE) | (SYSCLK_PBD_BRIDGE))
|
||||||
|
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL0
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC80M
|
||||||
|
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST
|
||||||
|
//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC1M
|
||||||
|
|
||||||
|
/* RCFAST frequency selection: 0 for 4MHz, 1 for 8MHz and 2 for 12MHz */
|
||||||
|
//#define CONFIG_RCFAST_FRANGE 0
|
||||||
|
//#define CONFIG_RCFAST_FRANGE 1
|
||||||
|
#define CONFIG_RCFAST_FRANGE 2
|
||||||
|
|
||||||
|
/* Fbus = Fsys / (2 ^ BUS_div) */
|
||||||
|
#define CONFIG_SYSCLK_CPU_DIV 0
|
||||||
|
#define CONFIG_SYSCLK_PBA_DIV 0
|
||||||
|
#define CONFIG_SYSCLK_PBB_DIV 0
|
||||||
|
#define CONFIG_SYSCLK_PBC_DIV 2
|
||||||
|
#define CONFIG_SYSCLK_PBD_DIV 2
|
||||||
|
|
||||||
|
//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
|
||||||
|
//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL0
|
||||||
|
|
||||||
|
/* Fusb = Fsys / USB_div */
|
||||||
|
//#define CONFIG_USBCLK_DIV 1
|
||||||
|
|
||||||
|
//#define CONFIG_PLL0_SOURCE PLL_SRC_OSC0
|
||||||
|
|
||||||
|
/* Fpll0 = (Fclk * PLL_mul) / PLL_div */
|
||||||
|
//#define CONFIG_PLL0_MUL (48000000UL / BOARD_OSC0_HZ)
|
||||||
|
//#define CONFIG_PLL0_DIV 1
|
||||||
|
|
||||||
|
//#define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC0
|
||||||
|
//#define CONFIG_DFLL0_SOURCE GENCLK_SRC_RCSYS
|
||||||
|
//#define CONFIG_DFLL0_SOURCE GENCLK_SRC_OSC32K
|
||||||
|
//#define CONFIG_DFLL0_SOURCE GENCLK_SRC_RC80M
|
||||||
|
//#define CONFIG_DFLL0_SOURCE GENCLK_SRC_RC32K
|
||||||
|
|
||||||
|
/* Fdfll = (Fclk * DFLL_mul) / DFLL_div */
|
||||||
|
//#define CONFIG_DFLL0_FREQ 96000000UL
|
||||||
|
//#define CONFIG_DFLL0_MUL (CONFIG_DFLL0_FREQ / BOARD_OSC0_HZ)
|
||||||
|
//#define CONFIG_DFLL0_DIV 2
|
||||||
|
|
||||||
|
#endif /* CONF_CLOCK_H_INCLUDED */
|
||||||
|
|
||||||
|
|
@ -0,0 +1,133 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Configuration File for LCDCA example.
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONF_EXAMPLE_H_INCLUDED
|
||||||
|
#define CONF_EXAMPLE_H_INCLUDED
|
||||||
|
|
||||||
|
/** This is the pin for the onboard PB0 button, corresponding to PC03. */
|
||||||
|
#define NEXT_BUTTON GPIO_PUSH_BUTTON_0
|
||||||
|
|
||||||
|
/** LCD contrast level */
|
||||||
|
#define LCD_CONTRAST_LEVEL 30
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Here are definitions of C42364A glass LCD for this example
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** \name LCD Common
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define NB_OF_COM 4
|
||||||
|
#define NB_OF_SEG 40
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** \name LCD Connection Initialization
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define PORT_MASK NB_OF_SEG
|
||||||
|
#define LCD_DUTY (NB_OF_COM % 4)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** \name Digit Decoder
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** 7-segment with 3 commons terminals */
|
||||||
|
#define FIRST_7SEG_3C 255 /* 255 = unavailable */
|
||||||
|
#define WIDTH_7SEG_3C 255 /* 255 = unavailable */
|
||||||
|
#define DIR_7SEG_3C 0 /* 0 = from left to right */
|
||||||
|
|
||||||
|
/** 7-segment with 4 commons terminals */
|
||||||
|
#define FIRST_7SEG_4C 10
|
||||||
|
#define WIDTH_7SEG_4C 4
|
||||||
|
#define DIR_7SEG_4C 1 /* 1 = from right to left */
|
||||||
|
|
||||||
|
/** 14-segment with 4 commons terminals */
|
||||||
|
#define FIRST_14SEG_4C 36
|
||||||
|
#define WIDTH_14SEG_4C 7
|
||||||
|
#define DIR_14SEG_4C 1 /* 1 = from right to left */
|
||||||
|
|
||||||
|
/** 16-segment with 3 commons terminals */
|
||||||
|
#define FIRST_16SEG_3C 255 /* 255 = unavailable */
|
||||||
|
#define WIDTH_16SEG_3C 255 /* 255 = unavailable */
|
||||||
|
#define DIR_16SEG_3C 0
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** \name Pixel With Blinking feature
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define ICON_USB 1, 0
|
||||||
|
#define ICON_COLON 0, 0
|
||||||
|
#define ICON_WLESS 2, 0
|
||||||
|
#define ICON_AUDIO 3, 0
|
||||||
|
#define ICON_BAT 0, 1
|
||||||
|
#define ICON_ERROR 1, 1
|
||||||
|
#define ICON_CHINESE 2, 1
|
||||||
|
#define ICON_ARM 3, 1
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/** \name Pixel With No-Blinking feature
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define ICON_MINUS 0, 37
|
||||||
|
#define ICON_MINUS_SEG1 3, 30
|
||||||
|
#define ICON_MINUS_SEG2 0, 33
|
||||||
|
#define ICON_DOT_1 0, 29
|
||||||
|
#define ICON_DOT_2 3, 10
|
||||||
|
#define ICON_DOT_3 3, 8
|
||||||
|
#define ICON_DOT_4 3, 6
|
||||||
|
#define ICON_BAT_LEVEL_1 0, 21
|
||||||
|
#define ICON_BAT_LEVEL_2 0, 17
|
||||||
|
#define ICON_BAT_LEVEL_3 0, 25
|
||||||
|
#define ICON_AUDIO_PAUSE 3, 38
|
||||||
|
#define ICON_AUDIO_PLAY 3, 34
|
||||||
|
#define ICON_AM 3, 4
|
||||||
|
#define ICON_PM 3, 26
|
||||||
|
#define ICON_DEGREE_C 3, 22
|
||||||
|
#define ICON_DEGREE_F 3, 18
|
||||||
|
#define ICON_VOLT 3, 14
|
||||||
|
#define ICON_MILLI_VOLT 0, 13
|
||||||
|
/** @} */
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
#endif /* CONF_EXAMPLE_H_INCLUDED */
|
||||||
|
|
@ -0,0 +1,49 @@
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \brief Chip-specific sleep manager configuration
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* \asf_license_start
|
||||||
|
*
|
||||||
|
* \page License
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* 4. This software may only be redistributed and used in connection with an
|
||||||
|
* Atmel microcontroller product.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#ifndef CONF_SLEEPMGR_INCLUDED
|
||||||
|
#define CONF_SLEEPMGR_INCLUDED
|
||||||
|
|
||||||
|
// Sleep manager options
|
||||||
|
#define CONFIG_SLEEPMGR_ENABLE
|
||||||
|
|
||||||
|
#endif /* CONF_SLEEPMGR_INCLUDED */
|
||||||
309
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c
Normal file
309
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c
Normal file
|
|
@ -0,0 +1,309 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* This project provides two demo applications. A low power project that
|
||||||
|
* demonstrates the FreeRTOS tickless mode, and a more comprehensive test and
|
||||||
|
* demo application. The configCREATE_LOW_POWER_DEMO setting (defined at the
|
||||||
|
* top of FreeRTOSConfig.h) is used to select between the two. The low power
|
||||||
|
* demo is implemented and described in main_low_power.c. The more
|
||||||
|
* comprehensive test and demo application is implemented and described in
|
||||||
|
* main_full.c.
|
||||||
|
*
|
||||||
|
* This file implements the code that is not demo specific, including the
|
||||||
|
* hardware setup and FreeRTOS hook functions.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Standard includes. */
|
||||||
|
#include <stdio.h>
|
||||||
|
|
||||||
|
/* Kernel includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
|
||||||
|
/* Standard demo includes - just needed for the LED (ParTest) initialisation
|
||||||
|
function. */
|
||||||
|
#include "partest.h"
|
||||||
|
|
||||||
|
/* Atmel library includes. */
|
||||||
|
#include <asf.h>
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Set up the hardware ready to run this demo.
|
||||||
|
*/
|
||||||
|
static void prvSetupHardware( void );
|
||||||
|
|
||||||
|
/*
|
||||||
|
* main_low_power() is used when configCREATE_LOW_POWER_DEMO is set to 1.
|
||||||
|
* main_full() is used when configCREATE_LOW_POWER_DEMO is set to 0.
|
||||||
|
* configCREATE_LOW_POWER_DEMO is defined at the top of main.c.
|
||||||
|
*/
|
||||||
|
extern void main_low_power( void );
|
||||||
|
extern void main_full( void );
|
||||||
|
|
||||||
|
/* Prototypes for the standard FreeRTOS callback/hook functions implemented
|
||||||
|
within this file. */
|
||||||
|
void vApplicationMallocFailedHook( void );
|
||||||
|
void vApplicationIdleHook( void );
|
||||||
|
void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName );
|
||||||
|
void vApplicationTickHook( void );
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* See the documentation page for this demo on the FreeRTOS.org web site for
|
||||||
|
full information - including hardware setup requirements. */
|
||||||
|
int main( void )
|
||||||
|
{
|
||||||
|
/* Prepare the hardware to run this demo. */
|
||||||
|
prvSetupHardware();
|
||||||
|
|
||||||
|
/* The configCREATE_LOW_POWER_DEMO setting is described at the top of
|
||||||
|
this file. */
|
||||||
|
#if configCREATE_LOW_POWER_DEMO == 1
|
||||||
|
{
|
||||||
|
main_low_power();
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
{
|
||||||
|
main_full();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
static void prvSetupHardware( void )
|
||||||
|
{
|
||||||
|
extern void SystemCoreClockUpdate( void );
|
||||||
|
|
||||||
|
/* ASF function to setup clocking. */
|
||||||
|
sysclk_init();
|
||||||
|
|
||||||
|
/* Ensure all priority bits are assigned as preemption priority bits. */
|
||||||
|
NVIC_SetPriorityGrouping( 0 );
|
||||||
|
|
||||||
|
/* Atmel library function to setup for the evaluation kit being used. */
|
||||||
|
board_init();
|
||||||
|
|
||||||
|
/* Initialise the sleep manager in case the low power demo is being used. */
|
||||||
|
sleepmgr_init();
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vApplicationMallocFailedHook( void )
|
||||||
|
{
|
||||||
|
/* vApplicationMallocFailedHook() will only be called if
|
||||||
|
configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
|
||||||
|
function that will get called if a call to pvPortMalloc() fails.
|
||||||
|
pvPortMalloc() is called internally by the kernel whenever a task, queue,
|
||||||
|
timer or semaphore is created. It is also called by various parts of the
|
||||||
|
demo application. If heap_1.c or heap_2.c are used, then the size of the
|
||||||
|
heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
|
||||||
|
FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
|
||||||
|
to query the size of free heap space that remains (although it does not
|
||||||
|
provide information on how the remaining heap might be fragmented). */
|
||||||
|
taskDISABLE_INTERRUPTS();
|
||||||
|
for( ;; );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vApplicationIdleHook( void )
|
||||||
|
{
|
||||||
|
/* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set
|
||||||
|
to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle
|
||||||
|
task. It is essential that code added to this hook function never attempts
|
||||||
|
to block in any way (for example, call xQueueReceive() with a block time
|
||||||
|
specified, or call vTaskDelay()). If the application makes use of the
|
||||||
|
vTaskDelete() API function (as this demo application does) then it is also
|
||||||
|
important that vApplicationIdleHook() is permitted to return to its calling
|
||||||
|
function, because it is the responsibility of the idle task to clean up
|
||||||
|
memory allocated by the kernel to any task that has since been deleted. */
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )
|
||||||
|
{
|
||||||
|
( void ) pcTaskName;
|
||||||
|
( void ) pxTask;
|
||||||
|
|
||||||
|
/* Run time stack overflow checking is performed if
|
||||||
|
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
|
||||||
|
function is called if a stack overflow is detected. */
|
||||||
|
taskDISABLE_INTERRUPTS();
|
||||||
|
for( ;; );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vApplicationTickHook( void )
|
||||||
|
{
|
||||||
|
/* This function will be called by each tick interrupt if
|
||||||
|
configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be
|
||||||
|
added here, but the tick hook is called from an interrupt context, so
|
||||||
|
code must not attempt to block, and only the interrupt safe FreeRTOS API
|
||||||
|
functions can be used (those that end in FromISR()). */
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vAssertCalled( void )
|
||||||
|
{
|
||||||
|
volatile unsigned long ul = 0;
|
||||||
|
|
||||||
|
taskENTER_CRITICAL();
|
||||||
|
{
|
||||||
|
/* Set ul to a non-zero value using the debugger to step out of this
|
||||||
|
function. */
|
||||||
|
while( ul == 0 )
|
||||||
|
{
|
||||||
|
__asm volatile( "NOP" );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
taskEXIT_CRITICAL();
|
||||||
|
}
|
||||||
273
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c
Normal file
273
FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c
Normal file
|
|
@ -0,0 +1,273 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* NOTE 1: This project provides two demo applications. A low power tickless
|
||||||
|
* project, and a more comprehensive test and demo application. The
|
||||||
|
* configCREATE_LOW_POWER_DEMO setting in FreeRTOSConfig.h is used to
|
||||||
|
* select between the two. See the notes on using
|
||||||
|
* configCREATE_LOW_POWER_DEMO in FreeRTOSConfig.h. This file implements
|
||||||
|
* the comprehensive test and demo version.
|
||||||
|
*
|
||||||
|
* NOTE 2: This file only contains the source code that is specific to the
|
||||||
|
* full demo. Generic functions, such FreeRTOS hook functions, and functions
|
||||||
|
* required to configure the hardware, are defined in main.c.
|
||||||
|
******************************************************************************
|
||||||
|
*
|
||||||
|
* main_full() creates all the demo application tasks and a software timer, then
|
||||||
|
* starts the scheduler. The web documentation provides more details of the
|
||||||
|
* standard demo application tasks, which provide no particular functionality,
|
||||||
|
* but do provide a good example of how to use the FreeRTOS API.
|
||||||
|
*
|
||||||
|
* In addition to the standard demo tasks, the following tasks and tests are
|
||||||
|
* defined and/or created within this file:
|
||||||
|
*
|
||||||
|
* "Check" timer - The check software timer period is initially set to three
|
||||||
|
* seconds. The callback function associated with the check software timer
|
||||||
|
* checks that all the standard demo tasks are not only still executing, but
|
||||||
|
* are executing without reporting any errors. If the check software timer
|
||||||
|
* discovers that a task has either stalled, or reported an error, then it
|
||||||
|
* changes its own execution period from the initial three seconds, to just
|
||||||
|
* 200ms. The check software timer callback function also toggles an LED each
|
||||||
|
* time it is called. This provides a visual indication of the system status:
|
||||||
|
* If the LED toggles every three seconds, then no issues have been discovered.
|
||||||
|
* If the LED toggles every 200ms, then an issue has been discovered with at
|
||||||
|
* least one task.
|
||||||
|
*
|
||||||
|
* See the documentation page for this demo on the FreeRTOS.org web site for
|
||||||
|
* full information, including hardware setup requirements.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Standard includes. */
|
||||||
|
#include <stdio.h>
|
||||||
|
|
||||||
|
/* Kernel includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
#include "timers.h"
|
||||||
|
#include "semphr.h"
|
||||||
|
|
||||||
|
/* Standard demo application includes. */
|
||||||
|
#include "PollQ.h"
|
||||||
|
#include "semtest.h"
|
||||||
|
#include "dynamic.h"
|
||||||
|
#include "BlockQ.h"
|
||||||
|
#include "blocktim.h"
|
||||||
|
#include "countsem.h"
|
||||||
|
#include "GenQTest.h"
|
||||||
|
#include "recmutex.h"
|
||||||
|
#include "partest.h"
|
||||||
|
|
||||||
|
/* Atmel library includes. */
|
||||||
|
#include "asf.h"
|
||||||
|
|
||||||
|
/* Priorities for the demo application tasks. */
|
||||||
|
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )
|
||||||
|
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
|
||||||
|
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
|
||||||
|
|
||||||
|
/* A block time of zero simply means "don't block". */
|
||||||
|
#define mainDONT_BLOCK ( 0UL )
|
||||||
|
|
||||||
|
/* The period after which the check timer will expire providing no errors
|
||||||
|
have been reported by any of the standard demo tasks. ms are converted to the
|
||||||
|
equivalent in ticks using the portTICK_RATE_MS constant. */
|
||||||
|
#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )
|
||||||
|
|
||||||
|
/* The period at which the check timer will expire, in ms, if an error has been
|
||||||
|
reported in one of the standard demo tasks. ms are converted to the equivalent
|
||||||
|
in ticks using the portTICK_RATE_MS constant. */
|
||||||
|
#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )
|
||||||
|
|
||||||
|
/* The LED toggled by the check timer. */
|
||||||
|
#define mainCHECK_LED ( 0 )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The check timer callback function, as described at the top of this file.
|
||||||
|
*/
|
||||||
|
static void prvCheckTimerCallback( xTimerHandle xTimer );
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void main_full( void )
|
||||||
|
{
|
||||||
|
xTimerHandle xCheckTimer = NULL;
|
||||||
|
|
||||||
|
/* Start all the other standard demo/test tasks. They have not particular
|
||||||
|
functionality, but do demonstrate how to use the FreeRTOS API and test the
|
||||||
|
kernel port. */
|
||||||
|
vStartDynamicPriorityTasks();
|
||||||
|
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
|
||||||
|
vCreateBlockTimeTasks();
|
||||||
|
vStartCountingSemaphoreTasks();
|
||||||
|
vStartGenericQueueTasks( tskIDLE_PRIORITY );
|
||||||
|
vStartRecursiveMutexTasks();
|
||||||
|
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
|
||||||
|
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||||
|
|
||||||
|
/* Create the software timer that performs the 'check' functionality,
|
||||||
|
as described at the top of this file. */
|
||||||
|
xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */
|
||||||
|
( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */
|
||||||
|
pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
|
||||||
|
( void * ) 0, /* The ID is not used, so can be set to anything. */
|
||||||
|
prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */
|
||||||
|
);
|
||||||
|
|
||||||
|
if( xCheckTimer != NULL )
|
||||||
|
{
|
||||||
|
xTimerStart( xCheckTimer, mainDONT_BLOCK );
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Start the scheduler. */
|
||||||
|
vTaskStartScheduler();
|
||||||
|
|
||||||
|
/* If all is well, the scheduler will now be running, and the following line
|
||||||
|
will never be reached. If the following line does execute, then there was
|
||||||
|
insufficient FreeRTOS heap memory available for the idle and/or timer tasks
|
||||||
|
to be created. See the memory management section on the FreeRTOS web site
|
||||||
|
for more details. */
|
||||||
|
for( ;; );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
static void prvCheckTimerCallback( xTimerHandle xTimer )
|
||||||
|
{
|
||||||
|
static long lChangedTimerPeriodAlready = pdFALSE;
|
||||||
|
unsigned long ulErrorFound = pdFALSE;
|
||||||
|
|
||||||
|
/* Check all the demo tasks (other than the flash tasks) to ensure
|
||||||
|
they are all still running, and that none have detected an error. */
|
||||||
|
|
||||||
|
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( xAreBlockingQueuesStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( xArePollingQueuesStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
|
||||||
|
{
|
||||||
|
ulErrorFound = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Toggle the check LED to give an indication of the system status. If
|
||||||
|
the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then
|
||||||
|
everything is ok. A faster toggle indicates an error. */
|
||||||
|
vParTestToggleLED( mainCHECK_LED );
|
||||||
|
|
||||||
|
/* Have any errors been latch in ulErrorFound? If so, shorten the
|
||||||
|
period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.
|
||||||
|
This will result in an increase in the rate at which mainCHECK_LED
|
||||||
|
toggles. */
|
||||||
|
if( ulErrorFound != pdFALSE )
|
||||||
|
{
|
||||||
|
if( lChangedTimerPeriodAlready == pdFALSE )
|
||||||
|
{
|
||||||
|
lChangedTimerPeriodAlready = pdTRUE;
|
||||||
|
|
||||||
|
/* This call to xTimerChangePeriod() uses a zero block time.
|
||||||
|
Functions called from inside of a timer callback function must
|
||||||
|
*never* attempt to block. */
|
||||||
|
xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
@ -0,0 +1,267 @@
|
||||||
|
/*
|
||||||
|
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* ****************************************************************************
|
||||||
|
* When configCREATE_LOW_POWER_DEMO is set to 1 in FreeRTOSConfig.h main() will
|
||||||
|
* call main_low_power(), which is defined in this file. main_low_power()
|
||||||
|
* demonstrates FreeRTOS tick suppression being used to allow the MCU to be
|
||||||
|
* placed into the Retention low power mode. When configCREATE_LOW_POWER_DEMO
|
||||||
|
* is set to 0 main will instead call main_full(), which is a more comprehensive
|
||||||
|
* RTOS demonstration.
|
||||||
|
* ****************************************************************************
|
||||||
|
*
|
||||||
|
* This application demonstrates the FreeRTOS tickless idle mode (tick
|
||||||
|
* suppression). See http://www.freertos.org/low-power-tickless-rtos.html
|
||||||
|
* The demo is configured to execute on the SAM4L-EK.
|
||||||
|
*
|
||||||
|
* Functionality:
|
||||||
|
*
|
||||||
|
* + Two tasks are created, an Rx task and a Tx task.
|
||||||
|
*
|
||||||
|
* + The Rx task blocks on a queue to wait for data, blipping an LED each time
|
||||||
|
* data is received (turning it on and then off again) before returning to
|
||||||
|
* block on the queue once more.
|
||||||
|
*
|
||||||
|
* + The Tx task repeatedly enters the Blocked state for 500ms. On exiting the
|
||||||
|
* blocked state the Tx task sends a value through the queue to the Rx task
|
||||||
|
* (causing the Rx task to exit the blocked state and blip the LED).
|
||||||
|
*
|
||||||
|
* Blocking for a finite period allows the kernel to stop the tick interrupt
|
||||||
|
* and place the SAM4L into Retention mode - the lowest power mode possible
|
||||||
|
* that allows the CPU registers and RAM to retain their state.
|
||||||
|
*
|
||||||
|
* Observed behaviour:
|
||||||
|
*
|
||||||
|
* For correct results the SAM4L-EK must be connected (and powered) using only
|
||||||
|
* the JTAG USB connector, but the debugger must not be connected (the
|
||||||
|
* application must be executed 'stand alone').
|
||||||
|
*
|
||||||
|
* The MCU spends most of its time in the Retention low power state, during
|
||||||
|
* which times the current monitor (built onto the SAM4L-EK) will show a low
|
||||||
|
* current reading.
|
||||||
|
*
|
||||||
|
* Every 500ms the MCU will come out of the low power state to turn the LED on,
|
||||||
|
* then return to the low power state for 20ms before leaving the low power
|
||||||
|
* state again to turn the LED off. This will be observed as a fast blipping
|
||||||
|
* on the LED, and two very brief dots appearing on the current monitor graph
|
||||||
|
* (often observed as a single dot).
|
||||||
|
*
|
||||||
|
* The RTOS tick is suppressed while the MCU is in its low power state.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* ASF includes. */
|
||||||
|
#include <asf.h>
|
||||||
|
|
||||||
|
/* Kernel includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
#include "queue.h"
|
||||||
|
|
||||||
|
/* Common demo includes. */
|
||||||
|
#include "partest.h"
|
||||||
|
|
||||||
|
/* Priorities at which the Rx and Tx tasks are created. */
|
||||||
|
#define configQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||||
|
#define configQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||||
|
|
||||||
|
/* The number of items the queue can hold. This is 1 as the Rx task will
|
||||||
|
remove items as they are added so the Tx task should always find the queue
|
||||||
|
empty. */
|
||||||
|
#define mainQUEUE_LENGTH ( 1 )
|
||||||
|
|
||||||
|
/* The LED used to indicate that a value has been received on the queue. */
|
||||||
|
#define mainQUEUE_LED ( 0 )
|
||||||
|
|
||||||
|
/* The rate at which the Tx task sends to the queue. */
|
||||||
|
#define mainTX_DELAY ( 500UL / portTICK_RATE_MS )
|
||||||
|
|
||||||
|
/* A block time of zero simply means "don't block". */
|
||||||
|
#define mainDONT_BLOCK ( 0 )
|
||||||
|
|
||||||
|
/* The value that is sent from the Tx task to the Rx task on the queue. */
|
||||||
|
#define mainQUEUED_VALUE ( 100UL )
|
||||||
|
|
||||||
|
/* The length of time the LED will remain on for. It is on just long enough
|
||||||
|
to be able to see with the human eye so as not to distort the power readings too
|
||||||
|
much. */
|
||||||
|
#define mainLED_TOGGLE_DELAY ( 20 / portTICK_RATE_MS )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The Rx and Tx tasks as described at the top of this file.
|
||||||
|
*/
|
||||||
|
static void prvQueueReceiveTask( void *pvParameters );
|
||||||
|
static void prvQueueSendTask( void *pvParameters );
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* The queue to pass data from the Tx task to the Rx task. */
|
||||||
|
static xQueueHandle xQueue = NULL;
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void main_low_power( void )
|
||||||
|
{
|
||||||
|
/* Create the queue. */
|
||||||
|
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
|
||||||
|
configASSERT( xQueue );
|
||||||
|
|
||||||
|
/* Start the two tasks as described at the top of this file. */
|
||||||
|
xTaskCreate( prvQueueReceiveTask, ( const signed char * const ) "Rx", configMINIMAL_STACK_SIZE, NULL, configQUEUE_RECEIVE_TASK_PRIORITY, NULL );
|
||||||
|
xTaskCreate( prvQueueSendTask, ( const signed char * const ) "TX", configMINIMAL_STACK_SIZE, NULL, configQUEUE_SEND_TASK_PRIORITY, NULL );
|
||||||
|
|
||||||
|
/* Start the scheduler running running. */
|
||||||
|
vTaskStartScheduler();
|
||||||
|
|
||||||
|
/* If all is well the next line of code will not be reached as the
|
||||||
|
scheduler will be running. If the next line is reached then it is likely
|
||||||
|
there was insufficient FreeRTOS heap available for the idle task and/or
|
||||||
|
timer task to be created. See http://www.freertos.org/a00111.html. */
|
||||||
|
for( ;; );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
static void prvQueueSendTask( void *pvParameters )
|
||||||
|
{
|
||||||
|
const unsigned long ulValueToSend = mainQUEUED_VALUE;
|
||||||
|
|
||||||
|
/* Remove compiler warning about unused parameter. */
|
||||||
|
( void ) pvParameters;
|
||||||
|
|
||||||
|
for( ;; )
|
||||||
|
{
|
||||||
|
/* Place this task into the blocked state until it is time to run again.
|
||||||
|
The kernel will place the MCU into the Retention low power sleep state
|
||||||
|
when the idle task next runs. */
|
||||||
|
vTaskDelay( mainTX_DELAY );
|
||||||
|
|
||||||
|
/* Send to the queue - causing the queue receive task to flash its LED.
|
||||||
|
It should not be necessary to block on the queue send because the Rx
|
||||||
|
task will already have removed the last queued item. */
|
||||||
|
xQueueSend( xQueue, &ulValueToSend, mainDONT_BLOCK );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
static void prvQueueReceiveTask( void *pvParameters )
|
||||||
|
{
|
||||||
|
unsigned long ulReceivedValue;
|
||||||
|
|
||||||
|
/* Remove compiler warning about unused parameter. */
|
||||||
|
( void ) pvParameters;
|
||||||
|
|
||||||
|
for( ;; )
|
||||||
|
{
|
||||||
|
/* Wait until something arrives in the queue. */
|
||||||
|
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
|
||||||
|
|
||||||
|
/* To get here something must have arrived, but is it the expected
|
||||||
|
value? If it is, turn the LED on for a short while. */
|
||||||
|
if( ulReceivedValue == mainQUEUED_VALUE )
|
||||||
|
{
|
||||||
|
vParTestSetLED( mainQUEUE_LED, pdTRUE );
|
||||||
|
vTaskDelay( mainLED_TOGGLE_DELAY );
|
||||||
|
vParTestSetLED( mainQUEUE_LED, pdFALSE );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPreSleepProcessing( unsigned long ulExpectedIdleTime )
|
||||||
|
{
|
||||||
|
/* Called by the kernel before it places the MCU into a sleep mode because
|
||||||
|
configPRE_SLEEP_PROCESSING() is #defined to vPreSleepProcessing().
|
||||||
|
|
||||||
|
NOTE: Additional actions can be taken here to get the power consumption
|
||||||
|
even lower. For example, peripherals can be turned off here, and then back
|
||||||
|
on again in the post sleep processing function. For maximum power saving
|
||||||
|
ensure all unused pins are in their lowest power state. */
|
||||||
|
|
||||||
|
/* Avoid compiler warnings about the unused parameter. */
|
||||||
|
( void ) ulExpectedIdleTime;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPostSleepProcessing( unsigned long ulExpectedIdleTime )
|
||||||
|
{
|
||||||
|
/* Called by the kernel when the MCU exits a sleep mode because
|
||||||
|
configPOST_SLEEP_PROCESSING is #defined to vPostSleepProcessing(). */
|
||||||
|
|
||||||
|
/* Avoid compiler warnings about the unused parameter. */
|
||||||
|
( void ) ulExpectedIdleTime;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
Loading…
Reference in a new issue