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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Minor updates relating to formatting and comments only.
This commit is contained in:
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@ -179,7 +179,7 @@
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</matcher>
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</matcher>
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</filter>
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</filter>
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<filter>
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<filter>
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<id>1405341154152</id>
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<id>1426008785534</id>
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<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>
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<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>
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<type>10</type>
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<type>10</type>
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<matcher>
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<matcher>
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@ -188,7 +188,7 @@
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</matcher>
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</matcher>
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</filter>
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</filter>
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<filter>
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<filter>
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<id>1405341154162</id>
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<id>1426008785544</id>
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<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>
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<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>
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<type>10</type>
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<type>10</type>
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<matcher>
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<matcher>
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@ -433,7 +433,7 @@ sys_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
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}
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}
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if (time_needed == SYS_ARCH_TIMEOUT) {
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if (time_needed == SYS_ARCH_TIMEOUT) {
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/* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message
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/* If time == SYS_ARCH_TIMEOUT, a timeout occurred before a message
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could be fetched. We should now call the timeout handler and
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could be fetched. We should now call the timeout handler and
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deallocate the memory allocated for the timeout. */
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deallocate the memory allocated for the timeout. */
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tmptimeout = next_timeout;
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tmptimeout = next_timeout;
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@ -306,7 +306,9 @@ extern void vPortTickISR( void *pvUnused );
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purpose. */
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purpose. */
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vPortEnableInterrupt( XPAR_INTC_0_TMRCTR_0_VEC_ID );
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vPortEnableInterrupt( XPAR_INTC_0_TMRCTR_0_VEC_ID );
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/* Configure the timer interrupt handler. */
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/* Configure the timer interrupt handler. This installs the handler
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directly, rather than through the Xilinx driver. This is done for
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efficiency. */
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XTmrCtr_SetHandler( &xTickTimerInstance, ( void * ) vPortTickISR, NULL );
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XTmrCtr_SetHandler( &xTickTimerInstance, ( void * ) vPortTickISR, NULL );
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/* Set the correct period for the timer. */
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/* Set the correct period for the timer. */
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@ -87,7 +87,7 @@ typedef void (*TaskFunction_t)( void * );
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#define errQUEUE_EMPTY ( ( BaseType_t ) 0 )
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#define errQUEUE_EMPTY ( ( BaseType_t ) 0 )
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#define errQUEUE_FULL ( ( BaseType_t ) 0 )
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#define errQUEUE_FULL ( ( BaseType_t ) 0 )
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/* Error definitions. */
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/* FreeRTOS error definitions. */
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#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )
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#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )
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#define errQUEUE_BLOCKED ( -4 )
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#define errQUEUE_BLOCKED ( -4 )
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#define errQUEUE_YIELD ( -5 )
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#define errQUEUE_YIELD ( -5 )
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@ -103,6 +103,11 @@ typedef void (*TaskFunction_t)( void * );
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#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
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#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
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#endif
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#endif
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/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
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itself. */
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#define pdFREERTOS_LITTLE_ENDIAN 0
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#define pdFREERTOS_BIG_ENDIAN 1
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#endif /* PROJDEFS_H */
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#endif /* PROJDEFS_H */
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@ -214,6 +214,7 @@ typedef enum
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* \ingroup SchedulerControl
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* \ingroup SchedulerControl
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*/
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*/
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#define taskENTER_CRITICAL() portENTER_CRITICAL()
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#define taskENTER_CRITICAL() portENTER_CRITICAL()
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#define taskENTER_CRITICAL_FROM_ISR( x ) portSET_INTERRUPT_MASK_FROM_ISR( x )
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/**
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/**
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* task. h
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* task. h
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@ -228,7 +229,7 @@ typedef enum
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* \ingroup SchedulerControl
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* \ingroup SchedulerControl
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*/
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*/
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#define taskEXIT_CRITICAL() portEXIT_CRITICAL()
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#define taskEXIT_CRITICAL() portEXIT_CRITICAL()
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#define taskEXIT_CRITICAL_FROM_ISR() portCLEAR_INTERRUPT_MASK_FROM_ISR()
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/**
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/**
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* task. h
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* task. h
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*
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*
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@ -352,7 +352,7 @@ vPortStartFirstTask:
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#if MICROBLAZE_EXCEPTIONS_ENABLED == 1
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#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
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.text
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.text
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.align 4
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.align 4
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@ -364,7 +364,7 @@ vPortExceptionHandlerEntry:
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bralid r15, vPortExceptionHandler
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bralid r15, vPortExceptionHandler
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or r0, r0, r0
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or r0, r0, r0
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#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */
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#endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */
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@ -119,20 +119,19 @@ void microblaze_disable_interrupts( void );
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void microblaze_enable_interrupts( void );
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void microblaze_enable_interrupts( void );
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#define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()
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#define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()
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#define portENABLE_INTERRUPTS() microblaze_enable_interrupts()
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#define portENABLE_INTERRUPTS() microblaze_enable_interrupts()
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Critical section macros. */
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/* Critical section macros. */
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void vPortEnterCritical( void );
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void vPortEnterCritical( void );
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void vPortExitCritical( void );
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void vPortExitCritical( void );
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#define portENTER_CRITICAL() { \
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#define portENTER_CRITICAL() { \
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extern volatile UBaseType_t uxCriticalNesting; \
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extern volatile UBaseType_t uxCriticalNesting; \
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microblaze_disable_interrupts(); \
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microblaze_disable_interrupts(); \
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uxCriticalNesting++; \
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uxCriticalNesting++; \
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}
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}
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#define portEXIT_CRITICAL() { \
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#define portEXIT_CRITICAL() { \
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extern volatile UBaseType_t uxCriticalNesting; \
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extern volatile UBaseType_t uxCriticalNesting; \
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/* Interrupts are disabled, so we can */ \
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/* Interrupts are disabled, so we can */ \
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/* access the variable directly. */ \
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/* access the variable directly. */ \
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uxCriticalNesting--; \
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uxCriticalNesting--; \
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@ -546,7 +546,7 @@ void xPortSysTickHandler( void )
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__weak void vPortSetupTimerInterrupt( void )
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__weak void vPortSetupTimerInterrupt( void )
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{
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{
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/* Calculate the constants required to configure the tick interrupt. */
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/* Calculate the constants required to configure the tick interrupt. */
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#if configUSE_TICKLESS_IDLE == 1
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#if( configUSE_TICKLESS_IDLE == 1 )
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{
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{
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ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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@ -105,7 +105,7 @@ typedef unsigned long UBaseType_t;
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/* Hardware specifics. */
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portINLINE __inline
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#if defined( __x86_64__) || defined( _M_X64 )
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#if defined( __x86_64__) || defined( _M_X64 )
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#define portBYTE_ALIGNMENT 8
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#define portBYTE_ALIGNMENT 8
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portINTERRUPT_YIELD ( 0UL )
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#define portINTERRUPT_YIELD ( 0UL )
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#define portINTERRUPT_TICK ( 1UL )
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#define portINTERRUPT_TICK ( 1UL )
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@ -271,6 +271,7 @@ __asm void prvStartFirstTask( void )
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ldr r0, =0xE000ED08
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ldr r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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ldr r0, [r0]
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ldr r0, [r0]
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/* Set the msp back to the start of the stack. */
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/* Set the msp back to the start of the stack. */
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msr msp, r0
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msr msp, r0
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/* Globally enable interrupts. */
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/* Globally enable interrupts. */
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@ -555,7 +555,7 @@ TCB_t * pxNewTCB;
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StackType_t *pxTopOfStack;
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StackType_t *pxTopOfStack;
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configASSERT( pxTaskCode );
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configASSERT( pxTaskCode );
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configASSERT( ( ( uxPriority & ( ~portPRIVILEGE_BIT ) ) < configMAX_PRIORITIES ) );
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configASSERT( ( ( uxPriority & ( UBaseType_t ) ( ~portPRIVILEGE_BIT ) ) < ( UBaseType_t ) configMAX_PRIORITIES ) );
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/* Allocate the memory required by the TCB and stack for the new task,
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/* Allocate the memory required by the TCB and stack for the new task,
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checking that the allocation was successful. */
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checking that the allocation was successful. */
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