mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-31 07:28:37 -04:00
Add "is inside interrupt" function to MPU ports.
Make clock setup functions weak symbols in ARMv8-M ports. Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
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52 changed files with 719 additions and 270 deletions
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@ -257,11 +257,6 @@
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#define portNO_SECURE_CONTEXT 0
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/*-----------------------------------------------------------*/
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/**
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* @brief Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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/**
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* @brief Used to catch tasks that attempt to return from their implementing
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* function.
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@ -282,6 +277,22 @@ static void prvTaskExitError( void );
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static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
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#endif /* configENABLE_FPU */
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/**
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* @brief Setup the timer to generate the tick interrupts.
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*
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* The implementation in this file is weak to allow application writers to
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* change the timer used to generate the tick interrupt.
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*/
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void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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/**
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* @brief Checks whether the current execution context is interrupt.
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*
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* @return pdTRUE if the current execution context is interrupt, pdFALSE
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* otherwise.
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*/
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BaseType_t xPortIsInsideInterrupt( void );
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/**
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* @brief Yield the processor.
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*/
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@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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#endif /* configENABLE_TRUSTZONE */
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
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__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
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{
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/* Stop and reset the SysTick. */
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*( portNVIC_SYSTICK_CTRL ) = 0UL;
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@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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* here already. */
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prvSetupTimerInterrupt();
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vPortSetupTimerInterrupt();
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/* Initialize the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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}
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#endif /* configENABLE_MPU */
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/*-----------------------------------------------------------*/
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BaseType_t xPortIsInsideInterrupt( void )
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{
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uint32_t ulCurrentInterrupt;
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BaseType_t xReturn;
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/* Obtain the number of the currently executing interrupt. Interrupt Program
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* Status Register (IPSR) holds the exception number of the currently-executing
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* exception or zero for Thread mode.*/
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__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
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if( ulCurrentInterrupt == 0 )
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{
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xReturn = pdFALSE;
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}
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else
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{
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xReturn = pdTRUE;
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}
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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@ -176,24 +176,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
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}
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/*-----------------------------------------------------------*/
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uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
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uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
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{
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__asm volatile
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(
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" mrs r0, PRIMASK \n"
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" cpsid i \n"
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" bx lr \n"
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::: "memory"
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" mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */
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" mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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" msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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" dsb \n"
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" isb \n"
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" bx lr \n" /* Return. */
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:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
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);
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}
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/*-----------------------------------------------------------*/
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void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
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void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
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{
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__asm volatile
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(
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" msr PRIMASK, r0 \n"
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" bx lr \n"
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" msr basepri, r0 \n" /* basepri = ulMask. */
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" dsb \n"
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" isb \n"
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" bx lr \n" /* Return. */
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::: "memory"
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);
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}
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@ -266,9 +271,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
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#endif /* configENABLE_MPU */
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" \n"
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" select_next_task: \n"
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" cpsid i \n"
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" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
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" msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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" dsb \n"
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" isb \n"
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" bl vTaskSwitchContext \n"
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" cpsie i \n"
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" mov r0, #0 \n" /* r0 = 0. */
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" msr basepri, r0 \n" /* Enable interrupts. */
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" \n"
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" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r3, [r2] \n" /* Read pxCurrentTCB. */
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@ -352,6 +361,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
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"xRNRConst: .word 0xe000ed98 \n"
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"xRBARConst: .word 0xe000ed9c \n"
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#endif /* configENABLE_MPU */
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:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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);
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}
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/*-----------------------------------------------------------*/
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@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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/**
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* @brief Disables interrupts.
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*/
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uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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/**
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* @brief Enables interrupts.
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*/
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void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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/**
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* @brief PendSV Exception handler.
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@ -103,13 +103,15 @@ typedef unsigned long UBaseType_t;
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/**
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* @brief Extern declarations.
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*/
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extern BaseType_t xPortIsInsideInterrupt( void );
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extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
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extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
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extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
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extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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#if( configENABLE_TRUSTZONE == 1 )
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extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
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@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
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/**
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* @brief Critical section management.
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*/
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )
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#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
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#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
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#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
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#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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/*-----------------------------------------------------------*/
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