mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Update the FreeRTOS+Trace recorder and Win32 demo app.
This commit is contained in:
Richard Barry
parent
96218c34a1
commit
26152204a4
17 changed files with 1785 additions and 750 deletions
Binary file not shown.
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@ -125,7 +125,17 @@ unsigned long ulReturn;
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/* Subtract the performance counter value reading taken when the
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application started to get a count from that reference point, then
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scale to (simulated) 1/100ths of a millisecond. */
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ulReturn = ( unsigned long ) ( ( liCurrentCount.QuadPart - llInitialRunTimeCounterValue ) / llTicksPerHundedthMillisecond );
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if( llTicksPerHundedthMillisecond == 0 )
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{
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/* The trace macros can call this function before the kernel has been
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started, in which case llTicksPerHundedthMillisecond will not have been
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initialised. */
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ulReturn = 0;
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}
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else
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{
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ulReturn = ( unsigned long ) ( ( liCurrentCount.QuadPart - llInitialRunTimeCounterValue ) / llTicksPerHundedthMillisecond );
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}
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return ulReturn;
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}
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@ -1,6 +1,6 @@
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/*******************************************************************************
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* FreeRTOS+Trace v2.2.2 Recorder Library
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* Percepio AB, www.percepio.se
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* FreeRTOS+Trace v2.3.0 Recorder Library
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* Percepio AB, www.percepio.com
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*
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* trcPort.h
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*
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@ -34,17 +34,15 @@
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*
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* FreeRTOS+Trace is available as Free Edition and in two premium editions.
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* You may use the premium features during 30 days for evaluation.
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* Download FreeRTOS+Trace at http://www.percepio.se/index.php?page=downloads
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* Download FreeRTOS+Trace at http://www.percepio.com/products/downloads/
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*
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* Copyright Percepio AB, 2012.
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* www.percepio.se
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* www.percepio.com
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******************************************************************************/
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#ifndef TRCPORT_H
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#define TRCPORT_H
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#include "trcBase.h"
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/* If FreeRTOS Win32 port */
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#ifdef WIN32
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@ -63,7 +61,9 @@
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******************************************************************************/
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#define WIN32_PORT_SAVE_WHEN_STOPPED 1
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#define WIN32_PORT_EXIT_WHEN_STOPPED 1
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#else
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#define WIN32_PORT_SAVE_WHEN_STOPPED 0
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#define WIN32_PORT_EXIT_WHEN_STOPPED 0
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#endif
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#define DIRECTION_INCREMENTING 1
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@ -87,10 +87,12 @@
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* count). The timing of the Win32 FreeRTOS build is not real-time, since it
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* depends on the scheduling and tick rate of Windows, which is very slow.
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*
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* Officially supported hardware specific ports included are:
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* Officially supported hardware timer ports:
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* - PORT_Atmel_AT91SAM7
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* - PORT_Atmel_UC3A0
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* - PORT_ARM_CortexM
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* - PORT_Renesas_RX600
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* - PORT_Microchip_dsPIC_AND_PIC24
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*
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* We also provide several "unofficial" hardware-specific ports. There have
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* been developed by external contributors, and have not yet been verified
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@ -100,33 +102,41 @@
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* - PORT_TEXAS_INSTRUMENTS_TMS570
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* - PORT_TEXAS_INSTRUMENTS_MSP430
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* - PORT_MICROCHIP_PIC32
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* - PORT_MICROCHIP_dsPIC_AND_PIC24
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* - PORT_XILINX_PPC405
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* - PORT_XILINX_PPC440
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* - PORT_XILINX_MICROBLAZE
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* - PORT_NXP_LPC210X
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*
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******************************************************************************/
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*****************************************************************************/
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#define PORT_NOT_SET -1
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#define PORT_NOT_SET -1
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/* Officially supported ports */
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#define PORT_HWIndependent 0
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#define PORT_Win32 1
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#define PORT_Atmel_AT91SAM7 2
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#define PORT_ARM_CortexM 3
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#define PORT_Renesas_RX600 4
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/*** Officially supported hardware timer ports *******************************/
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#define PORT_HWIndependent 0
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#define PORT_Win32 1
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#define PORT_Atmel_AT91SAM7 2
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#define PORT_Atmel_UC3A0 3
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#define PORT_ARM_CortexM 4
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#define PORT_Renesas_RX600 5
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#define PORT_Microchip_dsPIC_AND_PIC24 6
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/* Unofficial ports, provided by external developers and not yet verified */
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#define PORT_TEXAS_INSTRUMENTS_TMS570 6
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#define PORT_TEXAS_INSTRUMENTS_MSP430 7
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#define PORT_MICROCHIP_PIC32 8
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#define PORT_MICROCHIP_dsPIC_AND_PIC24 9
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#define PORT_XILINX_PPC405 10
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#define PORT_XILINX_PPC440 11
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/*** Unofficial ports, provided by external developers, not yet verified *****/
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#define PORT_TEXAS_INSTRUMENTS_TMS570 7
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#define PORT_TEXAS_INSTRUMENTS_MSP430 8
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#define PORT_MICROCHIP_PIC32 9
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#define PORT_XILINX_PPC405 10
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#define PORT_XILINX_PPC440 11
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#define PORT_XILINX_MICROBLAZE 12
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#define PORT_NXP_LPC210X 13
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/*** Select your port here! **************************************************/
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#define SELECTED_PORT PORT_Win32
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/*****************************************************************************/
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#if (SELECTED_PORT == PORT_NOT_SET)
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#error "You need to define SELECTED_PORT here!"
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#endif
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/*******************************************************************************
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* IRQ_PRIORITY_ORDER
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*
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@ -141,25 +151,29 @@
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* the vTraceStoreISRBegin and vTraceStoreISREnd routines.
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*
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* We provide this setting for some hardware architectures below:
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* - ARM Cortex M: 0 (lower irq priority values are more significant)
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* - Atmel AT91SAM7x: 1 (higher irq priority values are more significant)
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* - Renesas RX62N: 1 (higher irq priority values are more significant)
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* - Microchip PIC24: 0 (lower irq priority values are more significant)
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* - Microchip dsPIC: 0 (lower irq priority values are more significant)
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* - TI TMS570 (ARM Cortex R4F): 0 (lower irq priority values are more significant)
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* - Freescale HCS08: 0 (lower irq priority values are more significant)
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* - Freescale HCS12: 0 (lower irq priority values are more significant)
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* - Freescale ColdFire: 1 (higher irq priority values are more significant)
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* - ARM Cortex M: 0 (lower irq priority values are more significant)
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* - Atmel AT91SAM7x: 1 (higher irq priority values are more significant)
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* - Atmel AVR32: 1 (higher irq priority values are more significant)
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* - Renesas RX600: 1 (higher irq priority values are more significant)
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* - Microchip PIC24: 0 (lower irq priority values are more significant)
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* - Microchip dsPIC: 0 (lower irq priority values are more significant)
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* - TI TMS570: 0 (lower irq priority values are more significant)
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* - Freescale HCS08: 0 (lower irq priority values are more significant)
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* - Freescale HCS12: 0 (lower irq priority values are more significant)
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* - PowerPC 405: 0 (lower irq priority values are more significant)
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* - PowerPC 440: 0 (lower irq priority values are more significant)
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* - Freescale ColdFire: 1 (higher irq priority values are more significant)
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* - NXP LPC210x: 0 (lower irq priority values are more significant)
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* - MicroBlaze: 0 (lower irq priority values are more significant)
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*
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* If your chip is not on the above list, and you perhaps know this detail by
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* heart, please inform us by e-mail to support@percepio.se.
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******************************************************************************/
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#define IRQ_PRIORITY_ORDER 0
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/*******************************************************************************
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* HWTC macros
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*
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* These four macros provides a hardware isolation layer, representing a
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* heart, please inform us by e-mail to support@percepio.com.
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*
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******************************************************************************
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*
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* HWTC Macros
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*
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* These four HWTC macros provides a hardware isolation layer representing a
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* generic hardware timer/counter used for driving the operating system tick,
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* such as the SysTick feature of ARM Cortex M3/M4, or the PIT of the Atmel
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* AT91SAM7X.
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@ -187,7 +201,7 @@
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* (where the SysTick runs at the core clock frequency), the "differential
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* timestamping" used in the recorder will more frequently insert extra XTS
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* events to store the timestamps, which increases the event buffer usage.
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* In such cases, to reduce the number of XTS events and thereby get a longer
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* In such cases, to reduce the number of XTS events and thereby get longer
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* traces, you use HWTC_DIVISOR to scale down the timestamps and frequency.
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* Assuming a OS tick rate of 1 KHz, it is suggested to keep the effective timer
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* frequency below 65 MHz to avoid an excessive amount of XTS events. Thus, a
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@ -198,49 +212,69 @@
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* or the trace recorder library. Typically you should not need to change
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* the code of uiTracePortGetTimeStamp if using the HWTC macros.
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*
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* OFFER FROM PERCEPIO:
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* FREE LICENSE OFFER FROM PERCEPIO
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*
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* For silicon companies and non-corporate FreeRTOS users (researchers, students,
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* hobbyists or early-phase startups) we have an attractive offer:
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* Provide a hardware timer port and get a FREE single-user licence for
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* FreeRTOS+Trace Professional Edition. Read more about this offer at
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* www.percepio.se or contact us directly at support@percepio.se.
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* hobbyists or early-phase startups) we have the following offer:
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* Provide a hardware port for our FreeRTOS recorder and get a FREE single-user
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* license for FreeRTOS+Trace Professional Edition. Read more about this offer
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* at www.percepio.com or contact us directly at support@percepio.com.
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*
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******************************************************************************/
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#if (SELECTED_PORT == PORT_Win32)
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (ulGetRunTimeCounterValue())
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#define HWTC_PERIOD 0
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
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#elif (SELECTED_PORT == PORT_HWIndependent)
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT 0
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#define HWTC_PERIOD 1
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
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#elif (SELECTED_PORT == PORT_Atmel_AT91SAM7)
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/* HWTC_PERIOD is hardcoded for AT91SAM7X256-EK Board (48 MHz)
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A more generic solution is to get the period from pxPIT->PITC_PIMR */
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A more generic solution is to get the period from pxPIT->PITC_PIMR */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)
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#define HWTC_PERIOD 2995
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant
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#elif (SELECTED_PORT == PORT_Atmel_UC3A0)
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/* For Atmel AVR32 (AT32UC3A) */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT sysreg_read(AVR32_COUNT)
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#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant
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#elif (SELECTED_PORT == PORT_ARM_CortexM)
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/* For all chips using ARM Cortex M cores */
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/* For all chips using ARM Cortex M cores */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT (*((uint32_t*)0xE000E018))
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#define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1)
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#define HWTC_DIVISOR 2
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_Renesas_RX600)
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#elif (SELECTED_PORT == PORT_Renesas_RX600)
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#include "iodefine.h"
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@ -249,7 +283,41 @@
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#define HWTC_PERIOD ((((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/8))
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#define HWTC_DIVISOR 1
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570) /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant
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#elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24)
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/* For Microchip PIC24 and dsPIC (16 bit) */
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/* Note: The trace library was originally designed for 32-bit MCUs, and is slower
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than intended on 16-bit MCUs. Storing an event on a PIC24 takes about 70 µs.
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In comparison, 32-bit MCUs are often 10-20 times faster. If recording overhead
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becomes a problem on PIC24, use the filters to exclude less interresting tasks
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or system calls. */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (TMR1)
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#define HWTC_PERIOD (PR1+1)
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_NXP_LPC210X)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* Tested with LPC2106, but should work with most LPC21XX chips.
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Assumption: prescaler is 1:1 (this setting is hardcoded in
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FreeRTOS port for LPC21XX) */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT *((uint32_t *)0xE0004008 )
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#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define RTIFRC0 *((uint32_t *)0xFFFFFC10)
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#define RTICOMP0 *((uint32_t *)0xFFFFFC50)
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@ -259,93 +327,103 @@
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#define HWTC_PERIOD (RTIUDCP0)
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#define HWTC_DIVISOR 1
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (TA0R)
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#define HWTC_PERIOD configCPU_CLOCKS_PER_TICK
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#define HWTC_DIVISOR 1
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#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant
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#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */
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#define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */
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#define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */
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#define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */
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#define HWTC_DIVISOR 1
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#elif (SELECTED_PORT == PORT_MICROCHIP_dsPIC_AND_PIC24)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
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#define HWTC_COUNT (PR1)
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#define HWTC_PERIOD ((configCPU_CLOCK_HZ/portTIMER_PRESCALE)/configTICK_RATE_HZ)
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_PPC405)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT mfspr( 0x3db)
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#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#define HWTC_DIVISOR 1
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_PPC440)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* This should work with most PowerPC chips */
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/* This should work with most PowerPC chips */
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT mfspr( 0x016 )
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#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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#define HWTC_DIVISOR 1
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#else
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SELECTED_PORT is not set, or had unsupported value!
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(This is to intentionally cause a compiler error.)
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#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
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#elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE)
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/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
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/* This should work with most Microblaze configurations
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* This port is based on the official FreeRTOS Microlaze port and example application.
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* It uses the AXI Timer 0 - the tick interrupt source.
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* If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.
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*/
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#include "xtmrctr_l.h"
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#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
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#define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )
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#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )
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||||
#define HWTC_DIVISOR 16
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT != PORT_NOT_SET)
|
||||
|
||||
#error "SELECTED_PORT had unsupported value!"
|
||||
#define SELECTED_PORT PORT_NOT_SET
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_COUNT_DIRECTION
|
||||
HWTC_COUNT_DIRECTION is not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
#if (SELECTED_PORT != PORT_NOT_SET)
|
||||
|
||||
#ifndef HWTC_COUNT_DIRECTION
|
||||
#error "HWTC_COUNT_DIRECTION is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_COUNT
|
||||
#error "HWTC_COUNT is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_PERIOD
|
||||
#error "HWTC_PERIOD is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_DIVISOR
|
||||
#error "HWTC_DIVISOR is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef IRQ_PRIORITY_ORDER
|
||||
#error "IRQ_PRIORITY_ORDER is not set!"
|
||||
#elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)
|
||||
#error "IRQ_PRIORITY_ORDER has bad value!"
|
||||
#endif
|
||||
|
||||
#if (HWTC_DIVISOR < 1)
|
||||
#error "HWTC_DIVISOR must be a non-zero positive value!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_COUNT
|
||||
HWTC_COUNT is not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_PERIOD
|
||||
HWTC_PERIOD is not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_DIVISOR
|
||||
HWTC_DIVISOR is not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#ifndef IRQ_PRIORITY_ORDER
|
||||
IRQ_PRIORITY_ORDER is not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#if (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)
|
||||
IRQ_PRIORITY_ORDER has bad value!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#if (HWTC_DIVISOR < 1)
|
||||
HWTC_DIVISOR must be a non-zero positive value!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
#if ((IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1))
|
||||
IRQ_PRIORITY_ORDER not set!
|
||||
(This is to intentionally cause a compiler error.)
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* vTraceConsoleMessage
|
||||
*
|
||||
|
|
@ -353,7 +431,12 @@ IRQ_PRIORITY_ORDER not set!
|
|||
* This needs to be correctly defined to see status reports from the trace
|
||||
* status monitor task (this is defined in trcUser.c).
|
||||
******************************************************************************/
|
||||
#define vTraceConsoleMessage printf
|
||||
#if (SELECTED_PORT == PORT_Atmel_AT91SAM7)
|
||||
/* Port specific includes */
|
||||
#include "console.h"
|
||||
#endif
|
||||
|
||||
#define vTraceConsoleMessage(x)
|
||||
|
||||
/*******************************************************************************
|
||||
* uiTracePortGetTimeStamp
|
||||
|
|
@ -370,19 +453,9 @@ IRQ_PRIORITY_ORDER not set!
|
|||
* students, hobbyists or early-phase startups) we have an attractive offer:
|
||||
* Provide a hardware timer port and get a FREE single-user licence for
|
||||
* FreeRTOS+Trace Professional Edition. Read more about this offer at
|
||||
* www.percepio.se or contact us directly at support@percepio.se.
|
||||
* www.percepio.com or contact us directly at support@percepio.com.
|
||||
******************************************************************************/
|
||||
uint32_t uiTracePortGetTimeStamp(void);
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortSetFrequency
|
||||
*
|
||||
* Registers the frequency of the timer used. This is normally calculated
|
||||
* automatically from the HWTC macros, but the Win32 port requires a special
|
||||
* solution where the frequency can be set independently of the HWTC macros.
|
||||
* This is called from main in the Win32 demo program.
|
||||
******************************************************************************/
|
||||
void vTracePortSetFrequency(uint32_t freq);
|
||||
void uiTracePortGetTimeStamp(uint32_t *puiTimestamp);
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortEnd
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue