mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-04 13:23:50 -04:00
Update the RX MDK demo to include the web server. Minor tidy up to the RDK version too.
This commit is contained in:
Richard Barry
parent
2fca46e3e4
commit
23ca0009e3
37 changed files with 6883 additions and 391 deletions
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@ -27,12 +27,12 @@
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******************************************************************************
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* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
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*******************************************************************************
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* File Name : hwsetup.c
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* Version : 1.00
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* File Name : hwsetup.c
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* Version : 1.00
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* Description : Power up hardware initializations
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******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 15.02.2010 1.00 First Release
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* : 15.02.2010 1.00 First Release
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******************************************************************************/
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@ -41,8 +41,7 @@ Includes <System Includes> , "Project Includes"
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******************************************************************************/
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#include <stdint.h>
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#include "iodefine.h"
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#include "rskrx62ndef.h"
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// #include "lcd.h" Uncomment this if an LCD is present.
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#include "r_ether.h"
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/******************************************************************************
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Typedef definitions
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@ -63,54 +62,168 @@ Exported global variables and functions (to be accessed by other files)
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/******************************************************************************
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Private global variables and functions
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******************************************************************************/
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void io_set_cpg(void);
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void ConfigurePortPins(void);
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void EnablePeripheralModules(void);
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/******************************************************************************
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* Function Name: HardwareSetup
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* Description : This function does initial setting for CPG port pins used in
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* : the Demo including the MII pins of the Ethernet PHY connection.
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* Arguments : none
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* : the Demo including the MII pins of the Ethernet PHY connection.
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void HardwareSetup(void)
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{
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/* CPG setting */
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io_set_cpg();
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uint32_t sckcr = 0;
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/* Setup the port pins */
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ConfigurePortPins();
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/* Configure system clocks based on header */
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sckcr += (ICLK_MUL==8) ? (0ul << 24) : (ICLK_MUL==4) ? (1ul << 24) : (ICLK_MUL==2) ? (2ul << 24) : (3ul << 24);
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sckcr += (BCLK_MUL==8) ? (0ul << 16) : (BCLK_MUL==4) ? (1ul << 16) : (BCLK_MUL==2) ? (2ul << 16) : (3ul << 16);
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sckcr += (PCLK_MUL==8) ? (0ul << 8) : (PCLK_MUL==4) ? (1ul << 8) : (PCLK_MUL==2) ? (2ul << 8) : (3ul << 8);
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SYSTEM.SCKCR.LONG = sckcr;
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/* Enables peripherals */
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EnablePeripheralModules();
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#if INCLUDE_LCD == 1
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/* Initialize display */
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InitialiseDisplay();
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#endif
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}
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/******************************************************************************
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* Function Name: EnablePeripheralModules
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* Description : Enables Peripheral Modules before use
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void EnablePeripheralModules(void)
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{
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/* Module standby clear */
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SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
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SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
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}
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/******************************************************************************
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* Function Name: ConfigurePortPins
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* Description : Configures port pins.
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void ConfigurePortPins(void)
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{
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/* Port pins default to inputs. To ensure safe initialisation set the pin states
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before changing the data direction registers. This will avoid any unintentional
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state changes on the external ports.
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Many peripheral modules will override the setting of the port registers. Ensure
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that the state is safe for external devices if the internal peripheral module is
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disabled or powered down. */
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/* ==== MII/RMII Pins setting ==== */
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/*--------------------------------------*/
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/* Port Function Control Register */
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/*--------------------------------------*/
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#if ETH_MODE_SEL == ETH_MII_MODE
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/* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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IOPORT.PFENET.BYTE = 0x9A;
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#endif /* ETH_MODE_SEL */
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#if ETH_MODE_SEL == ETH_RMII_MODE
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/* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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IOPORT.PFENET.BYTE = 0x82;
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#endif /* ETH_MODE_SEL */
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/*-------------------------------------------*/
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/* Input Buffer Control Register (ICR) */
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/*-------------------------------------------*/
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#if ETH_MODE_SEL == ETH_MII_MODE
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/* P54=1 Set ET_LINKSTA input */
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PORT5.ICR.BIT.B4 = 1;
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/* P71=1 Set ET_MDIO input */
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PORT7.ICR.BIT.B1 = 1;
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/* P74=1 Set ET_ERXD1 input */
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PORT7.ICR.BIT.B4 = 1;
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/* P75=1 Set ET_ERXD0 input */
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PORT7.ICR.BIT.B5 = 1;
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/* P76=1 Set ET_RX_CLK input */
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PORT7.ICR.BIT.B6 = 1;
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/* P77=1 Set ET_RX_ER input */
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PORT7.ICR.BIT.B7 = 1;
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/* P83=1 Set ET_CRS input */
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PORT8.ICR.BIT.B3 = 1;
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/* PC0=1 Set ET_ERXD3 input */
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PORTC.ICR.BIT.B0 = 1;
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/* PC1=1 Set ET_ERXD2 input */
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PORTC.ICR.BIT.B1 = 1;
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/* PC2=1 Set ET_RX_DV input */
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PORTC.ICR.BIT.B2 = 1;
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/* PC4=1 Set EX_TX_CLK input */
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PORTC.ICR.BIT.B4 = 1;
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/* PC7=1 Set ET_COL input */
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PORTC.ICR.BIT.B7 = 1;
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#endif /* ETH_MODE_SEL */
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#if ETH_MODE_SEL == ETH_RMII_MODE
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/* P54=1 Set ET_LINKSTA input */
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PORT5.ICR.BIT.B4 = 1;
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/* P71=1 Set ET_MDIO input */
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PORT7.ICR.BIT.B1 = 1;
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/* P74=1 Set RMII_RXD1 input */
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PORT7.ICR.BIT.B4 = 1;
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/* P75=1 Set RMII_RXD0 input */
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PORT7.ICR.BIT.B5 = 1;
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/* P76=1 Set REF50CLK input */
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PORT7.ICR.BIT.B6 = 1;
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/* P77=1 Set RMII_RX_ER input */
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PORT7.ICR.BIT.B7 = 1;
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/* P83=1 Set RMII_CRS_DV input */
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PORT8.ICR.BIT.B3 = 1;
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#endif /* ETH_MODE_SEL */
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/* Configure LED 0-5 pin settings */
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PORT0.DR.BIT.B2 = 1;
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PORT0.DR.BIT.B3 = 1;
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PORT0.DR.BIT.B5 = 1;
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PORT3.DR.BIT.B4 = 1;
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PORT6.DR.BIT.B0 = 1;
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PORT7.DR.BIT.B3 = 1;
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PORT0.DDR.BIT.B2 = 1;
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PORT0.DDR.BIT.B3 = 1;
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PORT0.DDR.BIT.B5 = 1;
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PORT3.DDR.BIT.B4 = 1;
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PORT6.DDR.BIT.B0 = 1;
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PORT7.DDR.BIT.B3 = 1;
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/* Configure SW 1-3 pin settings */
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PORT0.DDR.BIT.B0 = 0;
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PORT0.DDR.BIT.B1 = 0;
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PORT0.DDR.BIT.B7 = 0;
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PORT0.ICR.BIT.B0 = 1;
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PORT0.ICR.BIT.B1 = 1;
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PORT0.ICR.BIT.B7 = 1;
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#if INCLUDE_LCD == 1
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/* Set LCD pins as outputs */
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/* LCD-RS */
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PORT8.DDR.BIT.B4 = 1;
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/* LCD-EN */
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PORT8.DDR.BIT.B5 = 1;
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/*LCD-data */
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PORT9.DDR.BYTE = 0xF0;
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#endif
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}
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/******************************************************************************
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* Function Name: io_set_cpg
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* Description : Sets up operating speed
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void io_set_cpg(void)
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{
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/* Set CPU PLL operating frequencies. Changes to the peripheral clock will require
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changes to the debugger and flash kernel BRR settings. */
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/* ==== CPG setting ==== */
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SYSTEM.SCKCR.LONG = 0x00020100; /* Clockin = 12MHz */
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/* I Clock = 96MHz, B Clock = 24MHz, */
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/* P Clock = 48MHz */
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/* Configure LED 0-5 pins as outputs */
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LED0 = LED_OFF;
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LED1 = LED_OFF;
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LED2 = LED_OFF;
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LED3 = LED_OFF;
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LED4 = LED_OFF;
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LED5 = LED_OFF;
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LED0_DDR = 1;
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LED1_DDR = 1;
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LED2_DDR = 1;
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LED3_DDR = 1;
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LED4_DDR = 1;
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LED5_DDR = 1;
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/* Configure SW 1-3 pins as inputs */
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SW1_DDR = 0;
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SW2_DDR = 0;
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SW3_DDR = 0;
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SW1_ICR = 1;
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SW2_ICR = 1;
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SW3_ICR = 1;
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/* Configure LCD pins as outputs - uncomment this if an LCD is present.
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LCD_RS_DDR = 1;
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LCD_EN_DDR = 1;
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LCD_DATA_DDR = 0xF0; */
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/* Initialize display - uncomment this if an LCD is present.
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InitialiseDisplay(); */
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}
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@ -91,7 +91,7 @@ void PowerON_Reset_PC(void)
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_INITSCT();
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_INIT_IOLIB(); // Use SIM I/O
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// _INIT_IOLIB(); // Use SIM I/O
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// errno=0; // Remove the comment when you use errno
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// srand((_UINT)1); // Remove the comment when you use rand()
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@ -108,7 +108,7 @@ void PowerON_Reset_PC(void)
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main();
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_CLOSEALL(); // Use SIM I/O
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// _CLOSEALL(); // Use SIM I/O
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// _CALL_END(); // Remove the comment when you use global class object
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