mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-20 10:08:33 -04:00
Re-sync with upstream and stripping away none kernel related.
This commit is contained in:
parent
9c0c37ab9b
commit
210b1ffcc8
13732 changed files with 49 additions and 7054697 deletions
197
portable/GCC/STR75x/port.c
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197
portable/GCC/STR75x/port.c
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/*
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* FreeRTOS Kernel V10.3.0
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ST STR75x ARM7
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* port.
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*----------------------------------------------------------*/
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/* Library includes. */
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#include "75x_tb.h"
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#include "75x_eic.h"
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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/* Prescale used on the timer clock when calculating the tick period. */
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#define portPRESCALE 20
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/*-----------------------------------------------------------*/
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/* Setup the TB to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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StackType_t *pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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/* To ensure asserts in tasks.c don't fail, although in this case the assert
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is not really required. */
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pxTopOfStack--;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The status register is set for system mode, with interrupts enabled. */
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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#ifdef THUMB_INTERWORK
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{
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/* We want the task to start in thumb mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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#endif
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pxTopOfStack--;
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/* Interrupt flags cannot always be stored on the stack and will
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instead be stored in a variable, which is then saved as part of the
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tasks context. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void vPortISRStartFirstTask( void );
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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vPortISRStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the ARM port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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EIC_IRQInitTypeDef EIC_IRQInitStructure;
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TB_InitTypeDef TB_InitStructure;
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/* Setup the EIC for the TB. */
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EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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EIC_IRQInit(&EIC_IRQInitStructure);
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/* Setup the TB for the generation of the tick interrupt. */
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TB_InitStructure.TB_Mode = TB_Mode_Timing;
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TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
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TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
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TB_Init(&TB_InitStructure);
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/* Enable TB Update interrupt */
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TB_ITConfig(TB_IT_Update, ENABLE);
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/* Clear TB Update interrupt pending bit */
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TB_ClearITPendingBit(TB_IT_Update);
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/* Enable TB */
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TB_Cmd(ENABLE);
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}
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/*-----------------------------------------------------------*/
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182
portable/GCC/STR75x/portISR.c
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182
portable/GCC/STR75x/portISR.c
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@ -0,0 +1,182 @@
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/*
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* FreeRTOS Kernel V10.3.0
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Components that can be compiled to either ARM or THUMB mode are
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* contained in port.c The ISR routines, which can only be compiled
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* to ARM mode, are contained in this file.
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*----------------------------------------------------------*/
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/*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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volatile uint32_t ulCriticalNesting = 9999UL;
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/*-----------------------------------------------------------*/
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/*
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* The scheduler can only be started from ARM mode, hence the inclusion of this
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* function here.
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*/
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void vPortISRStartFirstTask( void );
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/*-----------------------------------------------------------*/
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void vPortISRStartFirstTask( void )
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{
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/* Simply start the scheduler. This is included here as it can only be
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called from ARM mode. */
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asm volatile ( \
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"LDR R0, =pxCurrentTCB \n\t" \
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"LDR R0, [R0] \n\t" \
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"LDR LR, [R0] \n\t" \
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\
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/* The critical nesting depth is the first item on the stack. */ \
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/* Load it into the ulCriticalNesting variable. */ \
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"LDR R0, =ulCriticalNesting \n\t" \
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"LDMFD LR!, {R1} \n\t" \
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"STR R1, [R0] \n\t" \
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\
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/* Get the SPSR from the stack. */ \
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"LDMFD LR!, {R0} \n\t" \
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"MSR SPSR, R0 \n\t" \
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\
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/* Restore all system mode registers for the task. */ \
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"LDMFD LR, {R0-R14}^ \n\t" \
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"NOP \n\t" \
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\
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/* Restore the return address. */ \
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"LDR LR, [LR, #+60] \n\t" \
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\
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/* And return - correcting the offset in the LR to obtain the */ \
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/* correct address. */ \
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"SUBS PC, LR, #4 \n\t" \
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);
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}
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/*-----------------------------------------------------------*/
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void vPortTickISR( void )
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{
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/* Increment the RTOS tick count, then look for the highest priority
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task that is ready to run. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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/* Ready for the next interrupt. */
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TB_ClearITPendingBit( TB_IT_Update );
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}
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/*-----------------------------------------------------------*/
|
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/*
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* The interrupt management utilities can only be called from ARM mode. When
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* THUMB_INTERWORK is defined the utilities are defined as functions here to
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* ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then
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* the utilities are defined as macros in portmacro.h - as per other ports.
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*/
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#ifdef THUMB_INTERWORK
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void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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|
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void vPortDisableInterruptsFromThumb( void )
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{
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
|
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"MRS R0, CPSR \n\t" /* Get CPSR. */
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"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
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"LDMIA SP!, {R0} \n\t" /* Pop R0. */
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"BX R14" ); /* Return back to thumb. */
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}
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void vPortEnableInterruptsFromThumb( void )
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{
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asm volatile (
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"STMDB SP!, {R0} \n\t" /* Push R0. */
|
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"MRS R0, CPSR \n\t" /* Get CPSR. */
|
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"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
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"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
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"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
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"BX R14" ); /* Return back to thumb. */
|
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}
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
141
portable/GCC/STR75x/portmacro.h
Normal file
141
portable/GCC/STR75x/portmacro.h
Normal file
|
@ -0,0 +1,141 @@
|
|||
/*
|
||||
* FreeRTOS Kernel V10.3.0
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm volatile ( "SWI 0" )
|
||||
#define portNOP() asm volatile ( "NOP" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
/*
|
||||
* The interrupt management utilities can only be called from ARM mode. When
|
||||
* THUMB_INTERWORK is defined the utilities are defined as functions in
|
||||
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
|
||||
* defined then the utilities are defined as macros here - as per other ports.
|
||||
*/
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
|
||||
extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
|
||||
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
|
||||
|
||||
#else
|
||||
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern void vTaskSwitchContext( void ); \
|
||||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
Loading…
Add table
Add a link
Reference in a new issue