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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Update XMOS xcore.ai port to be compatible with v11.x (#1096)
* Fix kexcept function * Create dummy pxCurrentTCBs for xcore.ai port * Additional commentary * Add a layer of indirection to cope with singlecore * Clarify use of _DoException
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35
portable/ThirdParty/xClang/XCOREAI/port.c
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35
portable/ThirdParty/xClang/XCOREAI/port.c
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@ -12,6 +12,15 @@ static hwtimer_t xKernelTimer;
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uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
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uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
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/* When this port was designed, it was assumed that pxCurrentTCBs would always
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exist and that it would always be an array containing pointers to the current
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TCBs for each core. In v11, this is not the case; if we are only running one
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core, the symbol is pxCurrentTCB instead. Therefore, this port adds a layer
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of indirection - we populate this pointer-to-pointer in the RTOS kernel entry
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function below. This makes this port agnostic to whether it is running on SMP
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or singlecore RTOS. */
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void ** xcorePvtTCBContainer;
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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void vIntercoreInterruptISR( void )
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void vIntercoreInterruptISR( void )
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@ -140,6 +149,28 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
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}
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}
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#endif
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#endif
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/* Populate the TCBContainer depending on whether we're singlecore or SMP */
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#if ( configNUMBER_OF_CORES == 1 )
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{
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asm volatile (
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"ldaw %0, dp[pxCurrentTCB]\n\t"
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: "=r"(xcorePvtTCBContainer)
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: /* no inputs */
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: /* no clobbers */
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);
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}
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#else
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{
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asm volatile (
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"ldaw %0, dp[pxCurrentTCBs]\n\t"
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: "=r"(xcorePvtTCBContainer)
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: /* no inputs */
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: /* no clobbers */
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);
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}
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#endif
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debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
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debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
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/*
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/*
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@ -147,8 +178,8 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
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* to run and jump into it.
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* to run and jump into it.
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*/
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*/
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asm volatile (
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asm volatile (
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"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
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"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID. In singlecore this is always 0. */
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"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
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"ldw r5, dp[xcorePvtTCBContainer]\n\t" /* R5 must be the TCB list which is indexed by R6 */
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"bu _freertos_restore_ctx\n\t"
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"bu _freertos_restore_ctx\n\t"
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: /* no outputs */
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: /* no outputs */
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: "r" ( xCoreID )
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: "r" ( xCoreID )
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9
portable/ThirdParty/xClang/XCOREAI/portasm.S
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9
portable/ThirdParty/xClang/XCOREAI/portasm.S
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@ -14,11 +14,8 @@ rest of the ISR callback functions. */
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.issue_mode dual
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.issue_mode dual
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.cc_top kexcept.function, kexcept
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.cc_top kexcept.function, kexcept
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kexcept:
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kexcept:
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ldc r11, 0x0008
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bu _DoException /* This symbol is generated by the toolchain and */
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shl r11, r11, 16
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/* provides graceful exception handling */
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ldc r9, 0x0080
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or r11, r11, r9
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bau r11 //_TrapHandler is at 0x00080080. TODO: Is it always? Why can't I access the symbol _TrapHandler?
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_yield:
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_yield:
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{set sp, r4 /* Restore the task's SP to save the rest of its context. */
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{set sp, r4 /* Restore the task's SP to save the rest of its context. */
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@ -123,7 +120,7 @@ _yield_continue:
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ldaw r11, sp[37]}
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ldaw r11, sp[37]}
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vstc r11[0]
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vstc r11[0]
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#endif
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#endif
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ldaw r5, dp[pxCurrentTCBs] /* Get the current TCB array into r5. */
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ldw r5, dp[xcorePvtTCBContainer]
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ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
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ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
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stw r4, r1[0x0] /* Save the current task's SP to the first */
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stw r4, r1[0x0] /* Save the current task's SP to the first */
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/* word (top of stack) in the current TCB. */
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/* word (top of stack) in the current TCB. */
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