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Add new demo files.
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Richard Barry
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209
Demo/CORTEX_AT91SAM3U256_IAR/system/board_lowlevel.c
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209
Demo/CORTEX_AT91SAM3U256_IAR/system/board_lowlevel.c
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2008, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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//------------------------------------------------------------------------------
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/// \unit
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///
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/// !Purpose
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///
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/// Provides the low-level initialization function that gets called on chip
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/// startup.
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///
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/// !Usage
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///
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/// LowLevelInit() is called in #board_cstartup_xxx.c#.
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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#include "board.h"
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#include "board_memories.h"
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#include "board_lowlevel.h"
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#include <pio/pio.h>
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//------------------------------------------------------------------------------
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// Local definitions
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//------------------------------------------------------------------------------
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// Settings at 48/48MHz
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#define AT91C_CKGR_MUL_SHIFT 16
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#define AT91C_CKGR_OUT_SHIFT 14
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#define AT91C_CKGR_PLLCOUNT_SHIFT 8
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#define AT91C_CKGR_DIV_SHIFT 0
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#define BOARD_OSCOUNT (AT91C_CKGR_MOSCXTST & (0x3F << 8))
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#define BOARD_PLLR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \
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| (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \
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| (0x1 << AT91C_CKGR_DIV_SHIFT))
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#define BOARD_MCKR ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK)
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// Define clock timeout
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#define CLOCK_TIMEOUT 0xFFFFFFFF
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#define AT91C_SUPC_SR_OSCSEL_CRYST 0x80UL
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#define AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL 0x08UL
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void SetDefaultMaster(unsigned char enable);
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//------------------------------------------------------------------------------
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// Local variables
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Local functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Exported functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// After POR, at91sam3u device is running on 4MHz internal RC
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/// At the end of the LowLevelInit procedure MCK = 48MHz PLLA = 96 CPU=48MHz
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/// Performs the low-level initialization of the chip. This includes EFC, master
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/// clock, IRQ & watchdog configuration.
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//------------------------------------------------------------------------------
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void LowLevelInit(void)
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{
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unsigned int timeout = 0;
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/* Set 2 WS for Embedded Flash Access
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************************************/
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AT91C_BASE_EFC0->EFC_FMR = AT91C_EFC_FWS_2WS;
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AT91C_BASE_EFC1->EFC_FMR = AT91C_EFC_FWS_2WS;
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/* Watchdog initialization
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*************************/
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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/* Select external slow clock
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****************************/
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if ((AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) != AT91C_SUPC_SR_OSCSEL_CRYST) {
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AT91C_BASE_SUPC->SUPC_CR = AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL | (0xA5UL << 24UL);
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timeout = 0;
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while (!(AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) && (timeout++ < CLOCK_TIMEOUT));
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}
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/* Initialize main oscillator
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****************************/
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if(!(AT91C_BASE_PMC->PMC_MOR & AT91C_CKGR_MOSCSEL))
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{
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AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT));
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}
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// AT91C_BASE_PIOB->PIO_CODR = 1 << 1;
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// AT91C_BASE_PIOB->PIO_OER = 1 << 1;
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// AT91C_BASE_PIOB->PIO_PER = 1 << 1;
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/* Switch to moscsel */
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AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN | AT91C_CKGR_MOSCSEL;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
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AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
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/* Initialize PLLA */
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AT91C_BASE_PMC->PMC_PLLAR = BOARD_PLLR;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
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/* Initialize UTMI for USB usage */
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AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_UPLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) && (timeout++ < CLOCK_TIMEOUT));
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/* Switch to fast clock
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**********************/
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AT91C_BASE_PMC->PMC_MCKR = (BOARD_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
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AT91C_BASE_PMC->PMC_MCKR = BOARD_MCKR;
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timeout = 0;
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while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
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/* Enable clock for UART
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************************/
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU);
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/* Optimize CPU setting for speed */
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SetDefaultMaster(1);
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}
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//------------------------------------------------------------------------------
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/// Enable or disable default master access
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/// \param enalbe 1 enable defaultMaster settings, 0 disable it.
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//------------------------------------------------------------------------------
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void SetDefaultMaster(unsigned char enable)
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{
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AT91PS_HMATRIX2 pMatrix = AT91C_BASE_MATRIX;
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// Set default master
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if (enable == 1) {
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// Set default master: SRAM0 -> Cortex-M3 System
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pMatrix->HMATRIX2_SCFG0 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS |
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AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
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// Set default master: SRAM1 -> Cortex-M3 System
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pMatrix->HMATRIX2_SCFG1 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS |
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AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
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// Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
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pMatrix->HMATRIX2_SCFG3 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC |
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AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
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} else {
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// Clear default master: SRAM0 -> Cortex-M3 System
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pMatrix->HMATRIX2_SCFG0 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
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// Clear default master: SRAM1 -> Cortex-M3 System
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pMatrix->HMATRIX2_SCFG1 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
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// Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
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pMatrix->HMATRIX2_SCFG3 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
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}
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}
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//------------------------------------------------------------------------------
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/// Set flash wait state
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/// \param ws Value of flash wait state
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//------------------------------------------------------------------------------
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void SetFlashWaitState(unsigned char ws)
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{
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// Set Wait State for Embedded Flash Access
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AT91C_BASE_EFC0->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
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AT91C_BASE_EFC1->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
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}
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