mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Revert Portable/Renesas formatting (#876)
* Revert the formatting on Renesas ports
This commit is contained in:
parent
a2a4485ed3
commit
147f34ab5f
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@ -46,11 +46,11 @@
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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* PSW is set with U and I set, and PM and IPL clear. */
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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/* The peripheral clock is divided by this value before being supplying the
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* CMT. */
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CMT. */
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#if ( configUSE_TICKLESS_IDLE == 0 )
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/* If tickless idle is not used then the divisor can be fixed. */
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#define portCLOCK_DIVISOR 8UL
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@ -66,15 +66,15 @@
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/* Keys required to lock and unlock access to certain system registers
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* respectively. */
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respectively. */
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#define portUNLOCK_KEY 0xA50B
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#define portLOCK_KEY 0xA500
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/*-----------------------------------------------------------*/
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/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
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* and therefore installed in the vector table, when the FreeRTOS code is built
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* as a library. */
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and therefore installed in the vector table, when the FreeRTOS code is built
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as a library. */
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extern BaseType_t vSoftwareInterruptEntry;
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const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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@ -109,9 +109,8 @@ void vSoftwareInterruptISR( void );
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*/
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static void prvSetupTimerInterrupt( void );
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#ifndef configSETUP_TICK_INTERRUPT
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/* The user has not provided their own tick interrupt configuration so use
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* the definition in this file (which uses the interval timer). */
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the definition in this file (which uses the interval timer). */
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#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
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#endif /* configSETUP_TICK_INTERRUPT */
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@ -138,34 +137,32 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / p
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#if configUSE_TICKLESS_IDLE == 1
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/* Holds the maximum number of ticks that can be suppressed - which is
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* basically how far into the future an interrupt can be generated. Set
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* during initialisation. This is the maximum possible value that the
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* compare match register can hold divided by ulMatchValueForOneTick. */
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basically how far into the future an interrupt can be generated. Set
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during initialisation. This is the maximum possible value that the
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compare match register can hold divided by ulMatchValueForOneTick. */
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static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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/* Flag set from the tick interrupt to allow the sleep processing to know if
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* sleep mode was exited because of a tick interrupt, or an interrupt
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* generated by something else. */
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sleep mode was exited because of a tick interrupt, or an interrupt
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generated by something else. */
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static volatile uint32_t ulTickFlag = pdFALSE;
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/* The CMT counter is stopped temporarily each time it is re-programmed.
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* The following constant offsets the CMT counter match value by the number of
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* CMT counts that would typically be missed while the counter was stopped to
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* compensate for the lost time. The large difference between the divided CMT
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* clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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* equal zero - and be optimised away. */
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The following constant offsets the CMT counter match value by the number of
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CMT counts that would typically be missed while the counter was stopped to
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compensate for the lost time. The large difference between the divided CMT
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clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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equal zero - and be optimised away. */
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static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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#endif /* if configUSE_TICKLESS_IDLE == 1 */
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#endif
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Offset to end up on 8 byte boundary. */
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pxTopOfStack--;
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@ -180,8 +177,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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*pxTopOfStack = ( StackType_t ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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* value. Otherwise code space can be saved by just setting the registers
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* that need to be set. */
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value. Otherwise code space can be saved by just setting the registers
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that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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@ -214,13 +211,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
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#else
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{
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/* Leave space for the registers that will get popped from the stack
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* when the task first starts executing. */
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when the task first starts executing. */
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pxTopOfStack -= 15;
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}
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#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
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#endif
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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pxTopOfStack--;
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@ -238,10 +235,10 @@ BaseType_t xPortStartScheduler( void )
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate
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* the tick interrupt. This way the application can decide which
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* peripheral to use. If tickless mode is used then the default
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* implementation defined in this file (which uses CMT0) should not be
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* overridden. */
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the tick interrupt. This way the application can decide which
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peripheral to use. If tickless mode is used then the default
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implementation defined in this file (which uses CMT0) should not be
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overridden. */
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configSETUP_TICK_INTERRUPT();
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/* Enable the software interrupt. */
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@ -258,11 +255,11 @@ BaseType_t xPortStartScheduler( void )
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}
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/* Execution should not reach here as the tasks are now running!
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* prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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* a warning about a statically declared function not being referenced in the
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* case that the application writer has provided their own tick interrupt
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* configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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* their own routine will be called in place of prvSetupTimerInterrupt()). */
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prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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a warning about a statically declared function not being referenced in the
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case that the application writer has provided their own tick interrupt
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configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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their own routine will be called in place of prvSetupTimerInterrupt()). */
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prvSetupTimerInterrupt();
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/* Just to make sure the function is not optimised away. */
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@ -277,18 +274,18 @@ BaseType_t xPortStartScheduler( void )
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static void prvStartFirstTask( void )
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{
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/* When starting the scheduler there is nothing that needs moving to the
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* interrupt stack because the function is not called from an interrupt.
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* Just ensure the current stack is the user stack. */
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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SETPSW U
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/* Obtain the location of the stack associated with which ever task
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* pxCurrentTCB is currently pointing to. */
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pxCurrentTCB is currently pointing to. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [R15], R15
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MOV.L [R15], R0
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/* Restore the registers from the stack of the task pointed to by
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* pxCurrentTCB. */
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pxCurrentTCB. */
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POP R15
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MVTACLO R15 /* Accumulator low 32 bits. */
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POP R15
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@ -304,7 +301,7 @@ static void prvStartFirstTask( void )
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void prvTickISR( void )
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{
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/* Increment the tick, and perform any processing the new tick value
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* necessitates. */
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necessitates. */
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set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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{
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if( xTaskIncrementTick() != pdFALSE )
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@ -312,7 +309,6 @@ void prvTickISR( void )
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taskYIELD();
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}
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}
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set_ipl( configKERNEL_INTERRUPT_PRIORITY );
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#if configUSE_TICKLESS_IDLE == 1
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@ -321,7 +317,7 @@ void prvTickISR( void )
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ulTickFlag = pdTRUE;
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/* If this is the first tick since exiting tickless mode then the CMT
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* compare match value needs resetting. */
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compare match value needs resetting. */
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CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
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}
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#endif
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@ -341,9 +337,9 @@ static void prvYieldHandler( void )
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SETPSW I
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/* Move the data that was automatically pushed onto the interrupt stack
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* when the interrupt occurred from the interrupt stack to the user stack.
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*
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* R15 is saved before it is clobbered. */
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when the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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PUSH.L R15
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/* Read the user stack pointer. */
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@ -354,13 +350,9 @@ static void prvYieldHandler( void )
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MVTC R15, USP
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/* Copy the data across. */
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MOV.L[ R0 ], [ R15 ];
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R15
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MOV.L 4[ R0 ], 4[ R15 ];
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PC
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MOV.L 8[ R0 ], 8[ R15 ];
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PSW
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MOV.L [ R0 ], [ R15 ] ; R15
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MOV.L 4[ R0 ], 4[ R15 ] ; PC
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MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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/* Move the interrupt stack pointer to its new correct position. */
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ADD #12, R0
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@ -374,10 +366,8 @@ static void prvYieldHandler( void )
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/* Save the accumulator. */
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15;
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Middle order word.
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SHLL # 16, R15;
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Shifted left as it is restored to the low order word.
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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MOV.L R0, [ R15 ]
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/* Ensure the interrupt mask is set to the syscall priority while the
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* kernel structures are being accessed. */
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kernel structures are being accessed. */
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MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask as no more data structure access is
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* required. */
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required. */
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MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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/* Load the stack pointer of the task that is now selected as the Running
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* state task from its TCB. */
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state task from its TCB. */
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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/* Restore the context of the new task. The PSW (Program Status Word) and
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* PC will be popped by the RTE instruction. */
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PC will be popped by the RTE instruction. */
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POP R15
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MVTACLO R15
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POP R15
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@ -418,7 +408,7 @@ static void prvYieldHandler( void )
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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* Artificially force an assert. */
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Artificially force an assert. */
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configASSERT( pxCurrentTCB == NULL );
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/* The following line is just to prevent the symbol getting optimised away. */
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@ -460,11 +450,11 @@ static void prvSetupTimerInterrupt( void )
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{
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CMT0.CMCR.BIT.CKS = 0;
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}
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#else /* if portCLOCK_DIVISOR == 512 */
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#else
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{
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#error Invalid portCLOCK_DIVISOR setting
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}
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#endif /* if portCLOCK_DIVISOR == 512 */
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#endif
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/* Enable the interrupt... */
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@ -486,8 +476,8 @@ static void prvSetupTimerInterrupt( void )
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configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
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/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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* means the application defined code has already executed the WAIT
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* instruction. */
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means the application defined code has already executed the WAIT
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instruction. */
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if( xExpectedIdleTime > 0 )
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{
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wait();
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@ -516,41 +506,38 @@ static void prvSetupTimerInterrupt( void )
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}
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/* Calculate the reload value required to wait xExpectedIdleTime tick
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* periods. */
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periods. */
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ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
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if( ulMatchValue > ulStoppedTimerCompensation )
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{
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/* Compensate for the fact that the CMT is going to be stopped
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* momentarily. */
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momentarily. */
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ulMatchValue -= ulStoppedTimerCompensation;
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}
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/* Stop the CMT momentarily. The time the CMT is stopped for is
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* accounted for as best it can be, but using the tickless mode will
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* inevitably result in some tiny drift of the time maintained by the
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* kernel with respect to calendar time. */
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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CMT.CMSTR0.BIT.STR0 = 0;
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while( CMT.CMSTR0.BIT.STR0 == 1 )
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{
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/* Nothing to do here. */
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}
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/* Critical section using the global interrupt bit as the i bit is
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* automatically reset by the WAIT instruction. */
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automatically reset by the WAIT instruction. */
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clrpsw_i();
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/* The tick flag is set to false before sleeping. If it is true when
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* sleep mode is exited then sleep mode was probably exited because the
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* tick was suppressed for the entire xExpectedIdleTime period. */
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sleep mode is exited then sleep mode was probably exited because the
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tick was suppressed for the entire xExpectedIdleTime period. */
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ulTickFlag = pdFALSE;
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/* If a context switch is pending then abandon the low power entry as
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* the context switch might have been pended by an external interrupt that
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* requires processing. */
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the context switch might have been pended by an external interrupt that
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requires processing. */
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eSleepAction = eTaskConfirmSleepModeStatus();
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if( eSleepAction == eAbortSleep )
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{
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/* Restart tick. */
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@ -569,7 +556,7 @@ static void prvSetupTimerInterrupt( void )
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SYSTEM.PRCR.WORD = portLOCK_KEY;
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/* Sleep until something happens. Calling prvSleep() will
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* automatically reset the i bit in the PSW. */
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automatically reset the i bit in the PSW. */
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prvSleep( xExpectedIdleTime );
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/* Restart the CMT. */
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@ -589,7 +576,7 @@ static void prvSetupTimerInterrupt( void )
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SYSTEM.PRCR.WORD = portLOCK_KEY;
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/* Adjust the match value to take into account that the current
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* time slice is already partially complete. */
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time slice is already partially complete. */
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ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
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CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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@ -598,15 +585,14 @@ static void prvSetupTimerInterrupt( void )
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CMT.CMSTR0.BIT.STR0 = 1;
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/* Sleep until something happens. Calling prvSleep() will
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* automatically reset the i bit in the PSW. */
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automatically reset the i bit in the PSW. */
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prvSleep( xExpectedIdleTime );
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/* Stop CMT. Again, the time the SysTick is stopped for is
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* accounted for as best it can be, but using the tickless mode will
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* inevitably result in some tiny drift of the time maintained by the
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* kernel with respect to calendar time. */
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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CMT.CMSTR0.BIT.STR0 = 0;
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while( CMT.CMSTR0.BIT.STR0 == 1 )
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{
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/* Nothing to do here. */
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@ -617,42 +603,42 @@ static void prvSetupTimerInterrupt( void )
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if( ulTickFlag != pdFALSE )
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{
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/* The tick interrupt has already executed, although because
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* this function is called with the scheduler suspended the actual
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* tick processing will not occur until after this function has
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* exited. Reset the match value with whatever remains of this
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* tick period. */
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this function is called with the scheduler suspended the actual
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tick processing will not occur until after this function has
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exited. Reset the match value with whatever remains of this
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tick period. */
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ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
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CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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/* The tick interrupt handler will already have pended the tick
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* processing in the kernel. As the pending tick will be
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* processed as soon as this function exits, the tick value
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* maintained by the tick is stepped forward by one less than the
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* time spent sleeping. The actual stepping of the tick appears
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* later in this function. */
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processing in the kernel. As the pending tick will be
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processed as soon as this function exits, the tick value
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maintained by the tick is stepped forward by one less than the
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time spent sleeping. The actual stepping of the tick appears
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later in this function. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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{
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/* Something other than the tick interrupt ended the sleep.
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* How many complete tick periods passed while the processor was
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* sleeping? */
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How many complete tick periods passed while the processor was
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sleeping? */
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ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
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/* The match value is set to whatever fraction of a single tick
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* period remains. */
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period remains. */
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ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
|
||||
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
|
||||
}
|
||||
|
||||
/* Restart the CMT so it runs up to the match value. The match value
|
||||
* will get set to the value required to generate exactly one tick period
|
||||
* the next time the CMT interrupt executes. */
|
||||
will get set to the value required to generate exactly one tick period
|
||||
the next time the CMT interrupt executes. */
|
||||
CMT0.CMCNT = 0;
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
|
||||
/* Wind the tick forward by the number of tick periods that the CPU
|
||||
* remained in a low power state. */
|
||||
remained in a low power state. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
}
|
||||
}
|
||||
|
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other
|
||||
* than portSTACK_TYPE and portBASE_TYPE. */
|
||||
than portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
|
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
|
|||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
|
@ -88,8 +88,8 @@ typedef unsigned long UBaseType_t;
|
|||
static void vPortYield( void )
|
||||
{
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
* functions are considered to use the same rules as function calls by the
|
||||
* compiler. */
|
||||
functions are considered to use the same rules as function calls by the
|
||||
compiler. */
|
||||
PUSH.L R5
|
||||
/* Set ITU SWINTR. */
|
||||
MOV.L #872E0H, R5
|
||||
|
@ -103,14 +103,14 @@ static void vPortYield( void )
|
|||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portYIELD(); } } while( 0 )
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
|
|
|
@ -43,14 +43,14 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
|
||||
* PSW is set with U and I set, and PM and IPL clear. */
|
||||
PSW is set with U and I set, and PM and IPL clear. */
|
||||
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
|
||||
* and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
* as a library. */
|
||||
and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
as a library. */
|
||||
extern BaseType_t vSoftwareInterruptEntry;
|
||||
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
|
||||
|
||||
|
@ -80,7 +80,7 @@ void vSoftwareInterruptISR( void );
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This is accessed by the inline assembler functions so is file scope for
|
||||
* convenience. */
|
||||
convenience. */
|
||||
extern void *pxCurrentTCB;
|
||||
extern void vTaskSwitchContext( void );
|
||||
|
||||
|
@ -89,9 +89,7 @@ extern void vTaskSwitchContext( void );
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/* Offset to end up on 8 byte boundary. */
|
||||
pxTopOfStack--;
|
||||
|
@ -106,8 +104,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
|
||||
/* When debugging it can be useful if every register is set to a known
|
||||
* value. Otherwise code space can be saved by just setting the registers
|
||||
* that need to be set. */
|
||||
value. Otherwise code space can be saved by just setting the registers
|
||||
that need to be set. */
|
||||
#ifdef USE_FULL_REGISTER_INITIALISATION
|
||||
{
|
||||
pxTopOfStack--;
|
||||
|
@ -140,11 +138,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = 0x22222222;
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#else
|
||||
{
|
||||
pxTopOfStack -= 15;
|
||||
}
|
||||
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#endif
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
@ -164,8 +162,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
if( pxCurrentTCB != NULL )
|
||||
{
|
||||
/* Call an application function to set up the timer that will generate the
|
||||
* tick interrupt. This way the application can decide which peripheral to
|
||||
* use. A demo application is provided to show a suitable example. */
|
||||
tick interrupt. This way the application can decide which peripheral to
|
||||
use. A demo application is provided to show a suitable example. */
|
||||
vApplicationSetupTimerInterrupt();
|
||||
|
||||
/* Enable the software interrupt. */
|
||||
|
@ -193,18 +191,18 @@ BaseType_t xPortStartScheduler( void )
|
|||
static void prvStartFirstTask( void )
|
||||
{
|
||||
/* When starting the scheduler there is nothing that needs moving to the
|
||||
* interrupt stack because the function is not called from an interrupt.
|
||||
* Just ensure the current stack is the user stack. */
|
||||
interrupt stack because the function is not called from an interrupt.
|
||||
Just ensure the current stack is the user stack. */
|
||||
SETPSW U
|
||||
|
||||
/* Obtain the location of the stack associated with which ever task
|
||||
* pxCurrentTCB is currently pointing to. */
|
||||
pxCurrentTCB is currently pointing to. */
|
||||
MOV.L #_pxCurrentTCB, R15
|
||||
MOV.L [R15], R15
|
||||
MOV.L [R15], R0
|
||||
|
||||
/* Restore the registers from the stack of the task pointed to by
|
||||
* pxCurrentTCB. */
|
||||
pxCurrentTCB. */
|
||||
POP R15
|
||||
MVTACLO R15 /* Accumulator low 32 bits. */
|
||||
POP R15
|
||||
|
@ -220,7 +218,7 @@ static void prvStartFirstTask( void )
|
|||
void vTickISR( void )
|
||||
{
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
* necessitates. */
|
||||
necessitates. */
|
||||
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
|
@ -228,7 +226,6 @@ void vTickISR( void )
|
|||
taskYIELD();
|
||||
}
|
||||
}
|
||||
|
||||
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -246,9 +243,9 @@ static void prvYieldHandler( void )
|
|||
SETPSW I
|
||||
|
||||
/* Move the data that was automatically pushed onto the interrupt stack when
|
||||
* the interrupt occurred from the interrupt stack to the user stack.
|
||||
*
|
||||
* R15 is saved before it is clobbered. */
|
||||
the interrupt occurred from the interrupt stack to the user stack.
|
||||
|
||||
R15 is saved before it is clobbered. */
|
||||
PUSH.L R15
|
||||
|
||||
/* Read the user stack pointer. */
|
||||
|
@ -259,13 +256,9 @@ static void prvYieldHandler( void )
|
|||
MVTC R15, USP
|
||||
|
||||
/* Copy the data across. */
|
||||
MOV.L[ R0 ], [ R15 ];
|
||||
R15
|
||||
|
||||
MOV.L 4[ R0 ], 4[ R15 ];
|
||||
PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ];
|
||||
PSW
|
||||
MOV.L [ R0 ], [ R15 ] ; R15
|
||||
MOV.L 4[ R0 ], 4[ R15 ] ; PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
|
||||
|
||||
/* Move the interrupt stack pointer to its new correct position. */
|
||||
ADD #12, R0
|
||||
|
@ -279,10 +272,8 @@ static void prvYieldHandler( void )
|
|||
/* Save the accumulator. */
|
||||
MVFACHI R15
|
||||
PUSH.L R15
|
||||
MVFACMI R15;
|
||||
Middle order word.
|
||||
SHLL # 16, R15;
|
||||
Shifted left as it is restored to the low order word.
|
||||
MVFACMI R15 ; Middle order word.
|
||||
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
|
||||
PUSH.L R15
|
||||
|
||||
/* Save the stack pointer to the TCB. */
|
||||
|
@ -291,7 +282,7 @@ static void prvYieldHandler( void )
|
|||
MOV.L R0, [ R15 ]
|
||||
|
||||
/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
* structures are being accessed. */
|
||||
structures are being accessed. */
|
||||
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Select the next task to run. */
|
||||
|
@ -301,13 +292,13 @@ static void prvYieldHandler( void )
|
|||
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
* state task from its TCB. */
|
||||
state task from its TCB. */
|
||||
MOV.L #_pxCurrentTCB,R15
|
||||
MOV.L [ R15 ], R15
|
||||
MOV.L [ R15 ], R0
|
||||
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
* PC will be popped by the RTE instruction. */
|
||||
PC will be popped by the RTE instruction. */
|
||||
POP R15
|
||||
MVTACLO R15
|
||||
POP R15
|
||||
|
@ -322,7 +313,7 @@ static void prvYieldHandler( void )
|
|||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
Artificially force an assert. */
|
||||
configASSERT( pxCurrentTCB == NULL );
|
||||
|
||||
/* The following line is just to prevent the symbol getting optimised away. */
|
||||
|
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other than
|
||||
* portSTACK_TYPE and portBASE_TYPE. */
|
||||
portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
|
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
|
|||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
|
@ -88,8 +88,8 @@ typedef unsigned long UBaseType_t;
|
|||
static void vPortYield( void )
|
||||
{
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
* functions are considered to use the same rules as function calls by the
|
||||
* compiler. */
|
||||
functions are considered to use the same rules as function calls by the
|
||||
compiler. */
|
||||
PUSH.L R5
|
||||
/* Set ITU SWINTR. */
|
||||
MOV.L #553696, R5
|
||||
|
@ -103,14 +103,14 @@ static void vPortYield( void )
|
|||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
|
|
|
@ -43,15 +43,15 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
|
||||
* PSW is set with U and I set, and PM and IPL clear. */
|
||||
PSW is set with U and I set, and PM and IPL clear. */
|
||||
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
|
||||
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
|
||||
* and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
* as a library. */
|
||||
and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
as a library. */
|
||||
extern BaseType_t vSoftwareInterruptEntry;
|
||||
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
|
||||
|
||||
|
@ -81,7 +81,7 @@ void vSoftwareInterruptISR( void );
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This is accessed by the inline assembler functions so is file scope for
|
||||
* convenience. */
|
||||
convenience. */
|
||||
extern void *pxCurrentTCB;
|
||||
extern void vTaskSwitchContext( void );
|
||||
|
||||
|
@ -90,9 +90,7 @@ extern void vTaskSwitchContext( void );
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/* R0 is not included as it is the stack pointer. */
|
||||
|
||||
|
@ -103,8 +101,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
|
||||
/* When debugging it can be useful if every register is set to a known
|
||||
* value. Otherwise code space can be saved by just setting the registers
|
||||
* that need to be set. */
|
||||
value. Otherwise code space can be saved by just setting the registers
|
||||
that need to be set. */
|
||||
#ifdef USE_FULL_REGISTER_INITIALISATION
|
||||
{
|
||||
pxTopOfStack--;
|
||||
|
@ -137,11 +135,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = 0x22222222;
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#else
|
||||
{
|
||||
pxTopOfStack -= 15;
|
||||
}
|
||||
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#endif
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
@ -163,8 +161,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
if( pxCurrentTCB != NULL )
|
||||
{
|
||||
/* Call an application function to set up the timer that will generate the
|
||||
* tick interrupt. This way the application can decide which peripheral to
|
||||
* use. A demo application is provided to show a suitable example. */
|
||||
tick interrupt. This way the application can decide which peripheral to
|
||||
use. A demo application is provided to show a suitable example. */
|
||||
vApplicationSetupTimerInterrupt();
|
||||
|
||||
/* Enable the software interrupt. */
|
||||
|
@ -192,18 +190,18 @@ BaseType_t xPortStartScheduler( void )
|
|||
static void prvStartFirstTask( void )
|
||||
{
|
||||
/* When starting the scheduler there is nothing that needs moving to the
|
||||
* interrupt stack because the function is not called from an interrupt.
|
||||
* Just ensure the current stack is the user stack. */
|
||||
interrupt stack because the function is not called from an interrupt.
|
||||
Just ensure the current stack is the user stack. */
|
||||
SETPSW U
|
||||
|
||||
/* Obtain the location of the stack associated with which ever task
|
||||
* pxCurrentTCB is currently pointing to. */
|
||||
pxCurrentTCB is currently pointing to. */
|
||||
MOV.L #_pxCurrentTCB, R15
|
||||
MOV.L [R15], R15
|
||||
MOV.L [R15], R0
|
||||
|
||||
/* Restore the registers from the stack of the task pointed to by
|
||||
* pxCurrentTCB. */
|
||||
pxCurrentTCB. */
|
||||
POP R15
|
||||
MVTACLO R15 /* Accumulator low 32 bits. */
|
||||
POP R15
|
||||
|
@ -221,7 +219,7 @@ static void prvStartFirstTask( void )
|
|||
void vTickISR( void )
|
||||
{
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
* necessitates. */
|
||||
necessitates. */
|
||||
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
|
@ -229,7 +227,6 @@ void vTickISR( void )
|
|||
taskYIELD();
|
||||
}
|
||||
}
|
||||
|
||||
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -247,9 +244,9 @@ static void prvYieldHandler( void )
|
|||
SETPSW I
|
||||
|
||||
/* Move the data that was automatically pushed onto the interrupt stack when
|
||||
* the interrupt occurred from the interrupt stack to the user stack.
|
||||
*
|
||||
* R15 is saved before it is clobbered. */
|
||||
the interrupt occurred from the interrupt stack to the user stack.
|
||||
|
||||
R15 is saved before it is clobbered. */
|
||||
PUSH.L R15
|
||||
|
||||
/* Read the user stack pointer. */
|
||||
|
@ -260,13 +257,9 @@ static void prvYieldHandler( void )
|
|||
MVTC R15, USP
|
||||
|
||||
/* Copy the data across. */
|
||||
MOV.L[ R0 ], [ R15 ];
|
||||
R15
|
||||
|
||||
MOV.L 4[ R0 ], 4[ R15 ];
|
||||
PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ];
|
||||
PSW
|
||||
MOV.L [ R0 ], [ R15 ] ; R15
|
||||
MOV.L 4[ R0 ], 4[ R15 ] ; PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
|
||||
|
||||
/* Move the interrupt stack pointer to its new correct position. */
|
||||
ADD #12, R0
|
||||
|
@ -282,10 +275,8 @@ static void prvYieldHandler( void )
|
|||
PUSH.L R15
|
||||
MVFACHI R15
|
||||
PUSH.L R15
|
||||
MVFACMI R15;
|
||||
Middle order word.
|
||||
SHLL # 16, R15;
|
||||
Shifted left as it is restored to the low order word.
|
||||
MVFACMI R15 ; Middle order word.
|
||||
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
|
||||
PUSH.L R15
|
||||
|
||||
/* Save the stack pointer to the TCB. */
|
||||
|
@ -294,7 +285,7 @@ static void prvYieldHandler( void )
|
|||
MOV.L R0, [ R15 ]
|
||||
|
||||
/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
* structures are being accessed. */
|
||||
structures are being accessed. */
|
||||
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Select the next task to run. */
|
||||
|
@ -304,13 +295,13 @@ static void prvYieldHandler( void )
|
|||
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
* state task from its TCB. */
|
||||
state task from its TCB. */
|
||||
MOV.L #_pxCurrentTCB,R15
|
||||
MOV.L [ R15 ], R15
|
||||
MOV.L [ R15 ], R0
|
||||
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
* PC will be popped by the RTE instruction. */
|
||||
PC will be popped by the RTE instruction. */
|
||||
POP R15
|
||||
MVTACLO R15
|
||||
POP R15
|
||||
|
@ -327,7 +318,7 @@ static void prvYieldHandler( void )
|
|||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
Artificially force an assert. */
|
||||
configASSERT( pxCurrentTCB == NULL );
|
||||
|
||||
/* The following line is just to prevent the symbol getting optimised away. */
|
||||
|
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other than
|
||||
* portSTACK_TYPE and portBASE_TYPE. */
|
||||
portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
|
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
|
|||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
|
@ -89,8 +89,8 @@ typedef unsigned long UBaseType_t;
|
|||
static void vPortYield( void )
|
||||
{
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
* functions are considered to use the same rules as function calls by the
|
||||
* compiler. */
|
||||
functions are considered to use the same rules as function calls by the
|
||||
compiler. */
|
||||
PUSH.L R5
|
||||
/* Set ITU SWINTR. */
|
||||
MOV.L #553696, R5
|
||||
|
@ -104,14 +104,14 @@ static void vPortYield( void )
|
|||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
|
|
|
@ -47,15 +47,15 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
|
||||
* PSW is set with U and I set, and PM and IPL clear. */
|
||||
PSW is set with U and I set, and PM and IPL clear. */
|
||||
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
|
||||
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
|
||||
* and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
* as a library. */
|
||||
and therefore installed in the vector table, when the FreeRTOS code is built
|
||||
as a library. */
|
||||
extern BaseType_t vSoftwareInterruptEntry;
|
||||
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
|
||||
|
||||
|
@ -85,7 +85,7 @@ void vSoftwareInterruptISR( void );
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This is accessed by the inline assembler functions so is file scope for
|
||||
* convenience. */
|
||||
convenience. */
|
||||
extern void *pxCurrentTCB;
|
||||
extern void vTaskSwitchContext( void );
|
||||
|
||||
|
@ -94,9 +94,7 @@ extern void vTaskSwitchContext( void );
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/* R0 is not included as it is the stack pointer. */
|
||||
|
||||
|
@ -107,8 +105,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
|
||||
/* When debugging it can be useful if every register is set to a known
|
||||
* value. Otherwise code space can be saved by just setting the registers
|
||||
* that need to be set. */
|
||||
value. Otherwise code space can be saved by just setting the registers
|
||||
that need to be set. */
|
||||
#ifdef USE_FULL_REGISTER_INITIALISATION
|
||||
{
|
||||
pxTopOfStack--;
|
||||
|
@ -141,11 +139,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
*pxTopOfStack = 0x22222222;
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#else
|
||||
{
|
||||
pxTopOfStack -= 15;
|
||||
}
|
||||
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
|
||||
#endif
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
@ -175,8 +173,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
if( pxCurrentTCB != NULL )
|
||||
{
|
||||
/* Call an application function to set up the timer that will generate the
|
||||
* tick interrupt. This way the application can decide which peripheral to
|
||||
* use. A demo application is provided to show a suitable example. */
|
||||
tick interrupt. This way the application can decide which peripheral to
|
||||
use. A demo application is provided to show a suitable example. */
|
||||
vApplicationSetupTimerInterrupt();
|
||||
|
||||
/* Enable the software interrupt. */
|
||||
|
@ -204,18 +202,18 @@ BaseType_t xPortStartScheduler( void )
|
|||
static void prvStartFirstTask( void )
|
||||
{
|
||||
/* When starting the scheduler there is nothing that needs moving to the
|
||||
* interrupt stack because the function is not called from an interrupt.
|
||||
* Just ensure the current stack is the user stack. */
|
||||
interrupt stack because the function is not called from an interrupt.
|
||||
Just ensure the current stack is the user stack. */
|
||||
SETPSW U
|
||||
|
||||
/* Obtain the location of the stack associated with which ever task
|
||||
* pxCurrentTCB is currently pointing to. */
|
||||
pxCurrentTCB is currently pointing to. */
|
||||
MOV.L #_pxCurrentTCB, R15
|
||||
MOV.L [R15], R15
|
||||
MOV.L [R15], R0
|
||||
|
||||
/* Restore the registers from the stack of the task pointed to by
|
||||
* pxCurrentTCB. */
|
||||
pxCurrentTCB. */
|
||||
POP R15
|
||||
MVTACLO R15, A0 /* Accumulator low 32 bits. */
|
||||
POP R15
|
||||
|
@ -241,7 +239,7 @@ static void prvStartFirstTask( void )
|
|||
void vTickISR( void )
|
||||
{
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
* necessitates. */
|
||||
necessitates. */
|
||||
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
|
@ -249,7 +247,6 @@ void vTickISR( void )
|
|||
taskYIELD();
|
||||
}
|
||||
}
|
||||
|
||||
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -267,9 +264,9 @@ static void prvYieldHandler( void )
|
|||
SETPSW I
|
||||
|
||||
/* Move the data that was automatically pushed onto the interrupt stack when
|
||||
* the interrupt occurred from the interrupt stack to the user stack.
|
||||
*
|
||||
* R15 is saved before it is clobbered. */
|
||||
the interrupt occurred from the interrupt stack to the user stack.
|
||||
|
||||
R15 is saved before it is clobbered. */
|
||||
PUSH.L R15
|
||||
|
||||
/* Read the user stack pointer. */
|
||||
|
@ -280,13 +277,9 @@ static void prvYieldHandler( void )
|
|||
MVTC R15, USP
|
||||
|
||||
/* Copy the data across. */
|
||||
MOV.L[ R0 ], [ R15 ];
|
||||
R15
|
||||
|
||||
MOV.L 4[ R0 ], 4[ R15 ];
|
||||
PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ];
|
||||
PSW
|
||||
MOV.L [ R0 ], [ R15 ] ; R15
|
||||
MOV.L 4[ R0 ], 4[ R15 ] ; PC
|
||||
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
|
||||
|
||||
/* Move the interrupt stack pointer to its new correct position. */
|
||||
ADD #12, R0
|
||||
|
@ -304,15 +297,13 @@ static void prvYieldHandler( void )
|
|||
PUSH.L R15
|
||||
MVFACHI #0, A1, R15
|
||||
PUSH.L R15
|
||||
MVFACLO # 0, A1, R15;
|
||||
Low order word.
|
||||
MVFACLO #0, A1, R15 ; Low order word.
|
||||
PUSH.L R15
|
||||
MVFACGU #0, A0, R15
|
||||
PUSH.L R15
|
||||
MVFACHI #0, A0, R15
|
||||
PUSH.L R15
|
||||
MVFACLO # 0, A0, R15;
|
||||
Low order word.
|
||||
MVFACLO #0, A0, R15 ; Low order word.
|
||||
PUSH.L R15
|
||||
|
||||
/* Save the stack pointer to the TCB. */
|
||||
|
@ -321,7 +312,7 @@ static void prvYieldHandler( void )
|
|||
MOV.L R0, [ R15 ]
|
||||
|
||||
/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
* structures are being accessed. */
|
||||
structures are being accessed. */
|
||||
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Select the next task to run. */
|
||||
|
@ -331,13 +322,13 @@ static void prvYieldHandler( void )
|
|||
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
|
||||
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
* state task from its TCB. */
|
||||
state task from its TCB. */
|
||||
MOV.L #_pxCurrentTCB,R15
|
||||
MOV.L [ R15 ], R15
|
||||
MOV.L [ R15 ], R0
|
||||
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
* PC will be popped by the RTE instruction. */
|
||||
PC will be popped by the RTE instruction. */
|
||||
POP R15
|
||||
MVTACLO R15, A0 /* Accumulator low 32 bits. */
|
||||
POP R15
|
||||
|
@ -362,7 +353,7 @@ static void prvYieldHandler( void )
|
|||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
Artificially force an assert. */
|
||||
configASSERT( pxCurrentTCB == NULL );
|
||||
|
||||
/* The following line is just to prevent the symbol getting optimised away. */
|
||||
|
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other than
|
||||
* portSTACK_TYPE and portBASE_TYPE. */
|
||||
portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
|
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
|
|||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
|
@ -89,8 +89,8 @@ typedef unsigned long UBaseType_t;
|
|||
static void vPortYield( void )
|
||||
{
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
* functions are considered to use the same rules as function calls by the
|
||||
* compiler. */
|
||||
functions are considered to use the same rules as function calls by the
|
||||
compiler. */
|
||||
PUSH.L R5
|
||||
/* Set ITU SWINTR. */
|
||||
MOV.L #553696, R5
|
||||
|
@ -104,14 +104,14 @@ static void vPortYield( void )
|
|||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
|
|
|
@ -355,10 +355,13 @@ static void prvStartFirstTask( void )
|
|||
POP R15
|
||||
MOV.L # _ulPortTaskHasDPFPUContext, R14
|
||||
MOV.L R15, [ R14 ]
|
||||
|
||||
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
|
||||
|
||||
/* Restore the DPFPU context. */
|
||||
DPOPM.L DPSW-DECNT
|
||||
DPOPM.D DR0-DR15
|
||||
|
||||
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
|
||||
|
||||
POP R15
|
||||
|
@ -397,6 +400,7 @@ static void prvStartFirstTask( void )
|
|||
RTE
|
||||
NOP
|
||||
NOP
|
||||
|
||||
#endif /* ifndef __CDT_PARSER__ */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -411,6 +415,7 @@ void vSoftwareInterruptISR( void )
|
|||
static void prvYieldHandler( void )
|
||||
{
|
||||
#ifndef __CDT_PARSER__
|
||||
|
||||
/* Re-enable interrupts. */
|
||||
SETPSW I
|
||||
|
||||
|
@ -474,10 +479,13 @@ static void prvYieldHandler( void )
|
|||
|
||||
/* Save ulPortTaskHasDPFPUContext itself. */
|
||||
PUSH.L R15
|
||||
|
||||
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
|
||||
|
||||
/* Save the DPFPU context, always. */
|
||||
DPUSHM.D DR0-DR15
|
||||
DPUSHM.L DPSW-DECNT
|
||||
|
||||
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
|
||||
|
||||
|
||||
|
@ -522,10 +530,13 @@ static void prvYieldHandler( void )
|
|||
DPOPM.L DPSW-DECNT
|
||||
DPOPM.D DR0-DR15
|
||||
?:
|
||||
|
||||
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
|
||||
|
||||
/* Restore the DPFPU context, always. */
|
||||
DPOPM.L DPSW-DECNT
|
||||
DPOPM.D DR0-DR15
|
||||
|
||||
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
|
||||
|
||||
POP R15
|
||||
|
@ -558,6 +569,7 @@ static void prvYieldHandler( void )
|
|||
RTE
|
||||
NOP
|
||||
NOP
|
||||
|
||||
#endif /* ifndef __CDT_PARSER__ */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
@ -111,7 +111,6 @@ typedef unsigned long UBaseType_t;
|
|||
static void vPortYield( void )
|
||||
{
|
||||
#ifndef __CDT_PARSER__
|
||||
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
* functions are considered to use the same rules as function calls by the
|
||||
* compiler. */
|
||||
|
@ -123,7 +122,7 @@ static void vPortYield( void )
|
|||
CMP [ R5 ].UB, R5
|
||||
/* Restore clobbered register to its previous value. */
|
||||
POP R5
|
||||
#endif /* ifndef __CDT_PARSER__ */
|
||||
#endif
|
||||
}
|
||||
|
||||
#define portYIELD() vPortYield()
|
||||
|
@ -175,7 +174,6 @@ extern void vTaskExitCritical( void );
|
|||
#if( configUSE_TASK_DPFPU_SUPPORT == 1 )
|
||||
void vPortTaskUsesDPFPU( void );
|
||||
#else
|
||||
|
||||
/* Each task has a DPFPU context already, so define this function away to
|
||||
* nothing to prevent it being called accidentally. */
|
||||
#define vPortTaskUsesDPFPU()
|
||||
|
|
Loading…
Reference in a new issue