Revert Portable/Renesas formatting (#876)

* Revert the formatting on Renesas ports
This commit is contained in:
Soren Ptak 2023-11-28 13:56:15 -05:00 committed by GitHub
parent a2a4485ed3
commit 147f34ab5f
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10 changed files with 932 additions and 963 deletions

View file

@ -46,11 +46,11 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
/* The peripheral clock is divided by this value before being supplying the
* CMT. */
CMT. */
#if ( configUSE_TICKLESS_IDLE == 0 )
/* If tickless idle is not used then the divisor can be fixed. */
#define portCLOCK_DIVISOR 8UL
@ -66,15 +66,15 @@
/* Keys required to lock and unlock access to certain system registers
* respectively. */
respectively. */
#define portUNLOCK_KEY 0xA50B
#define portLOCK_KEY 0xA500
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -109,9 +109,8 @@ void vSoftwareInterruptISR( void );
*/
static void prvSetupTimerInterrupt( void );
#ifndef configSETUP_TICK_INTERRUPT
/* The user has not provided their own tick interrupt configuration so use
* the definition in this file (which uses the interval timer). */
the definition in this file (which uses the interval timer). */
#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
#endif /* configSETUP_TICK_INTERRUPT */
@ -138,34 +137,32 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / p
#if configUSE_TICKLESS_IDLE == 1
/* Holds the maximum number of ticks that can be suppressed - which is
* basically how far into the future an interrupt can be generated. Set
* during initialisation. This is the maximum possible value that the
* compare match register can hold divided by ulMatchValueForOneTick. */
basically how far into the future an interrupt can be generated. Set
during initialisation. This is the maximum possible value that the
compare match register can hold divided by ulMatchValueForOneTick. */
static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
/* Flag set from the tick interrupt to allow the sleep processing to know if
* sleep mode was exited because of a tick interrupt, or an interrupt
* generated by something else. */
sleep mode was exited because of a tick interrupt, or an interrupt
generated by something else. */
static volatile uint32_t ulTickFlag = pdFALSE;
/* The CMT counter is stopped temporarily each time it is re-programmed.
* The following constant offsets the CMT counter match value by the number of
* CMT counts that would typically be missed while the counter was stopped to
* compensate for the lost time. The large difference between the divided CMT
* clock and the CPU clock means it is likely ulStoppedTimerCompensation will
* equal zero - and be optimised away. */
The following constant offsets the CMT counter match value by the number of
CMT counts that would typically be missed while the counter was stopped to
compensate for the lost time. The large difference between the divided CMT
clock and the CPU clock means it is likely ulStoppedTimerCompensation will
equal zero - and be optimised away. */
static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
#endif /* if configUSE_TICKLESS_IDLE == 1 */
#endif
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
@ -180,8 +177,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
@ -214,13 +211,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
#else
{
/* Leave space for the registers that will get popped from the stack
* when the task first starts executing. */
when the task first starts executing. */
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
@ -238,10 +235,10 @@ BaseType_t xPortStartScheduler( void )
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate
* the tick interrupt. This way the application can decide which
* peripheral to use. If tickless mode is used then the default
* implementation defined in this file (which uses CMT0) should not be
* overridden. */
the tick interrupt. This way the application can decide which
peripheral to use. If tickless mode is used then the default
implementation defined in this file (which uses CMT0) should not be
overridden. */
configSETUP_TICK_INTERRUPT();
/* Enable the software interrupt. */
@ -258,11 +255,11 @@ BaseType_t xPortStartScheduler( void )
}
/* Execution should not reach here as the tasks are now running!
* prvSetupTimerInterrupt() is called here to prevent the compiler outputting
* a warning about a statically declared function not being referenced in the
* case that the application writer has provided their own tick interrupt
* configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
* their own routine will be called in place of prvSetupTimerInterrupt()). */
prvSetupTimerInterrupt() is called here to prevent the compiler outputting
a warning about a statically declared function not being referenced in the
case that the application writer has provided their own tick interrupt
configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
their own routine will be called in place of prvSetupTimerInterrupt()). */
prvSetupTimerInterrupt();
/* Just to make sure the function is not optimised away. */
@ -277,18 +274,18 @@ BaseType_t xPortStartScheduler( void )
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
@ -304,7 +301,7 @@ static void prvStartFirstTask( void )
void prvTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
@ -312,7 +309,6 @@ void prvTickISR( void )
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
#if configUSE_TICKLESS_IDLE == 1
@ -321,7 +317,7 @@ void prvTickISR( void )
ulTickFlag = pdTRUE;
/* If this is the first tick since exiting tickless mode then the CMT
* compare match value needs resetting. */
compare match value needs resetting. */
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
}
#endif
@ -341,9 +337,9 @@ static void prvYieldHandler( void )
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack
* when the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
when the interrupt occurred from the interrupt stack to the user stack.
R15 is saved before it is clobbered. */
PUSH.L R15
/* Read the user stack pointer. */
@ -354,13 +350,9 @@ static void prvYieldHandler( void )
MVTC R15, USP
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
@ -374,10 +366,8 @@ static void prvYieldHandler( void )
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
@ -386,24 +376,24 @@ static void prvYieldHandler( void )
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the
* kernel structures are being accessed. */
kernel structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is
* required. */
required. */
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
@ -418,7 +408,7 @@ static void prvYieldHandler( void )
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */
@ -460,11 +450,11 @@ static void prvSetupTimerInterrupt( void )
{
CMT0.CMCR.BIT.CKS = 0;
}
#else /* if portCLOCK_DIVISOR == 512 */
#else
{
#error Invalid portCLOCK_DIVISOR setting
}
#endif /* if portCLOCK_DIVISOR == 512 */
#endif
/* Enable the interrupt... */
@ -486,8 +476,8 @@ static void prvSetupTimerInterrupt( void )
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
* means the application defined code has already executed the WAIT
* instruction. */
means the application defined code has already executed the WAIT
instruction. */
if( xExpectedIdleTime > 0 )
{
wait();
@ -516,41 +506,38 @@ static void prvSetupTimerInterrupt( void )
}
/* Calculate the reload value required to wait xExpectedIdleTime tick
* periods. */
periods. */
ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
if( ulMatchValue > ulStoppedTimerCompensation )
{
/* Compensate for the fact that the CMT is going to be stopped
* momentarily. */
momentarily. */
ulMatchValue -= ulStoppedTimerCompensation;
}
/* Stop the CMT momentarily. The time the CMT is stopped for is
* accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time. */
accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
}
/* Critical section using the global interrupt bit as the i bit is
* automatically reset by the WAIT instruction. */
automatically reset by the WAIT instruction. */
clrpsw_i();
/* The tick flag is set to false before sleeping. If it is true when
* sleep mode is exited then sleep mode was probably exited because the
* tick was suppressed for the entire xExpectedIdleTime period. */
sleep mode is exited then sleep mode was probably exited because the
tick was suppressed for the entire xExpectedIdleTime period. */
ulTickFlag = pdFALSE;
/* If a context switch is pending then abandon the low power entry as
* the context switch might have been pended by an external interrupt that
* requires processing. */
the context switch might have been pended by an external interrupt that
requires processing. */
eSleepAction = eTaskConfirmSleepModeStatus();
if( eSleepAction == eAbortSleep )
{
/* Restart tick. */
@ -569,7 +556,7 @@ static void prvSetupTimerInterrupt( void )
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Sleep until something happens. Calling prvSleep() will
* automatically reset the i bit in the PSW. */
automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
/* Restart the CMT. */
@ -589,7 +576,7 @@ static void prvSetupTimerInterrupt( void )
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Adjust the match value to take into account that the current
* time slice is already partially complete. */
time slice is already partially complete. */
ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
@ -598,15 +585,14 @@ static void prvSetupTimerInterrupt( void )
CMT.CMSTR0.BIT.STR0 = 1;
/* Sleep until something happens. Calling prvSleep() will
* automatically reset the i bit in the PSW. */
automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
/* Stop CMT. Again, the time the SysTick is stopped for is
* accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time. */
accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
@ -617,42 +603,42 @@ static void prvSetupTimerInterrupt( void )
if( ulTickFlag != pdFALSE )
{
/* The tick interrupt has already executed, although because
* this function is called with the scheduler suspended the actual
* tick processing will not occur until after this function has
* exited. Reset the match value with whatever remains of this
* tick period. */
this function is called with the scheduler suspended the actual
tick processing will not occur until after this function has
exited. Reset the match value with whatever remains of this
tick period. */
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* The tick interrupt handler will already have pended the tick
* processing in the kernel. As the pending tick will be
* processed as soon as this function exits, the tick value
* maintained by the tick is stepped forward by one less than the
* time spent sleeping. The actual stepping of the tick appears
* later in this function. */
processing in the kernel. As the pending tick will be
processed as soon as this function exits, the tick value
maintained by the tick is stepped forward by one less than the
time spent sleeping. The actual stepping of the tick appears
later in this function. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
* How many complete tick periods passed while the processor was
* sleeping? */
How many complete tick periods passed while the processor was
sleeping? */
ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
/* The match value is set to whatever fraction of a single tick
* period remains. */
period remains. */
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
}
/* Restart the CMT so it runs up to the match value. The match value
* will get set to the value required to generate exactly one tick period
* the next time the CMT interrupt executes. */
will get set to the value required to generate exactly one tick period
the next time the CMT interrupt executes. */
CMT0.CMCNT = 0;
CMT.CMSTR0.BIT.STR0 = 1;
/* Wind the tick forward by the number of tick periods that the CPU
* remained in a low power state. */
remained in a low power state. */
vTaskStepTick( ulCompleteTickPeriods );
}
}

View file

@ -50,7 +50,7 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other
* than portSTACK_TYPE and portBASE_TYPE. */
than portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
@ -88,8 +88,8 @@ typedef unsigned long UBaseType_t;
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #872E0H, R5
@ -103,14 +103,14 @@ static void vPortYield( void )
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portYIELD(); } } while( 0 )
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )

View file

@ -43,14 +43,14 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -80,7 +80,7 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
@ -89,9 +89,7 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
@ -106,8 +104,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
@ -140,11 +138,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
#else
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
@ -164,8 +162,8 @@ BaseType_t xPortStartScheduler( void )
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
@ -193,18 +191,18 @@ BaseType_t xPortStartScheduler( void )
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
@ -220,7 +218,7 @@ static void prvStartFirstTask( void )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
@ -228,7 +226,6 @@ void vTickISR( void )
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
@ -246,9 +243,9 @@ static void prvYieldHandler( void )
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
the interrupt occurred from the interrupt stack to the user stack.
R15 is saved before it is clobbered. */
PUSH.L R15
/* Read the user stack pointer. */
@ -259,13 +256,9 @@ static void prvYieldHandler( void )
MVTC R15, USP
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
@ -279,10 +272,8 @@ static void prvYieldHandler( void )
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
@ -291,7 +282,7 @@ static void prvYieldHandler( void )
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
@ -301,13 +292,13 @@ static void prvYieldHandler( void )
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
@ -322,7 +313,7 @@ static void prvYieldHandler( void )
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */

View file

@ -50,7 +50,7 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
@ -88,8 +88,8 @@ typedef unsigned long UBaseType_t;
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
@ -103,14 +103,14 @@ static void vPortYield( void )
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )

View file

@ -43,15 +43,15 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -81,7 +81,7 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
@ -90,9 +90,7 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* R0 is not included as it is the stack pointer. */
@ -103,8 +101,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
@ -137,11 +135,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
#else
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
@ -163,8 +161,8 @@ BaseType_t xPortStartScheduler( void )
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
@ -192,18 +190,18 @@ BaseType_t xPortStartScheduler( void )
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
@ -221,7 +219,7 @@ static void prvStartFirstTask( void )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
@ -229,7 +227,6 @@ void vTickISR( void )
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
@ -247,9 +244,9 @@ static void prvYieldHandler( void )
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
the interrupt occurred from the interrupt stack to the user stack.
R15 is saved before it is clobbered. */
PUSH.L R15
/* Read the user stack pointer. */
@ -260,13 +257,9 @@ static void prvYieldHandler( void )
MVTC R15, USP
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
@ -282,10 +275,8 @@ static void prvYieldHandler( void )
PUSH.L R15
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
@ -294,7 +285,7 @@ static void prvYieldHandler( void )
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
@ -304,13 +295,13 @@ static void prvYieldHandler( void )
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
@ -327,7 +318,7 @@ static void prvYieldHandler( void )
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */

View file

@ -50,7 +50,7 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
@ -89,8 +89,8 @@ typedef unsigned long UBaseType_t;
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
@ -104,14 +104,14 @@ static void vPortYield( void )
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )

View file

@ -47,15 +47,15 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -85,7 +85,7 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
@ -94,9 +94,7 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* R0 is not included as it is the stack pointer. */
@ -107,8 +105,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
@ -141,11 +139,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
#else
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
@ -175,8 +173,8 @@ BaseType_t xPortStartScheduler( void )
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
@ -204,18 +202,18 @@ BaseType_t xPortStartScheduler( void )
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
pxCurrentTCB. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
@ -241,7 +239,7 @@ static void prvStartFirstTask( void )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
@ -249,7 +247,6 @@ void vTickISR( void )
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
@ -267,9 +264,9 @@ static void prvYieldHandler( void )
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
the interrupt occurred from the interrupt stack to the user stack.
R15 is saved before it is clobbered. */
PUSH.L R15
/* Read the user stack pointer. */
@ -280,13 +277,9 @@ static void prvYieldHandler( void )
MVTC R15, USP
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
@ -304,15 +297,13 @@ static void prvYieldHandler( void )
PUSH.L R15
MVFACHI #0, A1, R15
PUSH.L R15
MVFACLO # 0, A1, R15;
Low order word.
MVFACLO #0, A1, R15 ; Low order word.
PUSH.L R15
MVFACGU #0, A0, R15
PUSH.L R15
MVFACHI #0, A0, R15
PUSH.L R15
MVFACLO # 0, A0, R15;
Low order word.
MVFACLO #0, A0, R15 ; Low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
@ -321,7 +312,7 @@ static void prvYieldHandler( void )
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
@ -331,13 +322,13 @@ static void prvYieldHandler( void )
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
@ -362,7 +353,7 @@ static void prvYieldHandler( void )
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */

View file

@ -50,7 +50,7 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
@ -71,7 +71,7 @@ typedef unsigned long UBaseType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
@ -89,8 +89,8 @@ typedef unsigned long UBaseType_t;
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
@ -104,14 +104,14 @@ static void vPortYield( void )
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) portYIELD(); } while( 0 )
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )

View file

@ -355,10 +355,13 @@ static void prvStartFirstTask( void )
POP R15
MOV.L # _ulPortTaskHasDPFPUContext, R14
MOV.L R15, [ R14 ]
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context. */
DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
POP R15
@ -397,6 +400,7 @@ static void prvStartFirstTask( void )
RTE
NOP
NOP
#endif /* ifndef __CDT_PARSER__ */
}
/*-----------------------------------------------------------*/
@ -411,6 +415,7 @@ void vSoftwareInterruptISR( void )
static void prvYieldHandler( void )
{
#ifndef __CDT_PARSER__
/* Re-enable interrupts. */
SETPSW I
@ -474,10 +479,13 @@ static void prvYieldHandler( void )
/* Save ulPortTaskHasDPFPUContext itself. */
PUSH.L R15
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Save the DPFPU context, always. */
DPUSHM.D DR0-DR15
DPUSHM.L DPSW-DECNT
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
@ -522,10 +530,13 @@ static void prvYieldHandler( void )
DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15
?:
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context, always. */
DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
POP R15
@ -558,6 +569,7 @@ static void prvYieldHandler( void )
RTE
NOP
NOP
#endif /* ifndef __CDT_PARSER__ */
}
/*-----------------------------------------------------------*/

View file

@ -111,7 +111,6 @@ typedef unsigned long UBaseType_t;
static void vPortYield( void )
{
#ifndef __CDT_PARSER__
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
@ -123,7 +122,7 @@ static void vPortYield( void )
CMP [ R5 ].UB, R5
/* Restore clobbered register to its previous value. */
POP R5
#endif /* ifndef __CDT_PARSER__ */
#endif
}
#define portYIELD() vPortYield()
@ -175,7 +174,6 @@ extern void vTaskExitCritical( void );
#if( configUSE_TASK_DPFPU_SUPPORT == 1 )
void vPortTaskUsesDPFPU( void );
#else
/* Each task has a DPFPU context already, so define this function away to
* nothing to prevent it being called accidentally. */
#define vPortTaskUsesDPFPU()