len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-10-14 00:37:44 -04:00
Code Issues Projects Releases Packages Wiki Activity

Demo/CORTEX_MPS2_QEMU_IAR_GCC cleanup (#1213)

Browse source 
Some small changes for Demo/CORTEX_MPS2_QEMU_IAR_GCC:
- FreeRTOSConfig.h: define configENABLE_BACKWARD_COMPATIBILITY to 0
- build/gcc/Makefile: remove unused SUB_MAKEFILE_DIR
- build/gcc/Makefile: no trailing slash(/) for FREERTOS_ROOT
- build/gcc/Makefile: commented out, but prepared:
   - CFLAGS += -Wpedantic -Wshadow -fanalyzer
   - CFLAGS += -flto
- build/gcc/startup_gcc.c:
   - "__attribute__( ( naked ) )" for Reset_Handler
   - "__attribute__( ( used ) )" for isr_vector and prvGetRegistersFromStack

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
This commit is contained in:
Florian La Roche 2024-04-22 11:30:13 +02:00 • committed by GitHub
parent 022447b855
commit 140ce29320
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
3 changed files with 18 additions and 14 deletions
Download patch file Download diff file Expand all files Collapse all files

2
FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/FreeRTOSConfig.h
View file

@ -131,4 +131,6 @@
#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) #define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 )
#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 ) #define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 )
#define configENABLE_BACKWARD_COMPATIBILITY 0
#endif /* FREERTOS_CONFIG_H */ #endif /* FREERTOS_CONFIG_H */

6
FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/Makefile
View file

@ -1,9 +1,8 @@
OUTPUT_DIR := ./output OUTPUT_DIR := ./output
IMAGE := RTOSDemo.out IMAGE := RTOSDemo.out
SUB_MAKEFILE_DIR = ./library-makefiles
# The directory that contains the /source and /demo sub directories. # The directory that contains the /source and /demo sub directories.
FREERTOS_ROOT = ./../../../../ FREERTOS_ROOT = ./../../../..
CC = arm-none-eabi-gcc CC = arm-none-eabi-gcc
LD = arm-none-eabi-gcc LD = arm-none-eabi-gcc
@ -15,6 +14,9 @@ CFLAGS += $(INCLUDE_DIRS) -nostartfiles -ffreestanding -mthumb -mcpu=cortex-m3 \
-Wall -Wextra -g3 -Os -ffunction-sections -fdata-sections \ -Wall -Wextra -g3 -Os -ffunction-sections -fdata-sections \
-MMD -MP -MF"$(@:%.o=%.d)" -MT $@ -MMD -MP -MF"$(@:%.o=%.d)" -MT $@
#CFLAGS += -Wpedantic -Wshadow -fanalyzer
#CFLAGS += -flto
# #
# Kernel build. # Kernel build.
# #

24
FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/startup_gcc.c
View file

@ -53,13 +53,13 @@ extern void TIMER1_Handler( void );
/* Exception handlers. */ /* Exception handlers. */
static void HardFault_Handler( void ) __attribute__( ( naked ) ); static void HardFault_Handler( void ) __attribute__( ( naked ) );
static void Default_Handler( void ) __attribute__( ( naked ) ); static void Default_Handler( void ) __attribute__( ( naked ) );
void Reset_Handler( void ); void Reset_Handler( void ) __attribute__( ( naked ) );
extern int main( void ); extern int main( void );
extern uint32_t _estack; extern uint32_t _estack;
/* Vector table. */ /* Vector table. */
const uint32_t* isr_vector[] __attribute__((section(".isr_vector"))) = const uint32_t* isr_vector[] __attribute__((section(".isr_vector"), used)) =
{ {
( uint32_t * ) &_estack, ( uint32_t * ) &_estack,
( uint32_t * ) &Reset_Handler, // Reset -15 ( uint32_t * ) &Reset_Handler, // Reset -15
@ -68,15 +68,15 @@ const uint32_t* isr_vector[] __attribute__((section(".isr_vector"))) =
( uint32_t * ) &Default_Handler, // MemManage_Handler -12 ( uint32_t * ) &Default_Handler, // MemManage_Handler -12
( uint32_t * ) &Default_Handler, // BusFault_Handler -11 ( uint32_t * ) &Default_Handler, // BusFault_Handler -11
( uint32_t * ) &Default_Handler, // UsageFault_Handler -10 ( uint32_t * ) &Default_Handler, // UsageFault_Handler -10
0, // reserved 0, // reserved -9
0, // reserved 0, // reserved -8
0, // reserved 0, // reserved -7
0, // reserved -6 0, // reserved -6
( uint32_t * ) &vPortSVCHandler, // SVC_Handler -5 ( uint32_t * ) &vPortSVCHandler, // SVC_Handler -5
( uint32_t * ) &Default_Handler, // DebugMon_Handler -4 ( uint32_t * ) &Default_Handler, // DebugMon_Handler -4
0, // reserved 0, // reserved -3
( uint32_t * ) &xPortPendSVHandler, // PendSV handler -2 ( uint32_t * ) &xPortPendSVHandler, // PendSV handler -2
( uint32_t * ) &xPortSysTickHandler,// SysTick_Handler -1 ( uint32_t * ) &xPortSysTickHandler,// SysTick_Handler -1
0, 0,
0, 0,
0, 0,
@ -86,7 +86,7 @@ const uint32_t* isr_vector[] __attribute__((section(".isr_vector"))) =
0, 0,
0, 0,
( uint32_t * ) TIMER0_Handler, // Timer 0 ( uint32_t * ) TIMER0_Handler, // Timer 0
( uint32_t * ) TIMER1_Handler, // Timer 1 ( uint32_t * ) TIMER1_Handler, // Timer 1
0, 0,
0, 0,
0, 0,
@ -113,7 +113,7 @@ volatile uint32_t psr;/* Program status register. */
/* Called from the hardfault handler to provide information on the processor /* Called from the hardfault handler to provide information on the processor
* state at the time of the fault. * state at the time of the fault.
*/ */
void prvGetRegistersFromStack( uint32_t *pulFaultStackAddress ) __attribute__( ( used ) ) void prvGetRegistersFromStack( uint32_t *pulFaultStackAddress )
{ {
r0 = pulFaultStackAddress[ 0 ]; r0 = pulFaultStackAddress[ 0 ];
r1 = pulFaultStackAddress[ 1 ]; r1 = pulFaultStackAddress[ 1 ];