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Revert "Remove coroutines (#874)" (#1019)

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* Revert "Remove coroutines (#874)"

This reverts commit 569c78fd8c.

* Update freertos Kernel submodule to latest head

* Remove temporary files

* Fix MingW demos and spell check

* Fix manifest version; fix headers

* Add ignore files and paths to core-checker.py

* Fix copyright in remaining files

* Fix PR check build failure

1. Remove defining `inline` in Makefile. This was causing build
   warnings.
2. Ensure that the linker removed unused functions from various
   compilation units.
3. Update the linker script so that all the functions are correctly
   placed in FLASH section.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Aniruddha Kanhere 2023-06-09 15:25:48 -07:00 • committed by GitHub
parent 9ccae851e7
commit 1277ba1661
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GPG key ID: 4AEE18F83AFDEB23
605 changed files with 11240 additions and 3628 deletions
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9
FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h
View file

@ -67,6 +67,9 @@
#define configUSE_COUNTING_SEMAPHORES 1
#define configGENERATE_RUN_TIME_STATS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
@ -108,11 +111,11 @@ to all Cortex-M ports, and do not rely on any particular library functions. */
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler

28
FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s
View file

@ -37,7 +37,7 @@
PUBLIC vRegTest2Task
PUBLIC vRegTestClearFlopRegistersToParameterValue
PUBLIC ulRegTestCheckFlopRegistersContainParameterValue
/*-----------------------------------------------------------*/
vRegTest1Task
@ -79,7 +79,7 @@ reg1_loop:
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #100
bne reg1_error_loopf
@ -160,10 +160,10 @@ reg1_loop:
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg1_loopf_pass
@ -200,7 +200,7 @@ reg1_loopf_pass
bne reg1_error_loop
cmp r12, #112
bne reg1_error_loop
/* Everything passed, increment the loop counter. */
push { r0-r1 }
ldr r0, =ulRegTest1LoopCounter
@ -208,7 +208,7 @@ reg1_loopf_pass
adds r1, r1, #1
str r1, [r0]
pop { r0-r1 }
/* Start again. */
b reg1_loop
@ -256,11 +256,11 @@ vRegTest2Task
vmov d15, r6, r7
reg2_loop:
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #-1
bne reg2_error_loopf
@ -341,10 +341,10 @@ reg2_loop:
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg2_loopf_pass
@ -381,7 +381,7 @@ reg2_loopf_pass
bne reg2_error_loop
cmp r12, #12
bne reg2_error_loop
/* Increment the loop counter to indicate this test is still functioning
correctly. */
push { r0-r1 }
@ -390,7 +390,7 @@ reg2_loopf_pass
adds r1, r1, #1
str r1, [r0]
pop { r0-r1 }
/* Start again. */
b reg2_loop
@ -466,7 +466,7 @@ ulRegTestCheckFlopRegistersContainParameterValue
vmov r1, s15
cmp r0, r1
bne return_error
return_pass
mov r0, #1
bx lr
@ -476,4 +476,4 @@ return_error
bx lr
END