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* Revert "Remove coroutines (#874)"
This reverts commit 569c78fd8c.
* Update freertos Kernel submodule to latest head
* Remove temporary files
* Fix MingW demos and spell check
* Fix manifest version; fix headers
* Add ignore files and paths to core-checker.py
* Fix copyright in remaining files
* Fix PR check build failure
1. Remove defining `inline` in Makefile. This was causing build
warnings.
2. Ensure that the linker removed unused functions from various
compilation units.
3. Update the linker script so that all the functions are correctly
placed in FLASH section.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Aniruddha Kanhere
GitHub
parent
9ccae851e7
commit
1277ba1661
605 changed files with 11240 additions and 3628 deletions
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@ -72,6 +72,9 @@ errata. */
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configGENERATE_RUN_TIME_STATS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Software timer definitions. */
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#define configUSE_TIMERS 1
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@ -113,11 +116,11 @@ to all Cortex-M ports, and do not rely on any particular library functions. */
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* Normal assert() semantics without relying on the provision of an assert.h
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header file. */
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#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
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#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
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/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
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standard names. WORKAROUND_PMU_CM001 is defined at the top of this file. */
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#if WORKAROUND_PMU_CM001 == 1
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@ -67,7 +67,7 @@ reg1_loop
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/* Check all the VFP registers still contain the values set above.
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First save registers that are clobbered by the test. */
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push { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #100
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bne reg1_error_loopf
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@ -148,10 +148,10 @@ reg1_loop
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bne reg1_error_loopf
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cmp r1, #107
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bne reg1_error_loopf
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/* Restore the registers that were clobbered by the test. */
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pop {r0-r1}
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/* VFP register test passed. Jump to the core register test. */
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b reg1_loopf_pass
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@ -188,7 +188,7 @@ reg1_loopf_pass
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bne reg1_error_loop
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cmp r12, #112
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bne reg1_error_loop
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/* Everything passed, increment the loop counter. */
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push { r0-r1 }
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ldr r0, =ulRegTest1LoopCounter
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@ -196,7 +196,7 @@ reg1_loopf_pass
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adds r1, r1, #1
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str r1, [r0]
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pop { r0-r1 }
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/* Start again. */
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b reg1_loop
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@ -247,11 +247,11 @@ __asm vRegTest2Task( void )
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vmov d15, r6, r7
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reg2_loop
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/* Check all the VFP registers still contain the values set above.
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First save registers that are clobbered by the test. */
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push { r0-r1 }
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vmov r0, r1, d0
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cmp r0, #-1
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bne reg2_error_loopf
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@ -332,10 +332,10 @@ reg2_loop
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bne reg2_error_loopf
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cmp r1, #7
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bne reg2_error_loopf
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/* Restore the registers that were clobbered by the test. */
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pop {r0-r1}
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/* VFP register test passed. Jump to the core register test. */
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b reg2_loopf_pass
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@ -372,7 +372,7 @@ reg2_loopf_pass
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bne reg2_error_loop
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cmp r12, #12
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bne reg2_error_loop
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/* Increment the loop counter to indicate this test is still functioning
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correctly. */
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push { r0-r1 }
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@ -380,16 +380,16 @@ reg2_loopf_pass
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ldr r1, [r0]
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adds r1, r1, #1
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str r1, [r0]
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/* Yield to increase test coverage. */
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movs r0, #0x01
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ldr r1, =0xe000ed04 /*NVIC_INT_CTRL */
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lsl r0, r0, #28 /* Shift to PendSV bit */
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str r0, [r1]
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dsb
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pop { r0-r1 }
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/* Start again. */
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b reg2_loop
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@ -469,7 +469,7 @@ __asm ulRegTestCheckFlopRegistersContainParameterValue( unsigned long ulValue )
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vmov r1, s15
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cmp r0, r1
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bne return_error
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return_pass
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mov r0, #1
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bx lr
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@ -479,4 +479,4 @@ return_error
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bx lr
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}
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@ -35,9 +35,9 @@
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* This file implements the code that is not demo specific, including the
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* hardware setup and FreeRTOS hook functions.
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*
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*
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*
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* Additional code:
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*
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*
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* This demo does not contain a non-kernel interrupt service routine that
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* can be used as an example for application writers to use as a reference.
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* Therefore, the framework of a dummy (not installed) handler is provided
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@ -65,9 +65,9 @@ or 0 to run the more comprehensive test and demo application. */
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*/
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static void prvSetupHardware( void );
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/*
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/*
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* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
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* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
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* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
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*/
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extern void main_blinky( void );
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extern void main_full( void );
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@ -98,7 +98,7 @@ int main( void )
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static void prvSetupHardware( void )
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{
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configCONFIGURE_LED();
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/* Ensure all priority bits are assigned as preemption priority bits. */
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NVIC_SetPriorityGrouping( 0 );
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}
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@ -150,7 +150,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
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void vApplicationTickHook( void )
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{
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/* This function will be called by each tick interrupt if
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/* This function will be called by each tick interrupt if
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configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be
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added here, but the tick hook is called from an interrupt context, so
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code must not attempt to block, and only the interrupt safe FreeRTOS API
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@ -166,19 +166,19 @@ long lHigherPriorityTaskWoken = pdFALSE;
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/* Clear the interrupt if necessary. */
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Dummy_ClearITPendingBit();
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/* This interrupt does nothing more than demonstrate how to synchronise a
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task with an interrupt. A semaphore is used for this purpose. Note
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lHigherPriorityTaskWoken is initialised to zero. */
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xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken );
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/* If there was a task that was blocked on the semaphore, and giving the
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semaphore caused the task to unblock, and the unblocked task has a priority
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higher than the current Running state task (the task that this interrupt
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interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE
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internally within xSemaphoreGiveFromISR(). Passing pdTRUE into the
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internally within xSemaphoreGiveFromISR(). Passing pdTRUE into the
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portEND_SWITCHING_ISR() macro will result in a context switch being pended to
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ensure this interrupt returns directly to the unblocked, higher priority,
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ensure this interrupt returns directly to the unblocked, higher priority,
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task. Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */
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portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
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}
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