Fix formatting in kernel demo application files (#1148)

* Fix formatting in kernel demo application files

* Fix header check fail in the demo files

* Add ignored patterns in core header check file

* Fix formatting

* Update vApplicationStackOverflowHook for AVR_ATMega4809_MPLAB.X/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update vApplicationStackOverflowHook for AVR_ATMega4809_MPLAB.X/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update vApplicationStackOverflowHook for AVR_Dx_IAR/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update vApplicationStackOverflowHook for AVR_Dx_IAR/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update vApplicationStackOverflowHook for AVR_Dx_MPLAB.X/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update vApplicationMallocFailedHook for AVR_Dx_MPLAB.X/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Fix formatting AVR32_UC3

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
This commit is contained in:
Rahul Kar 2024-01-02 11:05:59 +05:30 committed by GitHub
parent 85ed21bcfb
commit 121fbe295b
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169 changed files with 22211 additions and 21557 deletions

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@ -1,4 +1,5 @@
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS and lwIP example for AVR32 UC3.
@ -58,88 +59,88 @@
#include "flash.h"
/* Priority definitions for most of the tasks in the demo application. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainETH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainETH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* Baud rate used by the serial port tasks. */
#define mainCOM_BAUD_RATE ( ( unsigned long ) 57600 )
#define mainCOM_BUFFER_LEN ( ( unsigned long ) 70 )
#define mainCOM_BAUD_RATE ( ( unsigned long ) 57600 )
#define mainCOM_BUFFER_LEN ( ( unsigned long ) 70 )
/* An address in the internal Flash used to count resets. This is used to check that
the demo application is not unexpectedly resetting. */
#define mainRESET_COUNT_ADDRESS ( ( void * ) 0xC0000000 )
* the demo application is not unexpectedly resetting. */
#define mainRESET_COUNT_ADDRESS ( ( void * ) 0xC0000000 )
//!
//! \fn main
//! \brief start the software here
//! 1) Initialize the microcontroller and the shared hardware resources
//! of the board.
//! 2) Launch the IP modules.
//! 3) Start FreeRTOS.
//! \return 42, which should never occur.
//! \note
//!
/*! */
/*! \fn main */
/*! \brief start the software here */
/*! 1) Initialize the microcontroller and the shared hardware resources */
/*! of the board. */
/*! 2) Launch the IP modules. */
/*! 3) Start FreeRTOS. */
/*! \return 42, which should never occur. */
/*! \note */
/*! */
int main( void )
{
volatile avr32_pm_t* pm = &AVR32_PM;
volatile avr32_pm_t * pm = &AVR32_PM;
/* 1) Initialize the microcontroller and the shared hardware resources of the board. */
/* 1) Initialize the microcontroller and the shared hardware resources of the board. */
/* Switch to external oscillator 0 */
pm_switch_to_osc0( pm, FOSC0, OSC0_STARTUP );
/* Switch to external oscillator 0 */
pm_switch_to_osc0( pm, FOSC0, OSC0_STARTUP );
/* Setup PLL0 on OSC0, mul+1=16 ,divisor by 1, lockcount=16, ie. 12Mhzx16/1 = 192MHz output.
Extra div by 2 => 96MHz */
pm_pll_setup(pm, /* volatile avr32_pm_t* pm */
0, /* unsigned int pll */
15, /* unsigned int mul */
1, /* unsigned int div, Sel Osc0/PLL0 or Osc1/Pll1 */
0, /* unsigned int osc */
16); /* unsigned int lockcount */
/* Setup PLL0 on OSC0, mul+1=16 ,divisor by 1, lockcount=16, ie. 12Mhzx16/1 = 192MHz output.
* Extra div by 2 => 96MHz */
pm_pll_setup( pm, /* volatile avr32_pm_t* pm */
0, /* unsigned int pll */
15, /* unsigned int mul */
1, /* unsigned int div, Sel Osc0/PLL0 or Osc1/Pll1 */
0, /* unsigned int osc */
16 ); /* unsigned int lockcount */
pm_pll_set_option( pm, 0, // pll0
0, // Choose the range 160-240MHz.
1, // div2
0 ); // wbwdisable
pm_pll_set_option( pm, 0, /* pll0 */
0, /* Choose the range 160-240MHz. */
1, /* div2 */
0 ); /* wbwdisable */
/* Enable PLL0 */
pm_pll_enable(pm,0);
/* Enable PLL0 */
pm_pll_enable( pm, 0 );
/* Wait for PLL0 locked */
pm_wait_for_pll0_locked(pm) ;
/* Wait for PLL0 locked */
pm_wait_for_pll0_locked( pm );
/* Setup generic clock number 2 on PLL, with OSC0/PLL0, no divisor */
pm_gc_setup(pm,
0,
1, /* Use Osc (=0) or PLL (=1) */
0, /* Sel Osc0/PLL0 or Osc1/Pll1 */
0,
1);
/* Setup generic clock number 2 on PLL, with OSC0/PLL0, no divisor */
pm_gc_setup( pm,
0,
1, /* Use Osc (=0) or PLL (=1) */
0, /* Sel Osc0/PLL0 or Osc1/Pll1 */
0,
1 );
/* Enable Generic clock 0*/
pm_gc_enable(pm, 0);
/* Enable Generic clock 0*/
pm_gc_enable( pm, 0 );
/* switch to clock */
pm_cksel( pm, 1, 1, 1, 0, 1, 0 );
flashc_set_wait_state( 1 );
pm_switch_to_clock( pm, AVR32_PM_MCCTRL_MCSEL_PLL0 );
/* switch to clock */
pm_cksel( pm, 1, 1, 1, 0, 1, 0 );
flashc_set_wait_state( 1 );
pm_switch_to_clock( pm, AVR32_PM_MCCTRL_MCSEL_PLL0 );
/* Setup the LED's for output. */
vParTestInitialise();
/* Setup the LED's for output. */
vParTestInitialise();
/* Start the flash tasks just to provide visual feedback that the demo is
executing. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
/* Start the flash tasks just to provide visual feedback that the demo is
* executing. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
/* 2) Start ethernet task. */
vStartEthernetTask( mainETH_TASK_PRIORITY );
/* 2) Start ethernet task. */
vStartEthernetTask( mainETH_TASK_PRIORITY );
/* 3) Start FreeRTOS. */
vTaskStartScheduler();
/* 3) Start FreeRTOS. */
vTaskStartScheduler();
/* Will only reach here if there was insufficient memory to create the idle task. */
/* Will only reach here if there was insufficient memory to create the idle task. */
return 0;
return 0;
}
/*-----------------------------------------------------------*/