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Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).

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Add a project for the Vega board's RI5CY core.
This commit is contained in:
Richard Barry 2018-12-31 18:19:52 +00:00
parent e2af102c80
commit 11d9c440b8
61 changed files with 76183 additions and 53 deletions
Download patch file Download diff file Expand all files Collapse all files

4
FreeRTOS/Source/include/task.h
View file

@ -2367,6 +2367,10 @@ eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
*/
TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
#if( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
TickType_t xTaskGetIdleRunTimeCounter( void );
#endif
/*
* For internal use only. Same as vTaskSetTimeOutState(), but without a critial
* section.

19
FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
View file

@ -30,7 +30,7 @@
/*
* The FreeRTOS kernel's RISC-V port is split between the the code that is
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
* RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
*
* + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
* is common to all currently supported RISC-V chips. There is only one
@ -42,17 +42,12 @@
* as there are multiple RISC-V chip implementations.
*
* !!!NOTE!!!
* CARE MUST BE TAKEN TO INCLUDE THE CORRECT
* freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
* If the chip in use includes a core local interrupter (CLINT) and does not
* include any chip specific register extensions then set the GNU assembler's
* include path such that the header file contained in the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
* actually inlcuded. Otherwise set the assembler's include patch to the
* sub-directory off of the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
* that contains the freertos_risc_v_chip_specific_extensions.h specific to the
* target chip.
* TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
* HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
* compiler's!) include path. For example, if the chip in use includes a core
* local interrupter (CLINT) and does not include any chip specific register
* extensions then add the path below to the assembler's include path:
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
*
*/

20
FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_chip_specific_extensions.h → FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
View file

@ -28,7 +28,7 @@
/*
* The FreeRTOS kernel's RISC-V port is split between the the code that is
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
* RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
*
* + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
* is common to all currently supported RISC-V chips. There is only one
@ -40,20 +40,16 @@
* as there are multiple RISC-V chip implementations.
*
* !!!NOTE!!!
* CARE MUST BE TAKEN TO INCLUDE THE CORRECT
* freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
* If the chip in use includes a core local interrupter (CLINT) and does not
* include any chip specific register extensions then set the GNU assembler's
* include path such that the header file contained in the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
* actually inlcuded. Otherwise set the assembler's include patch to the
* sub-directory off of the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
* that contains the freertos_risc_v_chip_specific_extensions.h specific to the
* target chip.
* TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
* HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
* compiler's!) include path. For example, if the chip in use includes a core
* local interrupter (CLINT) and does not include any chip specific register
* extensions then add the path below to the assembler's include path:
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
*
*/
#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
#define __FREERTOS_RISC_V_EXTENSIONS_H__

19
FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/readme.txt
View file

@ -1,7 +1,7 @@
/*
* The FreeRTOS kernel's RISC-V port is split between the the code that is
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
* RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
*
* + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
* is common to all currently supported RISC-V chips. There is only one
@ -13,16 +13,11 @@
* as there are multiple RISC-V chip implementations.
*
* !!!NOTE!!!
* CARE MUST BE TAKEN TO INCLUDE THE CORRECT
* freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
* If the chip in use includes a core local interrupter (CLINT) and does not
* include any chip specific register extensions then set the GNU assembler's
* include path such that the header file contained in the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
* actually inlcuded. Otherwise set the assembler's include patch to the
* sub-directory off of the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
* that contains the freertos_risc_v_chip_specific_extensions.h specific to the
* target chip.
* TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
* HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
* compiler's!) include path. For example, if the chip in use includes a core
* local interrupter (CLINT) and does not include any chip specific register
* extensions then add the path below to the assembler's include path:
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
*
*/

19
FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt
View file

@ -1,7 +1,7 @@
/*
* The FreeRTOS kernel's RISC-V port is split between the the code that is
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
* RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
*
* + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
* is common to all currently supported RISC-V chips. There is only one
@ -13,16 +13,11 @@
* as there are multiple RISC-V chip implementations.
*
* !!!NOTE!!!
* CARE MUST BE TAKEN TO INCLUDE THE CORRECT
* freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
* If the chip in use includes a core local interrupter (CLINT) and does not
* include any chip specific register extensions then set the GNU assembler's
* include path such that the header file contained in the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
* actually inlcuded. Otherwise set the assembler's include patch to the
* sub-directory off of the
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
* that contains the freertos_risc_v_chip_specific_extensions.h specific to the
* target chip.
* TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
* HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
* compiler's!) include path. For example, if the chip in use includes a core
* local interrupter (CLINT) and does not include any chip specific register
* extensions then add the path below to the assembler's include path:
* FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
*
*/

7
FreeRTOS/Source/tasks.c
View file

@ -5048,6 +5048,13 @@ TickType_t uxReturn;
#endif /* configUSE_TASK_NOTIFICATIONS */
/*-----------------------------------------------------------*/
#if( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
TickType_t xTaskGetIdleRunTimeCounter( void )
{
return xIdleTaskHandle->ulRunTimeCounter;
}
#endif
/*-----------------------------------------------------------*/
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{