mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Work in progress.
This commit is contained in:
parent
bdea62587e
commit
0faf33fbca
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@ -48,18 +48,34 @@
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* Implementation of functions defined in portable.h for the 16FX port.
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* Implementation of functions defined in portable.h for the 16FX port.
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*----------------------------------------------------------*/
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*----------------------------------------------------------*/
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/* ------- Memory models --------- default address size */
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/* data code */
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#define SMALL 0 /* 16 Bit 16 Bit */
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#define MEDIUM 1 /* 16 Bit 24 Bit */
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#define COMPACT 2 /* 24 Bit 16 Bit */
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#define LARGE 3 /* 24 Bit 24 Bit */
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/*
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/*
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* The below define should be same as the option selected by the Memory
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* The below define should be same as the option selected by the Memory
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* Model (Project->Setup Project->C Compiler->Catagory->Target Depend )
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* Model (Project->Setup Project->C Compiler->Catagory->Target Depend )
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*/
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*/
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#define MEMMODEL MEDIUM
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#define configMEMMODEL portMEDIUM
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/*-----------------------------------------------------------*/
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/*
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* Get current value of DPR and ADB registers
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*/
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portSTACK_TYPE xGet_DPR_ADB_bank( void );
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/*
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* Get current value of DTB and PCB registers
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*/
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portSTACK_TYPE xGet_DTB_PCB_bank( void );
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/*
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* Get current register pointer
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*/
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portCHAR xGet_RP( void );
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/*
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* Sets up the periodic ISR used for the RTOS tick. This uses RLT0, but
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* can be done using any given RLT.
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*/
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static void prvSetupRLT0Interrupt( void );
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -70,16 +86,9 @@
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typedef void tskTCB;
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typedef void tskTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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/*-----------------------------------------------------------*/
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( unsigned portBASE_TYPE ) 0x1234 )
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/* Get current value of DPR and ADB registers */
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volatile unsigned portBASE_TYPE uxCriticalNesting = 9999UL;
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portSTACK_TYPE Get_DPR_ADB_bank(void);
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/* Get current value of DTB and PCB registers */
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portSTACK_TYPE Get_DTB_PCB_bank(void);
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/* Get current register pointer */
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portCHAR Get_RP(void);
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -94,147 +103,156 @@ portCHAR Get_RP(void);
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* executes.
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* executes.
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*/
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*/
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#if (MEMMODEL == SMALL || MEMMODEL == MEDIUM)
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#if( ( configMEMMODEL == portSMALL ) || ( configMEMMODEL == portMEDIUM ) )
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#define portSAVE_CONTEXT() \
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{ __asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" MOVW A, _pxCurrentTCB "); \
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__asm(" MOVW A, SP "); \
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__asm(" SWAPW "); \
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__asm(" MOVW @AL, AH "); \
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__asm(" OR CCR,#H'20 "); \
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}
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/*
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#define portSAVE_CONTEXT() \
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* Macro to restore a task context from the task stack. This is effecti-
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{ __asm(" POPW A "); \
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* vely the reverse of portSAVE_CONTEXT(). First the stack pointer value
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__asm(" AND CCR,#H'DF "); \
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* (USP for SMALL and MEDIUM memory model amd USB:USP for COMPACT and
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__asm(" PUSHW A "); \
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* LARGE memory model ) is loaded from the task control block. Next the
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__asm(" OR CCR,#H'20 "); \
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* value of all the general purpose registers RW0-RW7 is retrieved. Fina-
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__asm(" POPW A "); \
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* lly it copies of the context ( AH:AL, DPR:ADB, DTB:PCB, PC and PS) of
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__asm(" AND CCR,#H'DF "); \
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* the task to be executed upon RETI from user stack to system stack.
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__asm(" PUSHW A "); \
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*/
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" MOVW A, _pxCurrentTCB "); \
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__asm(" MOVW A, SP "); \
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__asm(" SWAPW "); \
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__asm(" MOVW @AL, AH "); \
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__asm(" OR CCR,#H'20 "); \
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}
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#define portRESTORE_CONTEXT() \
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/*
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{ __asm(" MOVW A, _pxCurrentTCB "); \
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* Macro to restore a task context from the task stack. This is effecti-
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__asm(" MOVW A, @A "); \
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* vely the reverse of SAVE_CONTEXT(). First the stack pointer value
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__asm(" AND CCR,#H'DF "); \
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* (USP for SMALL and MEDIUM memory model amd USB:USP for COMPACT and
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__asm(" MOVW SP, A "); \
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* LARGE memory model ) is loaded from the task control block. Next the
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__asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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* value of all the general purpose registers RW0-RW7 is retrieved. Fina-
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__asm(" POPW A "); \
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* lly it copies of the context ( AH:AL, DPR:ADB, DTB:PCB, PC and PS) of
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__asm(" OR CCR,#H'20 "); \
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* the task to be executed upon RETI from user stack to system stack.
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__asm(" PUSHW A "); \
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*/
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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}
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#elif (MEMMODEL == COMPACT || MEMMODEL == LARGE)
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#define portRESTORE_CONTEXT() \
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#define portSAVE_CONTEXT() \
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{ __asm(" MOVW A, _pxCurrentTCB "); \
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{ __asm(" POPW A "); \
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__asm(" MOVW A, @A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" MOVW SP, A "); \
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__asm(" OR CCR,#H'20 "); \
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\
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__asm(" POPW A "); \
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/* Load the saves uxCriticalNesting value into RW0. */ \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW (RW0) "); \
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__asm(" PUSHW A "); \
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\
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__asm(" OR CCR,#H'20 "); \
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/* Save the loaded value into the uxCriticalNesting variable. */ \
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__asm(" POPW A "); \
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__asm(" MOVW _uxCriticalNesting, RW0 "); \
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__asm(" AND CCR,#H'DF "); \
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\
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__asm(" PUSHW A "); \
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__asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" POPW A "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW A "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" POPW A "); \
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__asm(" MOVL A, _pxCurrentTCB "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" MOVL RL2, A "); \
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__asm(" PUSHW A "); \
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__asm(" MOVW A, SP "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" MOVW @RL2+0, A "); \
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__asm(" POPW A "); \
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__asm(" MOV A, USB "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" MOV @RL2+2, A "); \
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__asm(" PUSHW A "); \
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}
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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}
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#define portRESTORE_CONTEXT() \
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#elif (configMEMMODEL == portCOMPACT || configMEMMODEL == portLARGE)
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{ __asm(" MOVL A, _pxCurrentTCB "); \
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__asm(" MOVL RL2, A "); \
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#define portSAVE_CONTEXT() \
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__asm(" MOVW A, @RL2+0 "); \
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{ __asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" MOVW SP, A "); \
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__asm(" PUSHW A "); \
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__asm(" MOV A, @RL2+2 "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" MOV USB, A "); \
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__asm(" POPW A "); \
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__asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" POPW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" PUSHW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" PUSHW A "); \
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__asm(" MOVL A, _pxCurrentTCB "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" MOVL RL2, A "); \
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__asm(" POPW A "); \
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__asm(" MOVW A, SP "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" MOVW @RL2+0, A "); \
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__asm(" PUSHW A "); \
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__asm(" MOV A, USB "); \
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}
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__asm(" MOV @RL2+2, A "); \
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}
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#define portRESTORE_CONTEXT() \
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{ __asm(" MOVL A, _pxCurrentTCB "); \
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__asm(" MOVL RL2, A "); \
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__asm(" MOVW A, @RL2+0 "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" MOVW SP, A "); \
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__asm(" MOV A, @RL2+2 "); \
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__asm(" MOV USB, A "); \
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__asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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__asm(" AND CCR,#H'DF "); \
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__asm(" POPW A "); \
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__asm(" OR CCR,#H'20 "); \
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__asm(" PUSHW A "); \
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}
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#endif
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#endif
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -245,50 +263,52 @@ portCHAR Get_RP(void);
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*/
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*/
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#pragma asm
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#pragma asm
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.GLOBAL _Get_DPR_ADB_bank
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.GLOBAL _Get_DTB_PCB_bank
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.GLOBAL _xGet_DPR_ADB_bank
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.GLOBAL _Get_RP
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.GLOBAL _xGet_DTB_PCB_bank
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.GLOBAL _xGet_RP
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.SECTION CODE, CODE, ALIGN=1
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.SECTION CODE, CODE, ALIGN=1
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_Get_DPR_ADB_bank:
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_xGet_DPR_ADB_bank:
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MOV A, DPR
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MOV A, DPR
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SWAP
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SWAP
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MOV A, ADB
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MOV A, ADB
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ORW A
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ORW A
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#if MEMMODEL == MEDIUM || MEMMODEL == LARGE
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#if configMEMMODEL == portMEDIUM || configMEMMODEL == portLARGE
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RETP
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RETP
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#elif MEMMODEL == SMALL || MEMMODEL == COMPACT
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#elif configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
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RET
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RET
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#endif
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#endif
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_xGet_DTB_PCB_bank:
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_Get_DTB_PCB_bank:
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MOV A, DTB
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MOV A, DTB
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SWAP
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SWAP
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MOV A, PCB
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MOV A, PCB
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ORW A
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ORW A
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#if MEMMODEL == MEDIUM || MEMMODEL == LARGE
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#if configMEMMODEL == portMEDIUM || configMEMMODEL == portLARGE
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RETP
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RETP
|
||||||
#elif MEMMODEL == SMALL || MEMMODEL == COMPACT
|
#elif configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
|
||||||
RET
|
RET
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
_xGet_RP:
|
||||||
|
|
||||||
_Get_RP:
|
|
||||||
PUSHW PS
|
PUSHW PS
|
||||||
POPW A
|
POPW A
|
||||||
SWAP
|
SWAP
|
||||||
ANDW A,#0x1f
|
ANDW A,#0x1f
|
||||||
#if MEMMODEL == MEDIUM || MEMMODEL == LARGE
|
#if configMEMMODEL == portMEDIUM || configMEMMODEL == portLARGE
|
||||||
RETP
|
RETP
|
||||||
#elif MEMMODEL == SMALL || MEMMODEL == COMPACT
|
#elif configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
|
||||||
RET
|
RET
|
||||||
#endif
|
#endif
|
||||||
#pragma endasm
|
|
||||||
/*-----------------------------------------------------------*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Sets up the periodic ISR used for the RTOS tick. This uses RLT0, but
|
#pragma endasm
|
||||||
* can be done using any given RLT.
|
|
||||||
*/
|
|
||||||
static void prvSetupRLT0Interrupt( void );
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -301,7 +321,6 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
|
||||||
{
|
{
|
||||||
/* Place a few bytes of known values on the bottom of the stack.
|
/* Place a few bytes of known values on the bottom of the stack.
|
||||||
This is just useful for debugging. */
|
This is just useful for debugging. */
|
||||||
|
|
||||||
*pxTopOfStack = 0x1111;
|
*pxTopOfStack = 0x1111;
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
*pxTopOfStack = 0x2222;
|
*pxTopOfStack = 0x2222;
|
||||||
|
@ -309,69 +328,75 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
|
||||||
*pxTopOfStack = 0x3333;
|
*pxTopOfStack = 0x3333;
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* Once the task is called the called would push the pointer to the
|
/* Once the task is called the task would push the pointer to the
|
||||||
parameter on to the stack. Hence here the pointer would be copied first
|
parameter on to the stack. Hence here the pointer would be copied first
|
||||||
to the stack. In case of COMPACT or LARGE memory model such pointer
|
to the stack. In case of COMPACT or LARGE memory model such pointer
|
||||||
would be 24 bit and in case of SMALL or MEDIUM memory model such pointer
|
would be 24 bit and in case of SMALL or MEDIUM memory model such pointer
|
||||||
would be 16 bit */
|
would be 16 bit */
|
||||||
#if MEMMODEL == COMPACT || MEMMODEL == LARGE
|
#if( ( configMEMMODEL == portCOMPACT ) || ( configMEMMODEL == portLARGE ) )
|
||||||
*pxTopOfStack = (portSTACK_TYPE)((portLONG)(pvParameters)>>16);
|
{
|
||||||
pxTopOfStack--;
|
*pxTopOfStack = ( portSTACK_TYPE ) ( ( unsigned portLONG ) ( pvParameters ) >> 16 );
|
||||||
#endif
|
pxTopOfStack--;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
*pxTopOfStack = (portSTACK_TYPE)(pvParameters);
|
*pxTopOfStack = ( portSTACK_TYPE ) ( pvParameters );
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* This is redundant push to the stack. This is required in order to introduce
|
/* This is redundant push to the stack. This is required in order to introduce
|
||||||
an offset so that the task accesses a parameter correctly that is passed on to
|
an offset so that the task accesses a parameter correctly that is passed on to
|
||||||
the task stack. */
|
the task stack. */
|
||||||
#if MEMMODEL == MEDIUM || MEMMODEL == LARGE
|
#if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )
|
||||||
*pxTopOfStack = (Get_DTB_PCB_bank() & 0xff00) |
|
{
|
||||||
(((portLONG)(pxCode) >>16) & 0xff);
|
*pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( portLONG ) ( pxCode ) >> 16 ) & 0xff );
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
#endif
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/* This is redundant push to the stack. This is required in order to introduce
|
/* This is redundant push to the stack. This is required in order to introduce
|
||||||
an offset so that the task accesses a parameter correctly that is passed on to
|
an offset so that the task accesses a parameter correctly that is passed on to
|
||||||
the task stack. */
|
the task stack. */
|
||||||
*pxTopOfStack = ( portSTACK_TYPE )(pxCode);
|
*pxTopOfStack = ( portSTACK_TYPE ) ( pxCode );
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* PS - User Mode, ILM=7, RB=0, Interrupts enabled,USP */
|
/* PS - User Mode, ILM=7, RB=0, Interrupts enabled,USP */
|
||||||
*pxTopOfStack = 0xE0C0;
|
*pxTopOfStack = 0xE0C0;
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* PC */
|
/* PC */
|
||||||
*pxTopOfStack = ( portSTACK_TYPE )(pxCode);
|
*pxTopOfStack = ( portSTACK_TYPE ) ( pxCode );
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* DTB | PCB */
|
/* DTB | PCB */
|
||||||
#if MEMMODEL == SMALL || MEMMODEL == COMPACT
|
#if configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
|
||||||
*pxTopOfStack = Get_DTB_PCB_bank();
|
{
|
||||||
pxTopOfStack--;
|
*pxTopOfStack = xGet_DTB_PCB_bank();
|
||||||
#endif
|
pxTopOfStack--;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/* DTB | PCB, in case of MEDIUM or LARGE memory model PCB would be used
|
/* DTB | PCB, in case of portMEDIUM or portLARGE memory model PCB would be used
|
||||||
along with PC to indicate the start address of the functiom */
|
along with PC to indicate the start address of the functiom */
|
||||||
#if MEMMODEL == MEDIUM || MEMMODEL == LARGE
|
#if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )
|
||||||
*pxTopOfStack = (Get_DTB_PCB_bank() & 0xff00) |
|
{
|
||||||
(((portLONG)(pxCode) >>16) & 0xff);
|
*pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( portLONG ) ( pxCode ) >> 16 ) & 0xff );
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
#endif
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/* DPR | ADB */
|
/* DPR | ADB */
|
||||||
*pxTopOfStack = Get_DPR_ADB_bank();
|
*pxTopOfStack = xGet_DPR_ADB_bank();
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* AL */
|
/* AL */
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x9999;
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x9999;
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* AH */
|
/* AH */
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA;
|
*pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA;
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* Next the general purpose registers. */
|
/* Next the general purpose registers. */
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x7777; /* RW7 */
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x7777; /* RW7 */
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x6666; /* RW6 */
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x6666; /* RW6 */
|
||||||
|
@ -387,13 +412,16 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x1111; /* RW1 */
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x1111; /* RW1 */
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x8888; /* RW0 */
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x8888; /* RW0 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
|
||||||
|
/* The task starts with its uxCriticalNesting variable set to 0, interrupts
|
||||||
|
being enabled. */
|
||||||
|
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||||
|
|
||||||
return pxTopOfStack;
|
return pxTopOfStack;
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
/*
|
|
||||||
* Setup RLT0 to generate a tick interrupt.
|
|
||||||
*/
|
|
||||||
static void prvSetupRLT0Interrupt( void )
|
static void prvSetupRLT0Interrupt( void )
|
||||||
{
|
{
|
||||||
/* set reload value = 34999+1, TICK Interrupt after 10 ms @ 56MHz of CLKP1 */
|
/* set reload value = 34999+1, TICK Interrupt after 10 ms @ 56MHz of CLKP1 */
|
||||||
|
@ -403,9 +431,7 @@ static void prvSetupRLT0Interrupt( void )
|
||||||
TMCSR0 = 0x041B;
|
TMCSR0 = 0x041B;
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
/*
|
|
||||||
* Start the scheduler.
|
|
||||||
*/
|
|
||||||
portBASE_TYPE xPortStartScheduler( void )
|
portBASE_TYPE xPortStartScheduler( void )
|
||||||
{
|
{
|
||||||
/* Setup the hardware to generate the tick. */
|
/* Setup the hardware to generate the tick. */
|
||||||
|
@ -427,8 +453,8 @@ portBASE_TYPE xPortStartScheduler( void )
|
||||||
|
|
||||||
void vPortEndScheduler( void )
|
void vPortEndScheduler( void )
|
||||||
{
|
{
|
||||||
/* It is unlikely that the AVR port will get stopped. If required simply
|
/* Not implemented - unlikely to ever be required as there is nothing to
|
||||||
disable the tick interrupt here. */
|
return to. */
|
||||||
}
|
}
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
@ -488,6 +514,7 @@ void vPortEndScheduler( void )
|
||||||
|
|
||||||
vTaskIncrementTick();
|
vTaskIncrementTick();
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
@ -508,6 +535,7 @@ __nosavereg __interrupt void vPortYield( void )
|
||||||
/* Restore the context of the new task. */
|
/* Restore the context of the new task. */
|
||||||
portRESTORE_CONTEXT();
|
portRESTORE_CONTEXT();
|
||||||
}
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
__nosavereg __interrupt void vPortYieldDelayed( void )
|
__nosavereg __interrupt void vPortYieldDelayed( void )
|
||||||
{
|
{
|
||||||
|
@ -535,3 +563,30 @@ __nosavereg __interrupt void vPortYieldDelayed( void )
|
||||||
/* Enable interrupts */
|
/* Enable interrupts */
|
||||||
__EI();
|
__EI();
|
||||||
}
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEnterCritical( void )
|
||||||
|
{
|
||||||
|
/* Disable interrupts */
|
||||||
|
portDISABLE_INTERRUPTS();
|
||||||
|
|
||||||
|
/* Now interrupts are disabled uxCriticalNesting can be accessed
|
||||||
|
directly. Increment uxCriticalNesting to keep a count of how many times
|
||||||
|
portENTER_CRITICAL() has been called. */
|
||||||
|
uxCriticalNesting++;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortExitCritical( void )
|
||||||
|
{
|
||||||
|
if( uxCriticalNesting > portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
uxCriticalNesting--;
|
||||||
|
if( uxCriticalNesting == portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
/* Enable all interrupt/exception. */
|
||||||
|
portENABLE_INTERRUPTS();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
|
@ -44,6 +44,10 @@
|
||||||
#ifndef PORTMACRO_H
|
#ifndef PORTMACRO_H
|
||||||
#define PORTMACRO_H
|
#define PORTMACRO_H
|
||||||
|
|
||||||
|
#include "mb96348hs.h"
|
||||||
|
#include <stddef.h>
|
||||||
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------
|
/*-----------------------------------------------------------
|
||||||
* Port specific definitions.
|
* Port specific definitions.
|
||||||
*
|
*
|
||||||
|
@ -59,12 +63,9 @@
|
||||||
#define portFLOAT float
|
#define portFLOAT float
|
||||||
#define portDOUBLE double
|
#define portDOUBLE double
|
||||||
#define portLONG long
|
#define portLONG long
|
||||||
#define portSHORT int
|
#define portSHORT short
|
||||||
#define portSTACK_TYPE unsigned portSHORT
|
#define portSTACK_TYPE unsigned portSHORT
|
||||||
#define portBASE_TYPE char
|
#define portBASE_TYPE portSHORT
|
||||||
|
|
||||||
/* This is required since SOFTUNE doesn't support inline directive as is. */
|
|
||||||
#define inline
|
|
||||||
|
|
||||||
#if( configUSE_16_BIT_TICKS == 1 )
|
#if( configUSE_16_BIT_TICKS == 1 )
|
||||||
typedef unsigned portSHORT portTickType;
|
typedef unsigned portSHORT portTickType;
|
||||||
|
@ -75,21 +76,11 @@
|
||||||
#endif
|
#endif
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
#define portDISABLE_INTERRUPTS() __DI();
|
/* Critical section handling. */
|
||||||
|
#define portDISABLE_INTERRUPTS() __DI();
|
||||||
#define portENABLE_INTERRUPTS() __EI();
|
#define portENABLE_INTERRUPTS() __EI();
|
||||||
|
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||||
/*-----------------------------------------------------------*/
|
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||||
|
|
||||||
#define portENTER_CRITICAL() \
|
|
||||||
{ __asm(" PUSHW PS "); \
|
|
||||||
portDISABLE_INTERRUPTS(); \
|
|
||||||
}
|
|
||||||
|
|
||||||
#define portEXIT_CRITICAL() \
|
|
||||||
{ __asm(" POPW PS "); \
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
@ -103,8 +94,8 @@
|
||||||
/* portYIELD() uses SW interrupt */
|
/* portYIELD() uses SW interrupt */
|
||||||
#define portYIELD() __asm( " INT #122 " );
|
#define portYIELD() __asm( " INT #122 " );
|
||||||
|
|
||||||
/* portYIELD() uses delayed interrupt */
|
/* portYIELD_FROM_ISR() uses delayed interrupt */
|
||||||
#define portYIELDFromISR() __asm (" SETB 03A4H:0 ");
|
#define portYIELD_FROM_ISR() __asm( " SETB 03A4H:0 " );
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||||
|
@ -113,5 +104,8 @@
|
||||||
|
|
||||||
#define portMINIMAL_STACK_SIZE configMINIMAL_STACK_SIZE
|
#define portMINIMAL_STACK_SIZE configMINIMAL_STACK_SIZE
|
||||||
|
|
||||||
|
/* Remove the inline declaration from within the kernel code. */
|
||||||
|
#define inline
|
||||||
|
|
||||||
#endif /* PORTMACRO_H */
|
#endif /* PORTMACRO_H */
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue