mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
This commit is contained in:
Richard Barry
parent
4894955a08
commit
0f6b0d3a59
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@ -143,6 +143,10 @@ context. */
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#define portINTERRUPT_ENABLE_BIT ( 0x80UL )
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#define portTHUMB_MODE_ADDRESS ( 0x01UL )
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/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
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point is zero. */
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#define portBINARY_POINT_BITS ( ( unsigned char ) 0x03 )
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/* Masks all bits in the APSR other than the mode bits. */
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#define portAPSR_MODE_BITS_MASK ( 0x1F )
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@ -177,11 +181,6 @@ the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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volatile unsigned long ulCriticalNesting = 9999UL;
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/* The value to be written to the interrupt controllers priority mask register
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to mask interrupts that can use the FreeRTOS API without masking higher priority
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interrupts. */
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const unsigned long ulPortAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
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/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
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a floating point context must be saved and restored for the task. */
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unsigned long ulPortTaskHasFPUContext = pdFALSE;
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@ -193,6 +192,7 @@ unsigned long ulPortYieldRequired = pdFALSE;
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if the nesting depth is 0. */
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unsigned long ulPortInterruptNesting = 0UL;
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/*-----------------------------------------------------------*/
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/*
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@ -281,6 +281,13 @@ unsigned long ulAPSR;
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configASSERT( ulAPSR != portAPSR_USER_MODE );
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if( ulAPSR != portAPSR_USER_MODE )
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{
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/* Only continue if the binary point value is set to its lowest possible
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setting. See the comments in vPortValidateInterruptPriority() below for
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more information. */
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configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
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if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
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{
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/* Start the timer that generates the tick ISR. */
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configSETUP_TICK_INTERRUPT();
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@ -288,9 +295,11 @@ unsigned long ulAPSR;
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__enable_irq();
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vPortRestoreTaskContext();
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}
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}
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/* Will only get here if xTaskStartScheduler() was called with the CPU in
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a non-privileged mode. */
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a non-privileged mode or the binary point register was not set to its lowest
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possible value. */
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return 0;
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}
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/*-----------------------------------------------------------*/
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@ -340,7 +349,7 @@ void FreeRTOS_Tick_Handler( void )
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handler runs at the lowest priority, so interrupts cannot already be masked,
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so there is no need to save and restore the current mask value. */
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__disable_irq();
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portICCPMR_PRIORITY_MASK_REGISTER = ulPortAPIPriorityMask;
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portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
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__asm( "DSB \n"
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"ISB \n" );
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__enable_irq();
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@ -383,7 +392,7 @@ unsigned long ulPortSetInterruptMask( void )
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unsigned long ulReturn;
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__disable_irq();
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if( portICCPMR_PRIORITY_MASK_REGISTER == ulPortAPIPriorityMask )
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if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
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{
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/* Interrupts were already masked. */
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ulReturn = pdTRUE;
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@ -391,7 +400,7 @@ unsigned long ulReturn;
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else
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{
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ulReturn = pdFALSE;
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portICCPMR_PRIORITY_MASK_REGISTER = ulPortAPIPriorityMask;
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portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
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__asm( "DSB \n"
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"ISB \n" );
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}
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@ -399,5 +408,45 @@ unsigned long ulReturn;
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return ulReturn;
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}
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/*-----------------------------------------------------------*/
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#if( configASSERT_DEFINED == 1 )
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void vPortValidateInterruptPriority( void )
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{
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/* The following assertion will fail if a service routine (ISR) for
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an interrupt that has been assigned a priority above
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configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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function. ISR safe FreeRTOS API functions must *only* be called
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from interrupts that have been assigned a priority at or below
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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Numerically low interrupt priority numbers represent logically high
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interrupt priorities, therefore the priority of the interrupt must
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be set to a value equal to or numerically *higher* than
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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FreeRTOS maintains separate thread and ISR API functions to ensure
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interrupt entry is as fast and simple as possible.
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The following links provide detailed information:
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http://www.freertos.org/RTOS-Cortex-M3-M4.html
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http://www.freertos.org/FAQHelp.html */
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configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
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/* Priority grouping: The interrupt controller (GIC) allows the bits
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that define each interrupt's priority to be split between bits that
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define the interrupt's pre-emption priority bits and bits that define
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the interrupt's sub-priority. For simplicity all bits must be defined
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to be pre-emption priority bits. The following assertion will fail if
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this is not the case (if some bits represent a sub-priority).
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The priority grouping is configured by the GIC's binary point register
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(ICCBPR). Writting 0 to ICCBPR will ensure it is set to its lowest
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possible value (which may be above 0). */
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configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
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}
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#endif /* configASSERT_DEFINED */
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@ -77,13 +77,14 @@
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/* IAR includes. */
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#ifdef __ICCARM__
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#include <intrinsics.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-----------------------------------------------------------
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the given hardware
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@ -93,83 +94,83 @@ extern "C" {
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned long
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#define portBASE_TYPE portLONG
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typedef unsigned long portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned long
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#define portBASE_TYPE portLONG
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typedef unsigned long portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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/* Task utilities. */
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/* Called at the end of an ISR that can cause a context switch. */
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#define portEND_SWITCHING_ISR( xSwitchRequired )\
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{ \
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extern unsigned long ulPortYieldRequired; \
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/* Called at the end of an ISR that can cause a context switch. */
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#define portEND_SWITCHING_ISR( xSwitchRequired )\
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{ \
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extern unsigned long ulPortYieldRequired; \
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\
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if( xSwitchRequired != pdFALSE ) \
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{ \
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ulPortYieldRequired = pdTRUE; \
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} \
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}
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}
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portYIELD() __asm( "SWI 0" );
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portYIELD() __asm( "SWI 0" );
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/*-----------------------------------------------------------
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/*-----------------------------------------------------------
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* Critical section control
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*----------------------------------------------------------*/
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern unsigned long ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern unsigned long ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
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/* These macros do not globally disable/enable interrupts. They do mask off
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interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
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/* These macros do not globally disable/enable interrupts. They do mask off
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interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
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not required for this port but included in case common demo code that uses these
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macros is used. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
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not required for this port but included in case common demo code that uses these
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macros is used. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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/* Prototype of the FreeRTOS tick handler. This must be installed as the
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handler for whichever peripheral is used to generate the RTOS tick. */
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void FreeRTOS_Tick_Handler( void );
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/* Prototype of the FreeRTOS tick handler. This must be installed as the
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handler for whichever peripheral is used to generate the RTOS tick. */
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void FreeRTOS_Tick_Handler( void );
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/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
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before any floating point instructions are executed. */
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void vPortTaskUsesFPU( void );
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
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before any floating point instructions are executed. */
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void vPortTaskUsesFPU( void );
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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#define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
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#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
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#define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
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#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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@ -179,29 +180,42 @@ void vPortTaskUsesFPU( void );
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#ifdef __cplusplus
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}
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#endif
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#ifdef configASSERT
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void vPortValidateInterruptPriority( void );
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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#else
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()
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#endif
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#define portNOP() __asm volatile( "NOP" )
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ICCARM__ */
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#define portNOP() __asm volatile( "NOP" )
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/* The number of bits to shift for an interrupt priority is dependent on the
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number of bits implemented by the interrupt controller. */
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#if configUNIQUE_INTERRUPT_PRIORITIES == 16
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#define portPRIORITY_SHIFT 4
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#define portMAX_BINARY_POINT_VALUE 3
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
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#define portPRIORITY_SHIFT 3
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#define portMAX_BINARY_POINT_VALUE 2
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
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#define portPRIORITY_SHIFT 2
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#define portMAX_BINARY_POINT_VALUE 1
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
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#define portPRIORITY_SHIFT 1
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#define portMAX_BINARY_POINT_VALUE 0
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#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
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#define portPRIORITY_SHIFT 0
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#define portMAX_BINARY_POINT_VALUE 0
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#else
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#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
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#endif
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@ -210,12 +224,16 @@ number of bits implemented by the interrupt controller. */
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#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
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#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
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#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
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#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )
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#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )
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#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
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#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
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#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
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#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
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#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
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#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
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#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
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#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
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#endif /* PORTMACRO_H */
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@ -95,8 +95,11 @@ task.h is included from an application file. */
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/* Block sizes must not get too small. */
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#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
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/* Assumes 8bit bytes! */
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#define heapBITS_PER_BYTE ( ( size_t ) 8 )
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/* A few bytes might be lost to byte aligning the heap start address. */
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#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
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#define heapADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
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/* Allocate the memory for the heap. */
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static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
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@ -132,16 +135,20 @@ block must by correctly byte aligned. */
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static const unsigned short heapSTRUCT_SIZE = ( ( sizeof ( xBlockLink ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
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/* Ensure the pxEnd pointer will end up on the correct byte alignment. */
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static const size_t xTotalHeapSize = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
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static const size_t xTotalHeapSize = ( ( size_t ) heapADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
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/* Create a couple of list links to mark the start and end of the list. */
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static xBlockLink xStart, *pxEnd = NULL;
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/* Keeps track of the number of free bytes remaining, but says nothing about
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fragmentation. */
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static size_t xFreeBytesRemaining = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
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static size_t xFreeBytesRemaining = ( ( size_t ) heapADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
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/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */
|
||||
/* Gets set to the top bit of an size_t type. When this bit in the xBlockSize
|
||||
member of an xBlockLink structure is set then the block belongs to the
|
||||
application. When the bit is free the block is still part of the free heap
|
||||
space. */
|
||||
static size_t xBlockAllocatedBit = 0;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -159,14 +166,20 @@ void *pvReturn = NULL;
|
|||
prvHeapInit();
|
||||
}
|
||||
|
||||
/* Check the requested block size is not so large that the top bit is
|
||||
set. The top bit of the block size member of the xBlockLink structure
|
||||
is used to determine who owns the block - the application or the
|
||||
kernel, so it must be free. */
|
||||
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
|
||||
{
|
||||
/* The wanted size is increased so it can contain a xBlockLink
|
||||
structure in addition to the requested amount of bytes. */
|
||||
if( xWantedSize > 0 )
|
||||
{
|
||||
xWantedSize += heapSTRUCT_SIZE;
|
||||
|
||||
/* Ensure that blocks are always aligned to the required number of
|
||||
bytes. */
|
||||
/* Ensure that blocks are always aligned to the required number
|
||||
of bytes. */
|
||||
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
|
||||
{
|
||||
/* Byte alignment required. */
|
||||
|
|
@ -174,10 +187,10 @@ void *pvReturn = NULL;
|
|||
}
|
||||
}
|
||||
|
||||
if( ( xWantedSize > 0 ) && ( xWantedSize < xTotalHeapSize ) )
|
||||
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
|
||||
{
|
||||
/* Traverse the list from the start (lowest address) block until one
|
||||
of adequate size is found. */
|
||||
/* Traverse the list from the start (lowest address) block until
|
||||
one of adequate size is found. */
|
||||
pxPreviousBlock = &xStart;
|
||||
pxBlock = xStart.pxNextFreeBlock;
|
||||
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
|
||||
|
|
@ -186,28 +199,30 @@ void *pvReturn = NULL;
|
|||
pxBlock = pxBlock->pxNextFreeBlock;
|
||||
}
|
||||
|
||||
/* If the end marker was reached then a block of adequate size was
|
||||
not found. */
|
||||
/* If the end marker was reached then a block of adequate size
|
||||
was not found. */
|
||||
if( pxBlock != pxEnd )
|
||||
{
|
||||
/* Return the memory space - jumping over the xBlockLink structure
|
||||
at its start. */
|
||||
/* Return the memory space pointed to - jumping over the
|
||||
xBlockLink structure at its start. */
|
||||
pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
|
||||
|
||||
/* This block is being returned for use so must be taken out of
|
||||
the list of free blocks. */
|
||||
/* This block is being returned for use so must be taken out
|
||||
of the list of free blocks. */
|
||||
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
|
||||
|
||||
/* If the block is larger than required it can be split into two. */
|
||||
/* If the block is larger than required it can be split into
|
||||
two. */
|
||||
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
|
||||
{
|
||||
/* This block is to be split into two. Create a new block
|
||||
following the number of bytes requested. The void cast is
|
||||
used to prevent byte alignment warnings from the compiler. */
|
||||
/* This block is to be split into two. Create a new
|
||||
block following the number of bytes requested. The void
|
||||
cast is used to prevent byte alignment warnings from the
|
||||
compiler. */
|
||||
pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );
|
||||
|
||||
/* Calculate the sizes of two blocks split from the single
|
||||
block. */
|
||||
/* Calculate the sizes of two blocks split from the
|
||||
single block. */
|
||||
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
|
||||
pxBlock->xBlockSize = xWantedSize;
|
||||
|
||||
|
|
@ -216,6 +231,12 @@ void *pvReturn = NULL;
|
|||
}
|
||||
|
||||
xFreeBytesRemaining -= pxBlock->xBlockSize;
|
||||
|
||||
/* The block is being returned - it is allocated and owned
|
||||
by the application and has no "next" block. */
|
||||
pxBlock->xBlockSize |= xBlockAllocatedBit;
|
||||
pxBlock->pxNextFreeBlock = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -249,6 +270,18 @@ xBlockLink *pxLink;
|
|||
/* This casting is to keep the compiler from issuing warnings. */
|
||||
pxLink = ( void * ) puc;
|
||||
|
||||
/* Check the block is actually allocated. */
|
||||
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
|
||||
configASSERT( pxLink->pxNextFreeBlock == NULL );
|
||||
|
||||
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
|
||||
{
|
||||
if( pxLink->pxNextFreeBlock == NULL )
|
||||
{
|
||||
/* The block is being returned to the heap - it is no longer
|
||||
allocated. */
|
||||
pxLink->xBlockSize &= ~xBlockAllocatedBit;
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
/* Add this block to the list of free blocks. */
|
||||
|
|
@ -257,6 +290,8 @@ xBlockLink *pxLink;
|
|||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -302,6 +337,9 @@ unsigned char *pucHeapEnd, *pucAlignedHeap;
|
|||
|
||||
/* The heap now contains pxEnd. */
|
||||
xFreeBytesRemaining -= heapSTRUCT_SIZE;
|
||||
|
||||
/* Work out the position of the top bit in a size_t variable. */
|
||||
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -123,14 +123,19 @@
|
|||
number of bits implemented by the interrupt controller. */
|
||||
#if configUNIQUE_INTERRUPT_PRIORITIES == 16
|
||||
#define portPRIORITY_SHIFT 4
|
||||
#define portMAX_BINARY_POINT_VALUE 3
|
||||
#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
|
||||
#define portPRIORITY_SHIFT 3
|
||||
#define portMAX_BINARY_POINT_VALUE 2
|
||||
#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
|
||||
#define portPRIORITY_SHIFT 2
|
||||
#define portMAX_BINARY_POINT_VALUE 1
|
||||
#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
|
||||
#define portPRIORITY_SHIFT 1
|
||||
#define portMAX_BINARY_POINT_VALUE 0
|
||||
#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
|
||||
#define portPRIORITY_SHIFT 0
|
||||
#define portMAX_BINARY_POINT_VALUE 0
|
||||
#else
|
||||
#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
|
||||
#endif
|
||||
|
|
@ -154,11 +159,19 @@ context. */
|
|||
#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
|
||||
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
|
||||
#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
|
||||
#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )
|
||||
#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )
|
||||
#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
|
||||
#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
|
||||
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
|
||||
#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
|
||||
#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
|
||||
#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
|
||||
#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
|
||||
|
||||
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
|
||||
point is zero. */
|
||||
#define portBINARY_POINT_BITS ( ( unsigned char ) 0x03 )
|
||||
|
||||
/* Constants required to setup the initial task context. */
|
||||
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
|
|
@ -200,11 +213,6 @@ the scheduler starts. As it is stored as part of the task context it will
|
|||
automatically be set to 0 when the first task is started. */
|
||||
volatile unsigned long ulCriticalNesting = 9999UL;
|
||||
|
||||
/* The value to be written to the interrupt controllers priority mask register
|
||||
to mask interrupts that can use the FreeRTOS API without masking higher priority
|
||||
interrupts. */
|
||||
const unsigned long ulPortAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
|
||||
|
||||
/* Used to pass constants into the ASM code. The address at which variables are
|
||||
placed is the constant value so indirect loads in the asm code are not
|
||||
required. */
|
||||
|
|
@ -312,6 +320,13 @@ unsigned long ulAPSR;
|
|||
configASSERT( ulAPSR != portAPSR_USER_MODE );
|
||||
|
||||
if( ulAPSR != portAPSR_USER_MODE )
|
||||
{
|
||||
/* Only continue if the binary point value is set to its lowest possible
|
||||
setting. See the comments in vPortValidateInterruptPriority() below for
|
||||
more information. */
|
||||
configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
|
||||
|
||||
if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. */
|
||||
configSETUP_TICK_INTERRUPT();
|
||||
|
|
@ -319,9 +334,11 @@ unsigned long ulAPSR;
|
|||
__enable_irq();
|
||||
vPortRestoreTaskContext();
|
||||
}
|
||||
}
|
||||
|
||||
/* Will only get here if xTaskStartScheduler() was called with the CPU in
|
||||
a non-privileged mode. */
|
||||
a non-privileged mode or the binary point register was not set to its lowest
|
||||
possible value. */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -371,7 +388,7 @@ void FreeRTOS_Tick_Handler( void )
|
|||
handler runs at the lowest priority, so interrupts cannot already be masked,
|
||||
so there is no need to save and restore the current mask value. */
|
||||
__disable_irq();
|
||||
portICCPMR_PRIORITY_MASK_REGISTER = ulPortAPIPriorityMask;
|
||||
portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
|
||||
__asm( "DSB \n"
|
||||
"ISB \n" );
|
||||
__enable_irq();
|
||||
|
|
@ -414,7 +431,7 @@ unsigned long ulPortSetInterruptMask( void )
|
|||
unsigned long ulReturn;
|
||||
|
||||
__disable_irq();
|
||||
if( portICCPMR_PRIORITY_MASK_REGISTER == ulPortAPIPriorityMask )
|
||||
if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
|
||||
{
|
||||
/* Interrupts were already masked. */
|
||||
ulReturn = pdTRUE;
|
||||
|
|
@ -422,7 +439,7 @@ unsigned long ulReturn;
|
|||
else
|
||||
{
|
||||
ulReturn = pdFALSE;
|
||||
portICCPMR_PRIORITY_MASK_REGISTER = ulPortAPIPriorityMask;
|
||||
portICCPMR_PRIORITY_MASK_REGISTER = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
|
||||
__asm( "DSB \n"
|
||||
"ISB \n" );
|
||||
}
|
||||
|
|
@ -430,5 +447,47 @@ unsigned long ulReturn;
|
|||
|
||||
return ulReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configASSERT_DEFINED == 1 )
|
||||
|
||||
void vPortValidateInterruptPriority( void )
|
||||
{
|
||||
/* The following assertion will fail if a service routine (ISR) for
|
||||
an interrupt that has been assigned a priority above
|
||||
configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
|
||||
function. ISR safe FreeRTOS API functions must *only* be called
|
||||
from interrupts that have been assigned a priority at or below
|
||||
configMAX_SYSCALL_INTERRUPT_PRIORITY.
|
||||
|
||||
Numerically low interrupt priority numbers represent logically high
|
||||
interrupt priorities, therefore the priority of the interrupt must
|
||||
be set to a value equal to or numerically *higher* than
|
||||
configMAX_SYSCALL_INTERRUPT_PRIORITY.
|
||||
|
||||
FreeRTOS maintains separate thread and ISR API functions to ensure
|
||||
interrupt entry is as fast and simple as possible.
|
||||
|
||||
The following links provide detailed information:
|
||||
http://www.freertos.org/RTOS-Cortex-M3-M4.html
|
||||
http://www.freertos.org/FAQHelp.html */
|
||||
configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
|
||||
|
||||
/* Priority grouping: The interrupt controller (GIC) allows the bits
|
||||
that define each interrupt's priority to be split between bits that
|
||||
define the interrupt's pre-emption priority bits and bits that define
|
||||
the interrupt's sub-priority. For simplicity all bits must be defined
|
||||
to be pre-emption priority bits. The following assertion will fail if
|
||||
this is not the case (if some bits represent a sub-priority).
|
||||
|
||||
The priority grouping is configured by the GIC's binary point register
|
||||
(ICCBPR). Writting 0 to ICCBPR will ensure it is set to its lowest
|
||||
possible value (which may be above 0). */
|
||||
configASSERT( portICCBPR_BINARY_POINT_REGISTER <= portMAX_BINARY_POINT_VALUE );
|
||||
}
|
||||
|
||||
#endif /* configASSERT_DEFINED */
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -182,6 +182,13 @@ void vPortTaskUsesFPU( void );
|
|||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
#ifdef configASSERT
|
||||
void vPortValidateInterruptPriority( void );
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
|
||||
#else
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()
|
||||
#endif
|
||||
|
||||
#define portNOP() __nop()
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
Loading…
Reference in a new issue