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Add nesting support.
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@ -59,139 +59,181 @@
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/******************************************************************/
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/******************************************************************/
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.macro portSAVE_CONTEXT
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.macro portSAVE_CONTEXT
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/* Make room for the context. */
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/* Make room for the context. First save the current status so we can
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manipulate it, and the cause and EPC registers so we capture their
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/* Get interrupts above the kernel priority enabled again ASAP. First
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original values in case of interrupt nesting. */
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save the current status so we can manipulate it, and the cause and EPC
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registers so we capture their original values in case of interrupt nesting. */
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mfc0 k0, _CP0_CAUSE
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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addiu sp, sp, -portCONTEXT_SIZE
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sw k0, portCAUSE_STACK_LOCATION(sp)
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sw k0, portCAUSE_STACK_LOCATION(sp)
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mfc0 k1, _CP0_STATUS
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mfc0 k1, _CP0_STATUS
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/* Also save s6 so we can use it during this interrupt. Any
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nesting interrupts should maintain the values of this register
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/* Also save s6 and s5 so we can use them during this interrupt. Any
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nesting interrupts should maintain the values of these registers
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accross the ISR. */
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accross the ISR. */
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sw s6, 44(sp)
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Enable interrupts above the current priority. SysCall interrupts
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enable priorities above configKERNEL_INTERRUPT_PRIORITY, so first
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check if the interrupt was a system call (32). */
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add s6, zero, k0
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and s6, s6, 32
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beq s6, zero, .+20 /* Not a system call, mask up to the current interrupt priority. */
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nop
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addiu k0, zero, configKERNEL_INTERRUPT_PRIORITY /* Was a system call, mask only to kernel priority. */
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beq zero, zero, .+12
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nop
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srl k0, k0, 0xa
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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/* Load, incrmement, then save the interrupt nesting count. */
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la k0, uxInterruptNesting
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lw s6, (k0)
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addiu s6, s6, 1
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sw s6, 0(k0)
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/* If it was zero, switch to the system stack. If it was not zero then
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we are already using the system stack. s5 holds the old stack value -
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this might be used to determine the cause of a general exception. */
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add s5, zero, sp
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addiu s6, s6, -1
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bne zero, s6, .+20
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nop
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la s6, xISRStackTop
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lw sp, (s6)
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/* s6 holds the EPC value, we may want this during the context switch. */
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/* s6 holds the EPC value, we may want this during the context switch. */
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mfc0 s6, _CP0_EPC
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mfc0 s6, _CP0_EPC
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/* Enable interrupts above the kernel priority. */
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/* Re-enable interrupts. */
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addiu k0, zero, configKERNEL_INTERRUPT_PRIORITY
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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mtc0 k1, _CP0_STATUS
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. */
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here as it now contains the EPC value. */
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sw ra, 120(sp)
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sw ra, 120(s5)
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sw s8, 116(sp)
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sw s8, 116(s5)
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sw t9, 112(sp)
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sw t9, 112(s5)
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sw t8, 108(sp)
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sw t8, 108(s5)
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sw t7, 104(sp)
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sw t7, 104(s5)
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sw t6, 100(sp)
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sw t6, 100(s5)
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sw t5, 96(sp)
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sw t5, 96(s5)
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sw t4, 92(sp)
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sw t4, 92(s5)
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sw t3, 88(sp)
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sw t3, 88(s5)
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sw t2, 84(sp)
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sw t2, 84(s5)
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sw t1, 80(sp)
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sw t1, 80(s5)
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sw t0, 76(sp)
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sw t0, 76(s5)
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sw a3, 72(sp)
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sw a3, 72(s5)
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sw a2, 68(sp)
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sw a2, 68(s5)
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sw a1, 64(sp)
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sw a1, 64(s5)
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sw a0, 60(sp)
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sw a0, 60(s5)
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sw v1, 56(sp)
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sw v1, 56(s5)
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sw v0, 52(sp)
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sw v0, 52(s5)
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sw s7, 48(sp)
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sw s7, 48(s5)
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sw s6, portEPC_STACK_LOCATION(sp)
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sw s6, portEPC_STACK_LOCATION(s5)
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sw s5, 40(sp)
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/* s5 has already been saved. */
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sw s4, 36(sp)
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sw s4, 36(s5)
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sw s3, 32(sp)
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sw s3, 32(s5)
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sw s2, 28(sp)
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sw s2, 28(s5)
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sw s1, 24(sp)
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sw s1, 24(s5)
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sw s0, 20(sp)
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sw s0, 20(s5)
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sw $1, 16(sp)
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sw $1, 16(s5)
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/* s7 is used as a scratch register. */
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/* s7 is used as a scratch register. */
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mfhi s7
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mfhi s7
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sw s7, 12(sp)
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sw s7, 12(s5)
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mflo s7
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mflo s7
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sw s7, 8(sp)
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sw s7, 8(s5)
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/* Each task maintains its own nesting count. */
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/* Each task maintains its own nesting count. */
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la s7, uxCriticalNesting
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la s7, uxCriticalNesting
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lw s7, (s7)
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lw s7, (s7)
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sw s7, 4(sp)
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sw s7, 4(s5)
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/* Update the TCB stack pointer value */
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/* Update the TCB stack pointer value if the nesting count is 1. */
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la s7, uxInterruptNesting
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lw s7, (s7)
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addiu s7, s7, -1
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bne s7, zero, .+24 /* Dont save the stack pointer to the task or swap stacks. */
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nop
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/* Save the stack pointer to the task. */
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la s7, pxCurrentTCB
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la s7, pxCurrentTCB
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lw s7, (s7)
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lw s7, (s7)
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sw sp, (s7)
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sw s5, (s7)
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/* Switch to the ISR stack, saving the current stack in s5. This might
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be used to determine the cause of a general exception. */
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add s5, zero, sp
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la s7, xISRStackTop
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lw sp, (s7)
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.endm
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.endm
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/******************************************************************/
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/******************************************************************/
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.macro portRESTORE_CONTEXT
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.macro portRESTORE_CONTEXT
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/* Restore the stack pointer from the TCB */
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/* Restore the stack pointer from the TCB. This is only done if the
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nesting count is 1. */
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la s7, uxInterruptNesting
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lw s7, (s7)
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addiu s7, s7, -1
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bne s7, zero, .+24 /* Dont load the stack pointer. */
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nop
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la s0, pxCurrentTCB
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la s0, pxCurrentTCB
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lw s1, (s0)
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lw s0, (s0)
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lw sp, (s1)
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lw s5, (s0)
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/* Restore the context, the first item of which is the critical nesting
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/* Restore the context, the first item of which is the critical nesting
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depth. */
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depth. */
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la s0, uxCriticalNesting
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la s0, uxCriticalNesting
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lw s1, 4(sp)
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lw s1, 4(s5)
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sw s1, (s0)
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sw s1, (s0)
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/* Restore the rest of the context. */
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/* Restore the rest of the context. */
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lw s0, 8(sp)
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lw s0, 8(s5)
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mtlo s0
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mtlo s0
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lw s0, 12(sp)
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lw s0, 12(s5)
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mthi s0
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mthi s0
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lw $1, 16(sp)
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lw $1, 16(s5)
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lw s0, 20(sp)
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lw s0, 20(s5)
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lw s1, 24(sp)
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lw s1, 24(s5)
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lw s2, 28(sp)
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lw s2, 28(s5)
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lw s3, 32(sp)
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lw s3, 32(s5)
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lw s4, 36(sp)
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lw s4, 36(s5)
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lw s5, 40(sp)
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/* s5 is loaded later. */
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lw s6, 44(sp)
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lw s6, 44(s5)
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lw s7, 48(sp)
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lw s7, 48(s5)
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lw v0, 52(sp)
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lw v0, 52(s5)
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lw v1, 56(sp)
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lw v1, 56(s5)
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lw a0, 60(sp)
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lw a0, 60(s5)
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lw a1, 64(sp)
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lw a1, 64(s5)
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lw a2, 68(sp)
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lw a2, 68(s5)
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lw a3, 72(sp)
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lw a3, 72(s5)
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lw t0, 76(sp)
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lw t0, 76(s5)
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lw t1, 80(sp)
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lw t1, 80(s5)
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lw t2, 84(sp)
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lw t2, 84(s5)
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lw t3, 88(sp)
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lw t3, 88(s5)
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lw t4, 92(sp)
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lw t4, 92(s5)
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lw t5, 96(sp)
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lw t5, 96(s5)
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lw t6, 100(sp)
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lw t6, 100(s5)
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lw t7, 104(sp)
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lw t7, 104(s5)
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lw t8, 108(sp)
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lw t8, 108(s5)
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lw t9, 112(sp)
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lw t9, 112(s5)
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lw s8, 116(sp)
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lw s8, 116(s5)
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lw ra, 120(sp)
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lw ra, 120(s5)
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/* Protect access to the k registers. */
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/* Protect access to the k registers, and others. */
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di
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di
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lw k1, portSTATUS_STACK_LOCATION(sp)
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lw k0, portEPC_STACK_LOCATION(sp)
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/* Leave the stack how we found it. */
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/* Decrement the nesting count. */
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la k0, uxInterruptNesting
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lw k1, (k0)
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addiu k1, k1, -1
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sw k1, 0(k0)
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lw k1, portSTATUS_STACK_LOCATION(s5)
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lw k0, portEPC_STACK_LOCATION(s5)
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/* Leave the stack how we found it. First load sp from s5, then restore
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s5 from the stack. */
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add sp, zero, s5
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lw s5, 40(sp)
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addiu sp, sp, portCONTEXT_SIZE
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k1, _CP0_STATUS
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mtc0 k1, _CP0_STATUS
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@ -51,6 +51,9 @@
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* Implementation of functions defined in portable.h for the PIC32MX port.
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* Implementation of functions defined in portable.h for the PIC32MX port.
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*----------------------------------------------------------*/
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*----------------------------------------------------------*/
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/* Library includes. */
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#include <string.h>
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/* Scheduler include files. */
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "task.h"
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@ -71,6 +74,10 @@ the first task is being restored. */
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/* Records the nesting depth of calls to portENTER_CRITICAL(). */
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/* Records the nesting depth of calls to portENTER_CRITICAL(). */
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unsigned portBASE_TYPE uxCriticalNesting = 0x55555555;
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unsigned portBASE_TYPE uxCriticalNesting = 0x55555555;
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/* Records the interrupt nesting depth. This starts at one as it will be
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decremented to 0 when the first task starts. */
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volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
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/* The stack used by interrupt service routines that cause a context switch. */
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/* The stack used by interrupt service routines that cause a context switch. */
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portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
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portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
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@ -180,6 +187,8 @@ portBASE_TYPE xPortStartScheduler( void )
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{
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{
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extern void vPortStartFirstTask( void );
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extern void vPortStartFirstTask( void );
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memset( xISRStack, 0x5a, configISR_STACK_SIZE * sizeof( portSTACK_TYPE ) );
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/* Setup the timer to generate the tick. Interrupts will have been
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/* Setup the timer to generate the tick. Interrupts will have been
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disabled by the time we get here. */
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disabled by the time we get here. */
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prvSetupTimerInterrupt();
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prvSetupTimerInterrupt();
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