mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-01 08:54:14 -04:00
Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
This commit is contained in:
Richard Barry
parent
6b3393b4b6
commit
0d1e12522b
10 changed files with 110 additions and 67 deletions
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@ -237,6 +237,7 @@ void vPortSVCHandler( void )
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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" isb \n"
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" orr r14, #0xd \n"
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@ -256,6 +257,8 @@ static void prvPortStartFirstTask( void )
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" ldr r0, [r0] \n"
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" cpsie i \n" /* Globally enable interrupts. */
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" dsb \n"
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" isb \n"
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" svc 0 \n" /* System call to start first task. */
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" nop \n"
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);
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@ -342,8 +345,9 @@ portBASE_TYPE xPortStartScheduler( void )
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM3 port will require this function as there
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is nothing to return to. */
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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@ -370,6 +374,7 @@ void vPortEnterCritical( void )
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void vPortExitCritical( void )
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{
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configASSERT( uxCriticalNesting );
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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@ -416,6 +421,7 @@ void xPortPendSVHandler( void )
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__asm volatile
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(
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" mrs r0, psp \n"
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" isb \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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@ -435,6 +441,7 @@ void xPortPendSVHandler( void )
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers. */
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" msr psp, r0 \n"
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" isb \n"
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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@ -468,7 +475,7 @@ void xPortSysTickHandler( void )
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__attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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{
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unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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portTickType xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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@ -481,7 +488,7 @@ void xPortSysTickHandler( void )
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is accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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/* Calculate the reload value required to wait xExpectedIdleTime
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tick periods. -1 is used because this code will execute part way
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@ -505,7 +512,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Reset the reload register to the value required for normal tick
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periods. */
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@ -525,7 +532,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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set its parameter to 0 to indicate that its implementation contains
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@ -546,13 +553,14 @@ void xPortSysTickHandler( void )
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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__asm volatile( "cpsie i" );
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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unsigned long ulCalculatedLoadValue;
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@ -604,7 +612,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portENTER_CRITICAL();
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{
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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}
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@ -632,7 +640,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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/* Configure SysTick to interrupt at the requested rate. */
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portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= ( portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
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}
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/*-----------------------------------------------------------*/
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@ -256,6 +256,7 @@ void vPortSVCHandler( void )
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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" isb \n"
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" bx r14 \n"
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@ -274,6 +275,8 @@ static void prvPortStartFirstTask( void )
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" ldr r0, [r0] \n"
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" cpsie i \n" /* Globally enable interrupts. */
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" dsb \n"
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" isb \n"
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" svc 0 \n" /* System call to start first task. */
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" nop \n"
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);
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@ -366,8 +369,9 @@ portBASE_TYPE xPortStartScheduler( void )
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM4F port will require this function as there
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is nothing to return to. */
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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@ -394,6 +398,7 @@ void vPortEnterCritical( void )
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void vPortExitCritical( void )
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{
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configASSERT( uxCriticalNesting );
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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@ -440,6 +445,7 @@ void xPortPendSVHandler( void )
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__asm volatile
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(
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" mrs r0, psp \n"
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" isb \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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@ -470,6 +476,7 @@ void xPortPendSVHandler( void )
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" vldmiaeq r0!, {s16-s31} \n"
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" \n"
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" msr psp, r0 \n"
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" isb \n"
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" \n"
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#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
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#if WORKAROUND_PMU_CM001 == 1
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@ -511,7 +518,7 @@ void xPortSysTickHandler( void )
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__attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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{
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unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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portTickType xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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@ -524,7 +531,7 @@ void xPortSysTickHandler( void )
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is accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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/* Calculate the reload value required to wait xExpectedIdleTime
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tick periods. -1 is used because this code will execute part way
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@ -548,7 +555,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Reset the reload register to the value required for normal tick
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periods. */
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@ -568,7 +575,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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set its parameter to 0 to indicate that its implementation contains
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@ -589,13 +596,14 @@ void xPortSysTickHandler( void )
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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__asm volatile( "cpsie i" );
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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unsigned long ulCalculatedLoadValue;
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@ -647,7 +655,7 @@ void xPortSysTickHandler( void )
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portENTER_CRITICAL();
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{
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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}
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@ -675,7 +683,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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/* Configure SysTick to interrupt at the requested rate. */
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portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG |= ( portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
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}
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/*-----------------------------------------------------------*/
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