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Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.

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Richard Barry 2012-08-14 13:04:22 +00:00
parent e0bab5981a
commit 0c7af1c2d3
12 changed files with 42 additions and 16 deletions
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5
FreeRTOS/Source/portable/Tasking/ARM_CM4F/portmacro.h
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@ -126,10 +126,13 @@ extern void vPortYieldFromISR( void );
/*
* Set basepri back to 0 without effective other registers.
* r0 is clobbered.
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
*/
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x