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Style: Add uncrustify guards, fix asm (#136)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
This commit is contained in:
alfred gedeon
GitHub
parent
a038146915
commit
0afc048cf2
11 changed files with 142 additions and 195 deletions
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@ -281,9 +281,11 @@ void prvSVCHandler( uint32_t * pulParam )
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{
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__asm
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{
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/* *INDENT-OFF* */
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mrs ulReg, control /* Obtain current control value. */
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bic ulReg, # 1 /* Set privilege bit. */
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msr control, ulReg /* Write back new control value. */
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/* *INDENT-ON* */
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}
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}
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@ -292,9 +294,11 @@ void prvSVCHandler( uint32_t * pulParam )
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case portSVC_RAISE_PRIVILEGE:
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__asm
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{
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/* *INDENT-OFF* */
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mrs ulReg, control /* Obtain current control value. */
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bic ulReg, # 1 /* Set privilege bit. */
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msr control, ulReg /* Write back new control value. */
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/* *INDENT-ON* */
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}
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break;
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#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
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@ -338,36 +342,24 @@ __asm void prvRestoreContextOfFirstTask( void )
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msr msp, r0 /* Set the msp back to the start of the stack. */
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ldr r3, =pxCurrentTCB /* Restore the context. */
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ldr r1, [ r3 ]
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ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
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ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
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add r1, r1, #4 /* Move onto the second item in the TCB... */
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dmb /* Complete outstanding transfers before disabling MPU. */
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dmb /* Complete outstanding transfers before disabling MPU. */
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ldr r2, =0xe000ed94 /* MPU_CTRL register. */
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ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
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bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
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str r3, [ r2 ] /* Disable MPU. */
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ldr r2, =0xe000ed9c /* Region Base Address register. */
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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#if ( portTOTAL_NUM_REGIONS == 16 )
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* portTOTAL_NUM_REGIONS == 16. */
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ldr r2, =0xe000ed94 /* MPU_CTRL register. */
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@ -376,9 +368,7 @@ __asm void prvRestoreContextOfFirstTask( void )
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str r3, [ r2 ] /* Enable MPU. */
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dsb /* Force memory writes before continuing. */
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ldmia r0 !, {
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r3 - r11, r14
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} /* Pop the registers that are not automatically saved on exception entry. */
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ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
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msr control, r3
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msr psp, r0 /* Restore the task stack pointer. */
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mov r0, #0
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@ -571,19 +561,13 @@ __asm void xPortPendSVHandler( void )
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tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
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it eq
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vstmdbeq r0 !, {
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s16 - s31
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}
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vstmdbeq r0 !, { s16 - s31 }
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mrs r1, control
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stmdb r0 !, {
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r1, r4 - r11, r14
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} /* Save the remaining registers. */
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stmdb r0 !, { r1, r4 - r11, r14 } /* Save the remaining registers. */
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str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
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stmdb sp !, {
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r0, r3
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}
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stmdb sp !, { r0, r3 }
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mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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dsb
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@ -591,9 +575,7 @@ __asm void xPortPendSVHandler( void )
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp !, {
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r0, r3
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}
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ldmia sp !, { r0, r3 }
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/* Restore the context. */
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ldr r1, [ r3 ]
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ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
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@ -606,26 +588,14 @@ __asm void xPortPendSVHandler( void )
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str r3, [ r2 ] /* Disable MPU. */
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ldr r2, =0xe000ed9c /* Region Base Address register. */
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
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#if ( portTOTAL_NUM_REGIONS == 16 )
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r1 !, {
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r4 - r11
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} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r2, {
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r4 - r11
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} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
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ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
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stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
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#endif /* portTOTAL_NUM_REGIONS == 16. */
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ldr r2, =0xe000ed94 /* MPU_CTRL register. */
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@ -634,16 +604,12 @@ __asm void xPortPendSVHandler( void )
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str r3, [ r2 ] /* Enable MPU. */
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dsb /* Force memory writes before continuing. */
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ldmia r0 !, {
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r3 - r11, r14
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} /* Pop the registers that are not automatically saved on exception entry. */
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ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
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msr control, r3
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tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
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it eq
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vldmiaeq r0 !, {
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s16 - s31
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}
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vldmiaeq r0 !, { s16 - s31 }
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msr psp, r0
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bx r14
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@ -687,14 +653,14 @@ __weak void vSetupTimerInterrupt( void )
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__asm void vPortSwitchToUserMode( void )
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{
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/* *INDENT-OFF* */
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/* *INDENT-OFF* */
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PRESERVE8
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mrs r0, control
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orr r0, #1
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msr control, r0
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bx r14
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/* *INDENT-ON* */
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/* *INDENT-ON* */
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}
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/*-----------------------------------------------------------*/
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