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Continue development of MSP430X port.
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@ -98,8 +98,8 @@ void vPortSetupTimerInterrupt( void );
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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{
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unsigned short usNibble;
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unsigned short usNibble;
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unsigned short *pus16BitPointer;
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unsigned long ulSP_PC_Combined;
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unsigned long ulSP_PC_Combined;
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unsigned short *pusTopOfStack;
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/*
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/*
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Place a few bytes of known values on the bottom of the stack.
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Place a few bytes of known values on the bottom of the stack.
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@ -117,17 +117,11 @@ unsigned long ulSP_PC_Combined;
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executing an ISR. We want the stack to look just as if this has happened
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executing an ISR. We want the stack to look just as if this has happened
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so place a pointer to the start of the task on the stack first - followed
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so place a pointer to the start of the task on the stack first - followed
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by the flags we want the task to use when it starts up. */
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by the flags we want the task to use when it starts up. */
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// pus16BitPointer = ( unsigned short * ) pxTopOfStack;
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// *pus16BitPointer = ( unsigned short ) pxCode;
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// pus16BitPointer--;
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/* When placed on the stack, the top four bits of the status register
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/* When placed on the stack, the top four bits of the status register
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contain bits 19:16 of the 20 bit return address (pxCode). */
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contain bits 19:16 of the 20 bit return address (pxCode). */
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#ifdef GENERATE_ISR_STACK_FRAME
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usNibble = ( unsigned short ) ( ( ( unsigned long ) pxCode >> 15UL ) & 0x0fUL );
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usNibble = ( unsigned short ) ( ( ( unsigned long ) pxCode >> 15UL ) & 0x0fUL );
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// *pus16BitPointer = ( usNibble | portFLAGS_INT_ENABLED );
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// pus16BitPointer--;
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// pxTopOfStack = ( portSTACK_TYPE * ) pus16BitPointer;
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ulSP_PC_Combined = ( unsigned long ) pxCode;
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ulSP_PC_Combined = ( unsigned long ) pxCode;
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ulSP_PC_Combined <<= 16;
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ulSP_PC_Combined <<= 16;
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@ -135,7 +129,14 @@ unsigned long ulSP_PC_Combined;
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ulSP_PC_Combined |= portFLAGS_INT_ENABLED;
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ulSP_PC_Combined |= portFLAGS_INT_ENABLED;
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*pxTopOfStack = ulSP_PC_Combined;
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*pxTopOfStack = ulSP_PC_Combined;
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pxTopOfStack--;
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pxTopOfStack--;
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#else
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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pusTopOfStack = ( unsigned short * ) pxTopOfStack;
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pusTopOfStack--;
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*pusTopOfStack = portFLAGS_INT_ENABLED;
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pusTopOfStack -= 2;
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pxTopOfStack = ( portSTACK_TYPE * ) pusTopOfStack;
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#endif
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/* Next the general purpose registers. */
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/* Next the general purpose registers. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0xffffff;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xffffff;
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pxTopOfStack--;
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pxTopOfStack--;
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@ -193,5 +194,12 @@ void vPortSetupTimerInterrupt( void )
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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#pragma vector=configTICK_INTERRUPT_VECTOR
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__interrupt void vISR( void )
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{
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extern void vTickISR( void );
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vTickISR();
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}
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@ -79,9 +79,10 @@ portRESTORE_CONTEXT macro
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/* The last thing on the stack will be the status register.
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/* The last thing on the stack will be the status register.
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Ensure the power down bits are clear ready for the next
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Ensure the power down bits are clear ready for the next
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time this power down register is popped from the stack. */
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time this power down register is popped from the stack. */
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bic.w #0xf0, 0( SP )
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bic.w #0xf0, 0( sp )
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reti
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pop.w sr
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reta
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endm
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endm
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -61,8 +61,7 @@
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EXPORT vTickISR
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EXPORT vTickISR
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EXPORT vPortYield
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EXPORT vPortYield
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EXPORT xPortStartScheduler
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EXPORT xPortStartScheduler
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RSEG CODE
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/*
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/*
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* The RTOS tick ISR.
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* The RTOS tick ISR.
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@ -72,7 +71,9 @@
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*
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*
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* If the preemptive scheduler is in use a context switch can also occur.
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* If the preemptive scheduler is in use a context switch can also occur.
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*/
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*/
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RSEG ISR_CODE
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vTickISR:
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vTickISR:
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push.w sr
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portSAVE_CONTEXT
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portSAVE_CONTEXT
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calla #vTaskIncrementTick
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calla #vTaskIncrementTick
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@ -84,6 +85,7 @@ vTickISR:
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portRESTORE_CONTEXT
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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RSEG CODE
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/*
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/*
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* Manual context switch called by the portYIELD() macro.
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* Manual context switch called by the portYIELD() macro.
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@ -92,13 +94,13 @@ vPortYield:
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/* Mimic an interrupt by combining the SR and the PC, the latter having
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/* Mimic an interrupt by combining the SR and the PC, the latter having
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already been pushed onto the stack. R14 is a scratch registers. */
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already been pushed onto the stack. R14 is a scratch registers. */
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popx.a r14 /* r14 will hold the 20 bit PC. */
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// popx.a r14 /* r14 will hold the 20 bit PC. */
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push.w r14 /* Push just 16 bits of the 20bit PC back onto the stack. */
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// push.w r14 /* Push just 16 bits of the 20bit PC back onto the stack. */
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rram.a #4, r14 /* Move the top 4 bits of the PC down ready to be combined with the SP. */
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// rram.a #4, r14 /* Move the top 4 bits of the PC down ready to be combined with the SP. */
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and.w #0xf000, r14/* Ensure other bits are clear. */
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// and.w #0xf000, r14/* Ensure other bits are clear. */
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add.w sr, r14 /* Combine the top 4 bits of the PC with the SR. */
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// add.w sr, r14 /* Combine the top 4 bits of the PC with the SR. */
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push.w r14 /* Push the generated combined value onto the stack. */
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// push.w r14 /* Push the generated combined value onto the stack. */
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push.w sr
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/* Now the SR is stacked we can disable interrupts. */
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/* Now the SR is stacked we can disable interrupts. */
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dint
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dint
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nop
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nop
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@ -129,11 +131,13 @@ xPortStartScheduler:
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Install vTickISR as the timer A0 interrupt. */
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/* Install vTickISR as the interrupt on the vector specified by the
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ASEG
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application code. */
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ORG 0xFFE0 + configTICK_INTERRUPT_VECTOR
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/*COMMON INTVEC *./
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/*ORG 0xFF80 + configTICK_INTERRUPT_VECTOR
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ORG 0xFFEC
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_vTickISR_: DC16 vTickISR
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__vTickISR__: DC16 0xabcd*/
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END
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END
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