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Continue development of MSP430X port.

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This commit is contained in:
Richard Barry 2010-12-29 14:35:40 +00:00
parent e7e623f853
commit 0a31276719
3 changed files with 38 additions and 25 deletions
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30
Source/portable/IAR/MSP430X/portext.s43
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@ -61,8 +61,7 @@
EXPORT vTickISR
EXPORT vPortYield
EXPORT xPortStartScheduler
RSEG CODE
/*
* The RTOS tick ISR.
@ -72,7 +71,9 @@
*
* If the preemptive scheduler is in use a context switch can also occur.
*/
RSEG ISR_CODE
vTickISR:
push.w sr
portSAVE_CONTEXT
calla #vTaskIncrementTick
@ -84,6 +85,7 @@ vTickISR:
portRESTORE_CONTEXT
/*-----------------------------------------------------------*/
RSEG CODE
/*
* Manual context switch called by the portYIELD() macro.
@ -92,13 +94,13 @@ vPortYield:
/* Mimic an interrupt by combining the SR and the PC, the latter having
already been pushed onto the stack. R14 is a scratch registers. */
popx.a r14 /* r14 will hold the 20 bit PC. */
push.w r14 /* Push just 16 bits of the 20bit PC back onto the stack. */
rram.a #4, r14 /* Move the top 4 bits of the PC down ready to be combined with the SP. */
and.w #0xf000, r14/* Ensure other bits are clear. */
add.w sr, r14 /* Combine the top 4 bits of the PC with the SR. */
push.w r14 /* Push the generated combined value onto the stack. */
// popx.a r14 /* r14 will hold the 20 bit PC. */
// push.w r14 /* Push just 16 bits of the 20bit PC back onto the stack. */
// rram.a #4, r14 /* Move the top 4 bits of the PC down ready to be combined with the SP. */
// and.w #0xf000, r14/* Ensure other bits are clear. */
// add.w sr, r14 /* Combine the top 4 bits of the PC with the SR. */
// push.w r14 /* Push the generated combined value onto the stack. */
push.w sr
/* Now the SR is stacked we can disable interrupts. */
dint
nop
@ -129,11 +131,13 @@ xPortStartScheduler:
/*-----------------------------------------------------------*/
/* Install vTickISR as the timer A0 interrupt. */
ASEG
ORG 0xFFE0 + configTICK_INTERRUPT_VECTOR
/* Install vTickISR as the interrupt on the vector specified by the
application code. */
/*COMMON INTVEC *./
/*ORG 0xFF80 + configTICK_INTERRUPT_VECTOR
ORG 0xFFEC
_vTickISR_: DC16 vTickISR
__vTickISR__: DC16 0xabcd*/
END