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Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware.

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This commit is contained in:
Richard Barry 2020-01-01 22:38:23 +00:00
parent 62b413627a
commit 0a29d350b1
35 changed files with 0 additions and 8090 deletions
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13
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_IAR/settings/RTOSDemo.Debug.general.xcl Normal file
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"C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvproc.dll"
"C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvijet.dll"
"C:\Users\ribarry\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RISC-V_RV32_SiFive_HiFive1_IAR\Debug\Exe\RTOSDemo.out"
--plugin="C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\bin\riscvbat.dll"
--flash_loader="C:\devtools\IAR Systems\Embedded Workbench 8.3\riscv\config\flashloader\SiFive\hifive1.board"