diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo index 1c351b4d6..6280b3075 100644 Binary files a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo and b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo differ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj index 3bb685b49..ec820c4e3 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj @@ -12,8 +12,11 @@ @@ -160,6 +163,16 @@ + + + + + + + + + + @@ -245,6 +258,9 @@ %24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include ../src/ASF/sam/components/ethernet_phy/ksz8051mnl ../src/ASF/sam/drivers/gmac + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc Optimize for size (-Os) @@ -290,6 +306,9 @@ %24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include ../src/ASF/sam/components/ethernet_phy/ksz8051mnl ../src/ASF/sam/drivers/gmac + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc -DARM_MATH_CM4=true -DBOARD=SAM4E_EK -D__SAM4E16E__ -Dprintf=iprintf @@ -318,6 +337,9 @@ %24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include ../src/ASF/sam/components/ethernet_phy/ksz8051mnl ../src/ASF/sam/drivers/gmac + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc @@ -376,6 +398,10 @@ ../../../../FreeRTOS-Plus/Source/FreeRTOS-Plus-FAT-SL/api ../../../../FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands ../../Common/include + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc + ../../../../FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients -fdata-sections @@ -421,6 +447,9 @@ %24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include ../src/ASF/sam/components/ethernet_phy/ksz8051mnl ../src/ASF/sam/drivers/gmac + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc Default (-g) @@ -450,6 +479,9 @@ %24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include ../src/ASF/sam/components/ethernet_phy/ksz8051mnl ../src/ASF/sam/drivers/gmac + ../src/ASF/sam/components/display/aat31xx + ../src/ASF/sam/components/display/ili93xx + ../src/ASF/sam/drivers/ebi/smc Default (-Wa,-g) @@ -481,6 +513,10 @@ compile src\UDPCommandServer.c + + compile + src\TwoEchoClients.c + compile src\FreeRTOS+\FreeRTOS+FAT SL\dir.c @@ -561,6 +597,30 @@ compile src\Common Demo Tasks\semtest.c + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + compile @@ -570,9 +630,18 @@ compile + + compile + + + compile + compile + + compile + compile @@ -1037,9 +1106,6 @@ compile - - compile - compile @@ -1081,9 +1147,14 @@ + + + + + diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c new file mode 100644 index 000000000..6a5d4b387 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c @@ -0,0 +1,137 @@ +/** + * \file + * + * \brief API driver for component aat31xx. + * + * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +/** + * \defgroup aat31xx_display_group Display - AAT31XX Controller + * + * Low-level driver for the AAT31XX LCD backlight controller. This driver provides access to the main + * features of the AAT31XX controller. + * + * \{ + */ + +#include "board.h" +#include "ioport.h" +#include "aat31xx.h" +#include "conf_aat31xx.h" + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/// @endcond + +#define DELAY_PULSE (0x18u) +#define DELAY_ENABLE (0x20000u) +#define DELAY_DISABLE (0x20000u) + +/** + * \brief Set the LCD backlight level. + * + * \param ul_level backlight level. + * + * \note pin BOARD_AAT31XX_SET_GPIO must be configured before calling aat31xx_set_backlight. + */ +void aat31xx_set_backlight(uint32_t ul_level) +{ + volatile uint32_t ul_delay; + uint32_t i; + +#ifdef CONF_BOARD_AAT3155 + ul_level = AAT31XX_MAX_BACKLIGHT_LEVEL - ul_level + 1; +#endif + +#ifdef CONF_BOARD_AAT3193 + ul_level = AAT31XX_MAX_BACKLIGHT_LEVEL - ul_level + 1; +#endif + + /* Ensure valid level */ + ul_level = (ul_level > AAT31XX_MAX_BACKLIGHT_LEVEL) ? AAT31XX_MAX_BACKLIGHT_LEVEL : ul_level; + ul_level = (ul_level < AAT31XX_MIN_BACKLIGHT_LEVEL) ? AAT31XX_MIN_BACKLIGHT_LEVEL : ul_level; + + /* Set new backlight level */ + for (i = 0; i < ul_level; i++) { + ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_LOW); + ul_delay = DELAY_PULSE; + while (ul_delay--) { + } + + ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_HIGH); + + ul_delay = DELAY_PULSE; + while (ul_delay--) { + } + } + + ul_delay = DELAY_ENABLE; + while (ul_delay--) { + } +} + +/** + * \brief Switch off backlight. + */ +void aat31xx_disable_backlight(void) +{ + volatile uint32_t ul_delay; + + ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_LOW); + + ul_delay = DELAY_DISABLE; + while (ul_delay--) { + } +} + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/// @endcond + +/** + * \} + */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h new file mode 100644 index 000000000..8d0397ba6 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h @@ -0,0 +1,94 @@ +/** + * \file + * + * \brief API driver for component aat31xx. + * + * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef AAT31XX_H_INCLUDED +#define AAT31XX_H_INCLUDED + +#include "compiler.h" +#include "conf_board.h" + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/// @endcond + +/* The minimum, average and maximum brightness level values */ +#ifdef CONF_BOARD_AAT3155 +#define AAT31XX_MIN_BACKLIGHT_LEVEL 1 +#define AAT31XX_AVG_BACKLIGHT_LEVEL 8 +#define AAT31XX_MAX_BACKLIGHT_LEVEL 16 +#endif +#ifdef CONF_BOARD_AAT3193 +#define AAT31XX_MIN_BACKLIGHT_LEVEL 1 +#define AAT31XX_AVG_BACKLIGHT_LEVEL 8 +#define AAT31XX_MAX_BACKLIGHT_LEVEL 16 +#endif +#ifdef CONF_BOARD_AAT3194 +#define AAT31XX_MIN_BACKLIGHT_LEVEL 1 +#define AAT31XX_AVG_BACKLIGHT_LEVEL 25 +#define AAT31XX_MAX_BACKLIGHT_LEVEL 32 +#endif + +/* No component found */ +#ifndef AAT31XX_MIN_BACKLIGHT_LEVEL +#warning Cannot configure AAT31XX. The component must be declared in conf_board.h first! +#define AAT31XX_MIN_BACKLIGHT_LEVEL 0 +#define AAT31XX_AVG_BACKLIGHT_LEVEL 0 +#define AAT31XX_MAX_BACKLIGHT_LEVEL 0 +#endif + +void aat31xx_set_backlight(uint32_t ul_level); +void aat31xx_disable_backlight(void); + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/// @endcond + +#endif /* AAT31XX_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h new file mode 100644 index 000000000..6e0ac4fe0 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h @@ -0,0 +1,646 @@ +/** + * \file + * + * \brief registers definition for ili9325 TFT display component. + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ILI9325_REGS_H_INCLUDED +#define ILI9325_REGS_H_INCLUDED + +/** @cond 0 */ +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/** @endcond */ + +/** ili9325 LCD Registers */ + +/** Driver Code Read */ +#define ILI9325_DEVICE_CODE_REG (0x00u) + +/** ILI9325_START_OSC_CTRL : (Offset: 0x00) Start Oscillator Control*/ +#define ILI9325_START_OSC_CTRL (0x00u) +#define ILI9325_START_OSC_CTRL_EN (0x1u << 0) + +/** ILI9325_DRIVER_OUTPUT_CTRL1 : (Offset: 0x01) Driver Output Control 1*/ +#define ILI9325_DRIVER_OUTPUT_CTRL1 (0x01u) +#define ILI9325_DRIVER_OUTPUT_CTRL1_SS (0x1u << 8) +#define ILI9325_DRIVER_OUTPUT_CTRL1_SM (0x1u << 10) + +/** ILI9325_LCD_DRIVING_CTRL : (Offset: 0x02) LCD Driving Control */ +#define ILI9325_LCD_DRIVING_CTRL (0x02u) +#define ILI9325_LCD_DRIVING_CTRL_EOR (0x1u << 8) +#define ILI9325_LCD_DRIVING_CTRL_BC0 (0x1u << 9) +#define ILI9325_LCD_DRIVING_CTRL_BIT10 (0x1u << 10) + +/** ILI9325_ENTRY_MODE : (Offset: 0x03) Entry Mode*/ +#define ILI9325_ENTRY_MODE (0x03u) +#define ILI9325_ENTRY_MODE_AM (0x1u << 3) +#define ILI9325_ENTRY_MODE_ID_POS 4 +#define ILI9325_ENTRY_MODE_ID_MSK (0x3u << ILI9325_ENTRY_MODE_ID_POS) +#define ILI9325_ENTRY_MODE_ID(value) ((ILI9325_ENTRY_MODE_ID_MSK & \ + ((value) << ILI9325_ENTRY_MODE_ID_POS))) +#define ILI9325_ENTRY_MODE_ORG (0x1u << 7) +#define ILI9325_ENTRY_MODE_HWM (0x1u << 9) +#define ILI9325_ENTRY_MODE_BGR (0x1u << 12) +#define ILI9325_ENTRY_MODE_DFM (0x1u << 14) +#define ILI9325_ENTRY_MODE_TRI (0x1u << 15) + +/** ILI9325_RESIZE_CTRL : (Offset: 0x04) Resize Control */ +#define ILI9325_RESIZE_CTRL (0x04u) +#define ILI9325_RESIZE_CTRL_RSZ_POS 0 +#define ILI9325_RESIZE_CTRL_RSZ_MSK (0x3u << ILI9325_RESIZE_CTRL_RSZ_POS) +#define ILI9325_RESIZE_CTRL_RSZ(value) ((ILI9325_RESIZE_CTRL_RSZ_MSK & \ + ((value) << ILI9325_RESIZE_CTRL_RSZ_POS))) +#define ILI9325_RESIZE_CTRL_RCH_POS 4 +#define ILI9325_RESIZE_CTRL_RCH_MSK (0x3u << ILI9325_RESIZE_CTRL_RCH_POS) +#define ILI9325_RESIZE_CTRL_RCH(value) ((ILI9325_RESIZE_CTRL_RCH_MSK & \ + ((value) << ILI9325_RESIZE_CTRL_RCH_POS))) +#define ILI9325_RESIZE_CTRL_RCV_POS 8 +#define ILI9325_RESIZE_CTRL_RCV_MSK (0x3u << ILI9325_RESIZE_CTRL_RCV_POS) +#define ILI9325_RESIZE_CTRL_RCV(value) ((ILI9325_RESIZE_CTRL_RCV_MSK & \ + ((value) << ILI9325_RESIZE_CTRL_RCV_POS))) + +/** ILI9325_DISP_CTRL1 : (Offset: 0x07) Display Control 1 */ +#define ILI9325_DISP_CTRL1 (0x07u) +#define ILI9325_DISP_CTRL1_D_POS 0 +#define ILI9325_DISP_CTRL1_D_MSK (0x3u << ILI9325_DISP_CTRL1_D_POS) +#define ILI9325_DISP_CTRL1_D(value) ((ILI9325_DISP_CTRL1_D_MSK & \ + ((value) << ILI9325_DISP_CTRL1_D_POS))) +#define ILI9325_DISP_CTRL1_CL (0x1u << 3) +#define ILI9325_DISP_CTRL1_DTE (0x1u << 4) +#define ILI9325_DISP_CTRL1_GON (0x1u << 5) +#define ILI9325_DISP_CTRL1_BASEE (0x1u << 8) +#define ILI9325_DISP_CTRL1_PTDE_POS 12 +#define ILI9325_DISP_CTRL1_PTDE_MSK (0x3u << ILI9325_DISP_CTRL1_PTDE_POS) +#define ILI9325_DISP_CTRL1_PTDE(value) ((ILI9325_DISP_CTRL1_PTDE_MSK & \ + ((value) << ILI9325_DISP_CTRL1_PTDE_POS))) + +/** ILI9325_DISP_CTRL2 : (Offset: 0x08) Display Control 2 */ +#define ILI9325_DISP_CTRL2 (0x08u) +#define ILI9325_DISP_CTRL2_BP_POS 0 +#define ILI9325_DISP_CTRL2_BP_MSK (0xfu << ILI9325_DISP_CTRL2_BP_POS) +#define ILI9325_DISP_CTRL2_BP(value) ((ILI9325_DISP_CTRL2_BP_MSK & \ + ((value) << ILI9325_DISP_CTRL2_BP_POS))) +#define ILI9325_DISP_CTRL2_FP_POS 8 +#define ILI9325_DISP_CTRL2_FP_MSK (0xfu << ILI9325_DISP_CTRL2_FP_POS) +#define ILI9325_DISP_CTRL2_FP(value) ((ILI9325_DISP_CTRL2_FP_MSK & \ + ((value) << ILI9325_DISP_CTRL2_FP_POS))) + +/** ILI9325_DISP_CTRL3 : (Offset: 0x09) Display Control 3 */ +#define ILI9325_DISP_CTRL3 (0x09u) +#define ILI9325_DISP_CTRL3_ISC_POS 0 +#define ILI9325_DISP_CTRL3_ISC_MSK (0xfu << ILI9325_DISP_CTRL3_ISC_POS) +#define ILI9325_DISP_CTRL3_ISC(value) ((ILI9325_DISP_CTRL3_ISC_MSK & \ + ((value) << ILI9325_DISP_CTRL3_ISC_POS))) +#define ILI9325_DISP_CTRL3_PTG_POS 4 +#define ILI9325_DISP_CTRL3_PTG_MSK (0x3u << ILI9325_DISP_CTRL3_PTG_POS) +#define ILI9325_DISP_CTRL3_PTG(value) ((ILI9325_DISP_CTRL3_PTG_MSK & \ + ((value) << ILI9325_DISP_CTRL3_PTG_POS))) +#define ILI9325_DISP_CTRL3_PTS_POS 8 +#define ILI9325_DISP_CTRL3_PTS_MSK (0x7u << ILI9325_DISP_CTRL3_PTS_POS) +#define ILI9325_DISP_CTRL3_PTS(value) ((ILI9325_DISP_CTRL3_PTS_MSK & \ + ((value) << ILI9325_DISP_CTRL3_PTS_POS))) + +/** ILI9325_DISP_CTRL4 : (Offset: 0x0A) Display Control 4 */ +#define ILI9325_DISP_CTRL4 (0x0Au) +#define ILI9325_DISP_CTRL4_FMI_POS 0 +#define ILI9325_DISP_CTRL4_FMI_MSK (0x7u << ILI9325_DISP_CTRL4_FMI_POS) +#define ILI9325_DISP_CTRL4_FMI(value) ((ILI9325_DISP_CTRL4_FMI_MSK & \ + ((value) << ILI9325_DISP_CTRL4_FMI_POS))) +#define ILI9325_DISP_CTRL4_FMARKOE (0x1u << 3) + +/** ILI9325_RGB_DISP_INTERFACE_CTRL1 : (Offset: 0x0C) RGB Display + *Interface Control 1 */ +#define ILI9325_RGB_DISP_INTERFACE_CTRL1 (0x0Cu) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS 0 +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK (0x3u << \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM(value) (( \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK & \ + ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS))) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM0 (0x1u << 4) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM1 (0x1u << 5) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS 4 +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK (0x3u << \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM(value) (( \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK & \ + ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS))) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RM (0x1u << 8) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS 12 +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK (0x7u << \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS) +#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC(value) (( \ + ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK & \ + ((value) < ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS))) + +/** ILI9325_FRAME_MAKER_POS : (Offset: 0x0D) Frame Maker Position */ +#define ILI9325_FRAME_MAKER_POS (0x0Du) +#define ILI9325_FRAME_MAKER_POS_FMP_POS 0 +#define ILI9325_FRAME_MAKER_POS_FMP_MSK (0x1ffu << \ + ILI9325_FRAME_MAKER_POS_FMP_POS) +#define ILI9325_FRAME_MAKER_POS_FMP(value) ((ILI9325_FRAME_MAKER_POS_FMP_MSK & \ + ((value) << ILI9325_FRAME_MAKER_POS_FMP_POS))) + +/** ILI9325_RGB_DISP_INTERFACE_CTRL2 : (Offset: 0x0F) RGB Display + * Interface Control 2 */ +#define ILI9325_RGB_DISP_INTERFACE_CTRL2 (0x0Fu) +#define ILI9325_RGB_DISP_INTERFACE_CTRL2_EPL (0x1u << 0) +#define ILI9325_RGB_DISP_INTERFACE_CTRL2_DPL (0x1u << 1) +#define ILI9325_RGB_DISP_INTERFACE_CTRL2_HSPL (0x1u << 3) +#define ILI9325_RGB_DISP_INTERFACE_CTRL2_VSPL (0x1u << 4) + +/** ILI9325_POWER_CTRL1 : (Offset: 0x10) Power Control 1 */ +#define ILI9325_POWER_CTRL1 (0x10u) +#define ILI9325_POWER_CTRL1_STB (0x1u << 0) +#define ILI9325_POWER_CTRL1_SLP (0x1u << 1) +#define ILI9325_POWER_CTRL1_DSTB (0x1u << 2) +#define ILI9325_POWER_CTRL1_AP_POS 4 +#define ILI9325_POWER_CTRL1_AP_MSK (0x7u << ILI9325_POWER_CTRL1_AP_POS) +#define ILI9325_POWER_CTRL1_AP(value) ((ILI9325_POWER_CTRL1_AP_MSK & \ + ((value) << ILI9325_POWER_CTRL1_AP_POS))) +#define ILI9325_POWER_CTRL1_APE (0x1u << 7) +#define ILI9325_POWER_CTRL1_BT_POS 8 +#define ILI9325_POWER_CTRL1_BT_MSK (0x7u << ILI9325_POWER_CTRL1_BT_POS) +#define ILI9325_POWER_CTRL1_BT(value) ((ILI9325_POWER_CTRL1_BT_MSK & \ + ((value) << ILI9325_POWER_CTRL1_BT_POS))) +#define ILI9325_POWER_CTRL1_SAP (0x1u << 12) + +/** ILI9325_POWER_CTRL2 : (Offset: 0x11) Power Control 2 */ +#define ILI9325_POWER_CTRL2 (0x11u) +#define ILI9325_POWER_CTRL2_VC_POS 0 +#define ILI9325_POWER_CTRL2_VC_MSK (0x7u << ILI9325_POWER_CTRL2_VC_POS) +#define ILI9325_POWER_CTRL2_VC(value) ((ILI9325_POWER_CTRL2_VC_MSK & \ + ((value) << ILI9325_POWER_CTRL2_VC_POS))) +#define ILI9325_POWER_CTRL2_DC0_POS 4 +#define ILI9325_POWER_CTRL2_DC0_MSK (0x7u << ILI9325_POWER_CTRL2_DC0_POS) +#define ILI9325_POWER_CTRL2_DC0(value) ((ILI9325_POWER_CTRL2_DC0_MSK & \ + ((value) << ILI9325_POWER_CTRL2_DC0_POS))) +#define ILI9325_POWER_CTRL2_DC1_POS 8 +#define ILI9325_POWER_CTRL2_DC1_MSK (0x7u << ILI9325_POWER_CTRL2_DC1_POS) +#define ILI9325_POWER_CTRL2_DC1(value) ((ILI9325_POWER_CTRL2_DC1_MSK & \ + ((value) << ILI9325_POWER_CTRL2_DC1_POS))) + +/** ILI9325_POWER_CTRL3 : (Offset: 0x12) Power Control 3 */ +#define ILI9325_POWER_CTRL3 (0x12u) +#define ILI9325_POWER_CTRL3_VRH_POS 0 +#define ILI9325_POWER_CTRL3_VRH_MSK (0xfu << ILI9325_POWER_CTRL3_VRH_POS) +#define ILI9325_POWER_CTRL3_VRH(value) ((ILI9325_POWER_CTRL3_VRH_MSK & \ + ((value) << ILI9325_POWER_CTRL3_VRH_POS))) +#define ILI9325_POWER_CTRL3_PON (0x1u << 4) +#define ILI9325_POWER_CTRL3_VCIRE (0x1u << 7) + +/** ILI9325_POWER_CTRL4 : (Offset: 0x13) Power Control 4 */ +#define ILI9325_POWER_CTRL4 (0x13u) +#define ILI9325_POWER_CTRL4_VDV_POS 8 +#define ILI9325_POWER_CTRL4_VDV_MSK (0x1fu << ILI9325_POWER_CTRL4_VDV_POS) +#define ILI9325_POWER_CTRL4_VDV(value) ((ILI9325_POWER_CTRL4_VDV_MSK & \ + ((value) << ILI9325_POWER_CTRL4_VDV_POS))) + +/** ILI9325_HORIZONTAL_GRAM_ADDR_SET : (Offset: 0x20) Horizontal GRAM + * Address Set */ +#define ILI9325_HORIZONTAL_GRAM_ADDR_SET (0x20u) +#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS 0 +#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK (0xffu << \ + ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS) +#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD(value) (( \ + ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK & \ + ((value) << ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS))) + +/** ILI9325_VERTICAL_GRAM_ADDR_SET : (Offset: 0x21) Vertical GRAM + * Address Set */ +#define ILI9325_VERTICAL_GRAM_ADDR_SET (0x21u) +#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS 0 +#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK (0xffu << \ + ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS) +#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD(value) (( \ + ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK & \ + ((value) << ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS))) + +/** ILI9325_GRAM_DATA_REG : (Offset: 0x22) GRAM Data Register */ +#define ILI9325_GRAM_DATA_REG (0x22u) + +/** ILI9325_POWER_CTRL7 : (Offset: 0x29) Power Control 7 */ +#define ILI9325_POWER_CTRL7 (0x29u) +#define ILI9325_POWER_CTRL7_VCM_POS 0 +#define ILI9325_POWER_CTRL7_VCM_MSK (0x3fu << ILI9325_POWER_CTRL7_VCM_POS) +#define ILI9325_POWER_CTRL7_VCM(value) ((ILI9325_POWER_CTRL7_VCM_MSK & \ + ((value) << ILI9325_POWER_CTRL7_VCM_POS))) + +/** ILI9325_FRAME_RATE_AND_COLOR_CTRL : (Offset: 0x2B) Frame Rate and + * Color Control */ +#define ILI9325_FRAME_RATE_AND_COLOR_CTRL (0x2Bu) +#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS 0 +#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK (0xfu << \ + ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS) +#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(value) (( \ + ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK & \ + ((value) << ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS))) + +/** ILI9325_GAMMA_CTL1 : (Offset: 0x30) Gamma Control 1 */ +#define ILI9325_GAMMA_CTL1 (0x30u) +#define ILI9325_GAMMA_CTL1_KP0_POS 0 +#define ILI9325_GAMMA_CTL1_KP0_MSK (0x7u << ILI9325_GAMMA_CTL1_KP0_POS) +#define ILI9325_GAMMA_CTL1_KP0(value) ((ILI9325_GAMMA_CTL1_KP0_MSK & \ + ((value) << ILI9325_GAMMA_CTL1_KP0_POS))) +#define ILI9325_GAMMA_CTL1_KP1_POS 8 +#define ILI9325_GAMMA_CTL1_KP1_MSK (0x7u << ILI9325_GAMMA_CTL1_KP1_POS) +#define ILI9325_GAMMA_CTL1_KP1(value) ((ILI9325_GAMMA_CTL1_KP1_MSK & \ + ((value) << ILI9325_GAMMA_CTL1_KP1_POS))) + +/** ILI9325_GAMMA_CTL2 : (Offset: 0x31) Gamma Control 2 */ +#define ILI9325_GAMMA_CTL2 (0x31u) +#define ILI9325_GAMMA_CTL2_KP2_POS 0 +#define ILI9325_GAMMA_CTL2_KP2_MSK (0x7u << ILI9325_GAMMA_CTL2_KP2_POS) +#define ILI9325_GAMMA_CTL2_KP2(value) ((ILI9325_GAMMA_CTL2_KP2_MSK & \ + ((value) << ILI9325_GAMMA_CTL2_KP2_POS))) +#define ILI9325_GAMMA_CTL2_KP3_POS 8 +#define ILI9325_GAMMA_CTL2_KP3_MSK (0x7u << ILI9325_GAMMA_CTL2_KP3_POS) +#define ILI9325_GAMMA_CTL2_KP3(value) ((ILI9325_GAMMA_CTL2_KP3_MSK & \ + ((value) << ILI9325_GAMMA_CTL2_KP3_POS))) + +/** ILI9325_GAMMA_CTL3 : (Offset: 0x32) Gamma Control 3 */ +#define ILI9325_GAMMA_CTL3 (0x32u) +#define ILI9325_GAMMA_CTL3_KP4_POS 0 +#define ILI9325_GAMMA_CTL3_KP4_MSK (0x7u << ILI9325_GAMMA_CTL3_KP4_POS) +#define ILI9325_GAMMA_CTL3_KP4(value) ((ILI9325_GAMMA_CTL3_KP4_MSK & \ + ((value) << ILI9325_GAMMA_CTL3_KP4_POS))) +#define ILI9325_GAMMA_CTL3_KP5_POS 8 +#define ILI9325_GAMMA_CTL3_KP5_MSK (0x7u << ILI9325_GAMMA_CTL3_KP5_POS) +#define ILI9325_GAMMA_CTL3_KP5(value) ((ILI9325_GAMMA_CTL3_KP5_MSK & \ + ((value) << ILI9325_GAMMA_CTL3_KP5_POS))) + +/** ILI9325_GAMMA_CTL4 : (Offset: 0x35) Gamma Control 4 */ +#define ILI9325_GAMMA_CTL4 (0x35u) +#define ILI9325_GAMMA_CTL4_RP0_POS 0 +#define ILI9325_GAMMA_CTL4_RP0_MSK (0x7u << ILI9325_GAMMA_CTL4_RP0_POS) +#define ILI9325_GAMMA_CTL4_RP0(value) ((ILI9325_GAMMA_CTL4_RP0_MSK & \ + ((value) << ILI9325_GAMMA_CTL4_RP0_POS))) +#define ILI9325_GAMMA_CTL4_RP1_POS 8 +#define ILI9325_GAMMA_CTL4_RP1_MSK (0x7u << ILI9325_GAMMA_CTL4_RP1_POS) +#define ILI9325_GAMMA_CTL4_RP1(value) ((ILI9325_GAMMA_CTL4_RP1_MSK & \ + ((value) << ILI9325_GAMMA_CTL4_RP1_POS))) + +/** ILI9325_GAMMA_CTL5 : (Offset: 0x36) Gamma Control 5 */ +#define ILI9325_GAMMA_CTL5 (0x36u) +#define ILI9325_GAMMA_CTL5_VRP0_POS 0 +#define ILI9325_GAMMA_CTL5_VRP0_MSK (0xfu << ILI9325_GAMMA_CTL5_VRP0_POS) +#define ILI9325_GAMMA_CTL5_VRP0(value) ((ILI9325_GAMMA_CTL5_VRP0_MSK & \ + ((value) << ILI9325_GAMMA_CTL5_VRP0_POS))) +#define ILI9325_GAMMA_CTL5_VRP1_POS 8 +#define ILI9325_GAMMA_CTL5_VRP1_MSK (0x1fu << ILI9325_GAMMA_CTL5_VRP1_POS) +#define ILI9325_GAMMA_CTL5_VRP1(value) ((ILI9325_GAMMA_CTL5_VRP1_MSK & \ + ((value) << ILI9325_GAMMA_CTL5_VRP1_POS))) + +/** ILI9325_GAMMA_CTL6 : (Offset: 0x37) Gamma Control 6*/ +#define ILI9325_GAMMA_CTL6 (0x37u) +#define ILI9325_GAMMA_CTL6_KN0_POS 0 +#define ILI9325_GAMMA_CTL6_KN0_MSK (0x7u << ILI9325_GAMMA_CTL6_KN0_POS) +#define ILI9325_GAMMA_CTL6_KN0(value) ((ILI9325_GAMMA_CTL6_KN0_MSK & \ + ((value) << ILI9325_GAMMA_CTL6_KN0_POS))) +#define ILI9325_GAMMA_CTL6_KN1_POS 8 +#define ILI9325_GAMMA_CTL6_KN1_MSK (0x7u << ILI9325_GAMMA_CTL6_KN1_POS) +#define ILI9325_GAMMA_CTL6_KN1(value) ((ILI9325_GAMMA_CTL6_KN1_MSK \ + & ((value) << ILI9325_GAMMA_CTL6_KN1_POS))) + +/** ILI9325_GAMMA_CTL7 : (Offset: 0x38) Gamma Control 7*/ +#define ILI9325_GAMMA_CTL7 (0x38u) +#define ILI9325_GAMMA_CTL7_KN2_POS 0 +#define ILI9325_GAMMA_CTL7_KN2_MSK (0x7u << ILI9325_GAMMA_CTL7_KN2_POS) +#define ILI9325_GAMMA_CTL7_KN2(value) ((ILI9325_GAMMA_CTL7_KN2_MSK & \ + ((value) << ILI9325_GAMMA_CTL7_KN2_POS))) +#define ILI9325_GAMMA_CTL7_KN3_POS 8 +#define ILI9325_GAMMA_CTL7_KN3_MSK (0x7u << ILI9325_GAMMA_CTL7_KN3_POS) +#define ILI9325_GAMMA_CTL7_KN3(value) ((ILI9325_GAMMA_CTL7_KN3_MSK & \ + ((value) << ILI9325_GAMMA_CTL7_KN3_POS))) + +/** ILI9325_GAMMA_CTL8 : (Offset: 0x39) Gamma Control 8*/ +#define ILI9325_GAMMA_CTL8 (0x39u) +#define ILI9325_GAMMA_CTL8_KN4_POS 0 +#define ILI9325_GAMMA_CTL8_KN4_MSK (0x7u << ILI9325_GAMMA_CTL8_KN4_POS) +#define ILI9325_GAMMA_CTL8_KN4(value) ((ILI9325_GAMMA_CTL8_KN4_MSK & \ + ((value) << ILI9325_GAMMA_CTL8_KN4_POS))) +#define ILI9325_GAMMA_CTL8_KN5_POS 8 +#define ILI9325_GAMMA_CTL8_KN5_MSK (0x7u << ILI9325_GAMMA_CTL8_KN5_POS) +#define ILI9325_GAMMA_CTL8_KN5(value) ((ILI9325_GAMMA_CTL8_KN5_MSK & \ + ((value) << ILI9325_GAMMA_CTL8_KN5_POS))) + +/** ILI9325_GAMMA_CTL9 : (Offset: 0x3C) Gamma Control 9*/ +#define ILI9325_GAMMA_CTL9 (0x3Cu) +#define ILI9325_GAMMA_CTL9_RN0_POS 0 +#define ILI9325_GAMMA_CTL9_RN0_MSK (0x7u << ILI9325_GAMMA_CTL9_RN0_POS) +#define ILI9325_GAMMA_CTL9_RN0(value) ((ILI9325_GAMMA_CTL9_RN0_MSK & \ + ((value) << ILI9325_GAMMA_CTL9_RN0_POS))) +#define ILI9325_GAMMA_CTL9_RN1_POS 8 +#define ILI9325_GAMMA_CTL9_RN1_MSK (0x7u << ILI9325_GAMMA_CTL9_RN1_POS) +#define ILI9325_GAMMA_CTL9_RN1(value) ((ILI9325_GAMMA_CTL9_RN1_MSK & \ + ((value) << ILI9325_GAMMA_CTL9_RN1_POS))) + +/** ILI9325_GAMMA_CTL10 : (Offset: 0x3D) Gamma Control 10*/ +#define ILI9325_GAMMA_CTL10 (0x3Du) +#define ILI9325_GAMMA_CTL10_VRN0_POS 0 +#define ILI9325_GAMMA_CTL10_VRN0_MSK (0xfu << ILI9325_GAMMA_CTL10_VRN0_POS) +#define ILI9325_GAMMA_CTL10_VRN0(value) ((ILI9325_GAMMA_CTL10_VRN0_MSK & \ + ((value) << ILI9325_GAMMA_CTL10_VRN0_POS))) +#define ILI9325_GAMMA_CTL10_VRN1_POS 8 +#define ILI9325_GAMMA_CTL10_VRN1_MSK (0x1fu << \ + ILI9325_GAMMA_CTL10_VRN1_POS) +#define ILI9325_GAMMA_CTL10_VRN1(value) ((ILI9325_GAMMA_CTL10_VRN1_MSK & \ + ((value) << ILI9325_GAMMA_CTL10_VRN1_POS))) + +/** + * ILI9325_HORIZONTAL_ADDR_START : (Offset: 0x50) Horizontal Address + * Start Position + */ +#define ILI9325_HORIZONTAL_ADDR_START (0x50u) +#define ILI9325_HORIZONTAL_ADDR_START_HSA_POS 0 +#define ILI9325_HORIZONTAL_ADDR_START_HSA_MSK (0xffu << \ + ILI9325_HORIZONTAL_ADDR_START_HSA_POS) +#define ILI9325_HORIZONTAL_ADDR_START_HSA(value) (( \ + ILI9325_HORIZONTAL_ADDR_START_HSA_MSK & \ + ((value) << ILI9325_HORIZONTAL_ADDR_START_HSA_POS))) + +/** + * ILI9325_HORIZONTAL_ADDR_END : (Offset: 0x51) Horizontal Address End + * Position + */ +#define ILI9325_HORIZONTAL_ADDR_END (0x51u) +#define ILI9325_HORIZONTAL_ADDR_END_HEA_POS 0 +#define ILI9325_HORIZONTAL_ADDR_END_HEA_MSK (0xffu << \ + ILI9325_HORIZONTAL_ADDR_END_HEA_POS) +#define ILI9325_HORIZONTAL_ADDR_END_HEA(value) (( \ + ILI9325_HORIZONTAL_ADDR_END_HEA_MSK & \ + ((value) << ILI9325_HORIZONTAL_ADDR_END_HEA_POS))) + +/** + * ILI9325_VERTICAL_ADDR_START : (Offset: 0x52) Vertical Address Start + * Position + */ +#define ILI9325_VERTICAL_ADDR_START (0x52u) +#define ILI9325_VERTICAL_ADDR_START_VSA_POS 0 +#define ILI9325_VERTICAL_ADDR_START_VSA_MSK (0x1ffu << \ + ILI9325_VERTICAL_ADDR_START_VSA_POS) +#define ILI9325_VERTICAL_ADDR_START_VSA(value) (( \ + ILI9325_VERTICAL_ADDR_START_VSA_MSK & \ + ((value) << ILI9325_VERTICAL_ADDR_START_VSA_POS))) + +/** + * ILI9325_VERTICAL_ADDR_END : (Offset: 0x53) Vertical Address End + * Position + */ +#define ILI9325_VERTICAL_ADDR_END (0x53u) +#define ILI9325_VERTICAL_ADDR_END_VEA_POS 0 +#define ILI9325_VERTICAL_ADDR_END_VEA_MSK (0x1ffu << \ + ILI9325_VERTICAL_ADDR_END_VEA_POS) +#define ILI9325_VERTICAL_ADDR_END_VEA(value) ((ILI9325_VERTICAL_ADDR_END_VEA_MSK \ + & ((value) << ILI9325_VERTICAL_ADDR_END_VEA_POS))) + +/** + * ILI9325_DRIVER_OUTPUT_CTRL2 : (Offset: 0x60) Driver Output + * Control 2 + */ +#define ILI9325_DRIVER_OUTPUT_CTRL2 (0x60u) +#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS 0 +#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK (0x3fu << \ + ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS) +#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN(value) (( \ + ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK & \ + ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS))) +#define ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS 8 +#define ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK (0x3fu << \ + ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS) +#define ILI9325_DRIVER_OUTPUT_CTRL2_NL(value) (( \ + ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK & \ + ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS))) +#define ILI9325_DRIVER_OUTPUT_CTRL2_GS (0x1u << 15) + +/** + * ILI9325_BASE_IMG_DISP_CTRL : (Offset: 0x61) Base Image Display + * Control + */ +#define ILI9325_BASE_IMG_DISP_CTRL (0x61u) +#define ILI9325_BASE_IMG_DISP_CTRL_REV (0x1u << 0) +#define ILI9325_BASE_IMG_DISP_CTRL_VLE (0x1u << 1) +#define ILI9325_BASE_IMG_DISP_CTRL_NDL (0x1u << 2) + +/** + * ILI9325_VERTICAL_SCROLL_CTRL : (Offset: 0x6A) Vertical Scroll + * Control + */ +#define ILI9325_VERTICAL_SCROLL_CTRL (0x6Au) +#define ILI9325_VERTICAL_SCROLL_CTRL_VL_POS 0 +#define ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK (0x1ffu << \ + ILI9325_VERTICAL_SCROLL_CTRL_VL_POS) +#define ILI9325_VERTICAL_SCROLL_CTRL_VL(value) (( \ + ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK & \ + ((value) << ILI9325_VERTICAL_SCROLL_CTRL_VL_POS))) + +/** + * ILI9325_PARTIAL_IMG1_DISP_POS : (Offset: 0x80) Partial Image 1 + * Display Position + */ +#define ILI9325_PARTIAL_IMG1_DISP_POS (0x80u) +#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS 0 +#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS) +#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0(value) (( \ + ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK & \ + ((value) << ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS))) + +/** + * ILI9325_PARTIAL_IMG1_AREA_START_LINE : (Offset: 0x81) Partial Image + * 1 Area (Start Line) + */ +#define ILI9325_PARTIAL_IMG1_AREA_START_LINE (0x81u) +#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS 0 +#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS) +#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0(value) (( \ + ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK & \ + ((value) << \ + ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS))) + +/** + * ILI9325_PARTIAL_IMG1_AREA_END_LINE : (Offset: 0x82) Partial Image 1 + * Area (End Line) + */ +#define ILI9325_PARTIAL_IMG1_AREA_END_LINE (0x82u) +#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS 0 +#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS) +#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0(value) (( \ + ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK & \ + ((value) << \ + ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS))) + +/** + * ILI9325_PARTIAL_IMG2_DISP_POS : (Offset: 0x83) Partial Image 2 + * Display Position + */ +#define ILI9325_PARTIAL_IMG2_DISP_POS (0x83u) +#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS 0 +#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS) +#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1(value) (( \ + ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK & \ + ((value) << ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS))) + +/** + * ILI9325_PARTIAL_IMG2_AREA_START_LINE : (Offset: 0x84) Partial Image + * 2 Area (Start Line) + */ +#define ILI9325_PARTIAL_IMG2_AREA_START_LINE (0x84u) +#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS 0 +#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS) +#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1(value) (( \ + ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK & \ + ((value) << \ + ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS))) + +/** + * ILI9325_PARTIAL_IMG2_AREA_END_LINE : (Offset: 0x85) Partial Image 2 + * Area (End Line) + */ +#define ILI9325_PARTIAL_IMG2_AREA_END_LINE (0x85u) +#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS 0 +#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK (0x1ffu << \ + ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS) +#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1(value) (( \ + ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK & \ + ((value) << \ + ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS))) + +/** + * ILI9325_PANEL_INTERFACE_CTRL1 : (Offset: 0x90) Panel Interface + * Control 1 + */ +#define ILI9325_PANEL_INTERFACE_CTRL1 (0x90u) +#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS 0 +#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK (0x1fu << \ + ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS) +#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI(value) (( \ + ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK & \ + ((value) << ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS))) +#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS 8 +#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK (0x3u << \ + ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS) +#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI(value) (( \ + ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK & \ + ((value) << ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS))) + +/** + * ILI9325_PANEL_INTERFACE_CTRL2 : (Offset: 0x92) Panel Interface + * Control 2 + */ +#define ILI9325_PANEL_INTERFACE_CTRL2 (0x92u) +#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS 8 +#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK (0x7u << \ + ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS) +#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI(value) (( \ + ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK & \ + ((value) << ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS))) + +/** + * ILI9325_PANEL_INTERFACE_CTRL4 : (Offset: 0x95) Panel Interface + * Control 4 + */ +#define ILI9325_PANEL_INTERFACE_CTRL4 (0x95u) +#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS 0 +#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK (0x3fu << \ + ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS) +#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE(value) (( \ + ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK & \ + ((value) << ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS))) +#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS 8 +#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK (0x3u << \ + ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS) +#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE(value) (( \ + ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK & \ + ((value) << ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS))) + +/** ILI9325_OTP_VCM_PROG_CTRL : (Offset: 0xA1) OTP VCM Programming Control */ +#define ILI9325_OTP_VCM_PROG_CTRL (0xA1u) +#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS 0 +#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK (0x3fu << \ + ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS) +#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP(value) (( \ + ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK & \ + ((value) << ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS))) +#define ILI9325_OTP_VCM_PROG_CTRL_OTP_PGM_EN (0x1u << 11) + +/** ILI9325_OTP_VCM_STATUS_AND_ENABLE : (Offset: 0xA2) OTP VCM Status + * and Enable */ +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE (0xA2u) +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_EN (0x1u << 0) +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS 8 +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK (0x3fu << \ + ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS) +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D(value) (( \ + ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK & ((value) << \ + ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS))) +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS 14 +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK (0x3u << \ + ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS) +#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT(value) (( \ + ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK & \ + ((value) << \ + IILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS))) + +/** ILI9325_OTP_PROG_ID_KEY : (Offset: 0xA5) OTP Programming ID Key */ +#define ILI9325_OTP_PROG_ID_KEY (0xA5u) +#define ILI9325_OTP_PROG_ID_KEY_KEY_POS 0 +#define ILI9325_OTP_PROG_ID_KEY_KEY_MSK (0xffffu << \ + ILI9325_OTP_PROG_ID_KEY_KEY_POS) +#define ILI9325_OTP_PROG_ID_KEY_KEY(value) ((ILI9325_OTP_PROG_ID_KEY_KEY_MSK & \ + ((value) << ILI9325_OTP_PROG_ID_KEY_KEY_POS))) + +/** @cond 0 */ +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/** @endcond */ + +#endif /* ILI9325_REGS_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h new file mode 100644 index 000000000..ccbff8088 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h @@ -0,0 +1,245 @@ +/** + * \file + * + * \brief registers definition for ili9341 TFT display component. + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ILI9341_REGS_H_INCLUDED +#define ILI9341_REGS_H_INCLUDED + +/** @cond 0 */ +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/** @endcond */ + +/** ili9341 LCD Registers */ + +/** Level 1 Commands (from the display Datasheet) */ +/** Nop operation*/ +#define ILI9341_CMD_NOP 0x00 +/** Software reset*/ +#define ILI9341_CMD_SOFTWARE_RESET 0x01 +/** Read Display Identification information*/ +#define ILI9341_CMD_READ_DISP_ID 0x04 +/** Read display status*/ +#define ILI9341_CMD_READ_DISP_STATUS 0x09 +/** Read display power mode*/ +#define ILI9341_CMD_READ_DISP_POWER_MODE 0x0A +/** Read display MADCTL*/ +#define ILI9341_CMD_READ_DISP_MADCTRL 0x0B +/** Read display pixel format*/ +#define ILI9341_CMD_READ_DISP_PIXEL_FORMAT 0x0C +/** Read display image format*/ +#define ILI9341_CMD_READ_DISP_IMAGE_FORMAT 0x0D +/** Read display signal mode*/ +#define ILI9341_CMD_READ_DISP_SIGNAL_MODE 0x0E +/** read display self-diagnostic resutl*/ +#define ILI9341_CMD_READ_DISP_SELF_DIAGNOSTIC 0x0F +/** Enter sleep mode*/ +#define ILI9341_CMD_ENTER_SLEEP_MODE 0x10 +/** Sleep out*/ +#define ILI9341_CMD_SLEEP_OUT 0x11 +/** Partial mode on*/ +#define ILI9341_CMD_PARTIAL_MODE_ON 0x12 +/** Normal display mode on*/ +#define ILI9341_CMD_NORMAL_DISP_MODE_ON 0x13 +/** Display inversion off*/ +#define ILI9341_CMD_DISP_INVERSION_OFF 0x20 +/** Display inversion on*/ +#define ILI9341_CMD_DISP_INVERSION_ON 0x21 +/** Gamma set*/ +#define ILI9341_CMD_GAMMA_SET 0x26 +/** Display off*/ +#define ILI9341_CMD_DISPLAY_OFF 0x28 +/** Display on*/ +#define ILI9341_CMD_DISPLAY_ON 0x29 +/** Column address set*/ +#define ILI9341_CMD_COLUMN_ADDRESS_SET 0x2A +/** Page address set*/ +#define ILI9341_CMD_PAGE_ADDRESS_SET 0x2B +/** Memory write*/ +#define ILI9341_CMD_MEMORY_WRITE 0x2C +/** Color set*/ +#define ILI9341_CMD_COLOR_SET 0x2D +/** Memory read*/ +#define ILI9341_CMD_MEMORY_READ 0x2E +/** Partial area*/ +#define ILI9341_CMD_PARTIAL_AREA 0x30 +/** Vertical scrolling definition*/ +#define ILI9341_CMD_VERT_SCROLL_DEFINITION 0x33 +/** Tearing effect line off*/ +#define ILI9341_CMD_TEARING_EFFECT_LINE_OFF 0x34 +/** Tearing effect line on*/ +#define ILI9341_CMD_TEARING_EFFECT_LINE_ON 0x35 + +/** Memory Access control*/ +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL 0x36 +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MY (0x1u << 7) +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX (0x1u << 6) +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MV (0x1u << 5) +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_ML (0x1u << 4) +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR (0x1u << 3) +#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MH (0x1u << 2) + +/** Vetical scrolling start address*/ +#define ILI9341_CMD_VERT_SCROLL_START_ADDRESS 0x37 +/** Idle mode off*/ +#define ILI9341_CMD_IDLE_MODE_OFF 0x38 +/** Idle mode on*/ +#define ILI9341_CMD_IDLE_MODE_ON 0x39 +/** Pixel Format set*/ +#define ILI9341_CMD_PIXEL_FORMAT_SET 0x3A +/** write memory continue*/ +#define ILI9341_CMD_WRITE_MEMORY_CONTINUE 0x3C +/** Read memory continue*/ +#define ILI9341_CMD_READ_MEMORY_CONTINUE 0x3E +/** set tear scanline*/ +#define ILI9341_CMD_SET_TEAR_SCANLINE 0x44 +/** get scanline*/ +#define ILI9341_CMD_GET_SCANLINE 0x45 +/** write display brightness*/ +#define ILI9341_CMD_WRITE_DISPLAY_BRIGHTNESS 0x51 +/** read display brightness*/ +#define ILI9341_CMD_READ_DISPLAY_BRIGHTNESS 0x52 +/** write control display*/ +#define ILI9341_CMD_WRITE_CTRL_DISPLAY 0x53 +/** read control display*/ +#define ILI9341_CMD_READ_CTRL_DISPLAY 0x54 +/** write content adaptive brightness control*/ +#define ILI9341_CMD_WRITE_CONTENT_ADAPT_BRIGHTNESS 0x55 +/** read content adaptive brightness control*/ +#define ILI9341_CMD_READ_CONTENT_ADAPT_BRIGHTNESS 0x56 +/** write CABC minimum brightness*/ +#define ILI9341_CMD_WRITE_MIN_CAB_LEVEL 0x5E +/** read CABC minimum brightness*/ +#define ILI9341_CMD_READ_MIN_CAB_LEVEL 0x5F +/** Read ID1*/ +#define ILI9341_CMD_READ_ID1 0xDA +/** Read ID2*/ +#define ILI9341_CMD_READ_ID2 0xDB +/** Read ID3*/ +#define ILI9341_CMD_READ_ID3 0xDC + +/** Level 2 Commands (from the display Datasheet) */ +/** RGB interface signal control*/ +#define ILI9341_CMD_RGB_SIGNAL_CONTROL 0xB0 +/** frame control*/ +#define ILI9341_CMD_FRAME_RATE_CONTROL_NORMAL 0xB1 +/** frame control in idle mode*/ +#define ILI9341_CMD_FRAME_RATE_CONTROL_IDLE_8COLOR 0xB2 +/** frame control in partial mode*/ +#define ILI9341_CMD_FRAME_RATE_CONTROL_PARTIAL 0xB3 +/** display inversion control*/ +#define ILI9341_CMD_DISPLAY_INVERSION_CONTROL 0xB4 +/** blanking porch control*/ +#define ILI9341_CMD_BLANKING_PORCH_CONTROL 0xB5 +/** display function control*/ +#define ILI9341_CMD_DISPLAY_FUNCTION_CTL 0xB6 +#define ILI9341_DISP_FUNC_CTL_REV (0x1u << 7) +#define ILI9341_DISP_FUNC_CTL_GS (0x1u << 6) +#define ILI9341_DISP_FUNC_CTL_SS (0x1u << 5) +#define ILI9341_DISP_FUNC_CTL_SM (0x1u << 4) +#define ILI9341_DISP_FUNC_CTL_ISC_POS 0 +#define ILI9341_DISP_FUNC_CTL_ISC_MSK (0x0F << 0) +#define ILI9341_DISP_FUNC_CTL_ISC(value) \ + (ILI9341_DISP_FUNC_CTL_ISC_MSK & \ + (value << ILI9341_DISP_FUNC_CTL_ISC_POS)) + +/** entry mode set*/ +#define ILI9341_CMD_ENTRY_MODE_SET 0xB7 +/** backlight control1*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_1 0xB8 +/** backlight control2*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_2 0xB9 +/** backlight control3*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_3 0xBA +/** backlight control 4*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_4 0xBB +/** backlight control 5*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_5 0xBC +/** backlight control 7*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_7 0xBE +/** backlight control 8*/ +#define ILI9341_CMD_BACKLIGHT_CONTROL_8 0xBF +/** power control 1*/ +#define ILI9341_CMD_POWER_CONTROL_1 0xC0 +/** power control 2*/ +#define ILI9341_CMD_POWER_CONTROL_2 0xC1 +/** VCOM control 1*/ +#define ILI9341_CMD_VCOM_CONTROL_1 0xC5 +/** VCOM control 2*/ +#define ILI9341_CMD_VCOM_CONTROL_2 0xC7 +/** Power control A*/ +#define ILI9341_CMD_POWER_CONTROL_A 0xCB +/** Power control B*/ +#define ILI9341_CMD_POWER_CONTROL_B 0xCF +/** NV memory write*/ +#define ILI9341_CMD_NVMEM_WRITE 0xD0 +/** NV memory protection key*/ +#define ILI9341_CMD_NVMEM_PROTECTION_KEY 0xD1 +/** NV memory status read*/ +#define ILI9341_CMD_NVMEM_STATUS_READ 0xD2 +/** Read ID4*/ +#define ILI9341_CMD_READ_ID4 0xD3 +/** positive gamma correction*/ +#define ILI9341_CMD_POSITIVE_GAMMA_CORRECTION 0xE0 +/** negative gamma correction*/ +#define ILI9341_CMD_NEGATIVE_GAMMA_CORRECTION 0xE1 +/** digital gamma control 1*/ +#define ILI9341_CMD_DIGITAL_GAMMA_CONTROL_1 0xE2 +/** digital gamma control 2*/ +#define ILI9341_CMD_DIGITAL_GAMMA_CONTROL_2 0xE3 +/** driver timing control A*/ +#define ILI9341_CMD_DRIVER_TIMING_CTL_A 0xE8 +/** driver timing control B*/ +#define ILI9341_CMD_DRIVER_TIMING_CTL_B 0xEA +/** power-on sequence control*/ +#define ILI9341_CMD_POWER_ON_SEQUENCE_CONTROL 0xED +/** enable 3g gamma control*/ +#define ILI9341_CMD_ENABLE_3_GAMMA_CONTROL 0xF2 +/** Interface control*/ +#define ILI9341_CMD_INTERFACE_CONTROL 0xF6 +/** pump ration control*/ +#define ILI9341_CMD_PUMP_RATIO_CONTROL 0xF7 + +#endif /* ILI9341_REGS_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c new file mode 100644 index 000000000..fb529482c --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c @@ -0,0 +1,1851 @@ +/** + * \file + * + * \brief API driver for ILI93XX TFT display component. + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +/** + * \defgroup ili93xx_display_group Display - ILI93XX Controller + * + * Low-level driver for the ILI93XX LCD controller. This driver provides access + * to the main features of the ILI93XX controller. + * Now ILI9325 and ILI9341 are supported. + * + * \{ + */ + +#include +#include +#include +#include +#include "ili93xx.h" +#include "ili9341_regs.h" +#include "ili9325_regs.h" + +/** Device type*/ +static uint8_t g_uc_device_type = 0; + +/** Pixel cache used to speed up communication */ +#define LCD_DATA_CACHE_SIZE ILI93XX_LCD_WIDTH + +/** LCD X-axis and Y-axis length */ +static uint32_t g_ul_lcd_x_length = ILI93XX_LCD_WIDTH; +static uint32_t g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT; + +static ili93xx_color_t g_ul_pixel_cache[LCD_DATA_CACHE_SIZE]; + +static volatile ili93xx_coord_t limit_start_x, limit_start_y; +static volatile ili93xx_coord_t limit_end_x, limit_end_y; + +/** Global variable describing the font size used by the driver */ +const struct ili93xx_font gfont = {10, 14}; + +/** + * Character set table for font 10x14 + * Coding format: + * Char height is 14 bits, which is coded using 2 bytes per column + * (2 unused bits). + * Char width is 10 bits. + */ +const uint8_t p_uc_charset10x14[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC, + 0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, + 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, + 0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC, + 0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0, + 0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0, + 0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18, + 0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC, + 0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00, + 0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78, + 0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18, + 0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00, + 0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8, + 0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0, + 0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0, + 0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C, + 0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, + 0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC, + 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, + 0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, + 0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C, + 0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0, + 0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0, + 0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0, + 0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C, + 0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0, + 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC, + 0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00, + 0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, + 0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C, + 0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0, + 0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC, + 0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, + 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00, + 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, + 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, + 0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70, + 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, + 0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC, + 0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00, + 0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC, + 0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, + 0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, + 0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, + 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0, + 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC, + 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00, + 0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0, + 0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, + 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, + 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, + 0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00, + 0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, + 0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00, + 0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, + 0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00, + 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC, + 0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC, + 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80, + 0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C, + 0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, + 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0, + 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC, + 0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, + 0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C, + 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, + 0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, + 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0, + 0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8, + 0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, + 0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, + 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C, + 0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC, + 0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00, + 0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C, + 0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C, + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, + 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00, + 0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, + 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00, + 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00, + 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, + 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00, + 0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC, + 0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8, + 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, + 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0, + 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C, + 0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30, + 0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C, + 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC, + 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC, + 0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90, + 0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00, + 0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC, + 0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0, + 0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC, + 0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, + 0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00, + 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0, + 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC, + 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, + 0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0, + 0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC, + 0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00, + 0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC, + 0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C, + 0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0, + 0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, + 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, + 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, + 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC, + 0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, + 0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00, + 0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC, + 0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30, + 0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8, + 0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00, + 0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C, + 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0, + 0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, + 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0, + 0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8, + 0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0, + 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0, + 0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, + 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8, + 0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00, + 0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC, + 0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C, + 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8, + 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, + 0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C, + 0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C, + 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, + 0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, + 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, + 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, + 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, + 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC +}; + +/** + * \brief Prepare to write GRAM data for ili93xx. + */ +static void ili93xx_write_ram_prepare(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Write Data to GRAM (R22h) */ + LCD_IR(0); + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** memory write command (R2Ch)*/ + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(0); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + } +} + +/** + * \brief Write data to LCD GRAM. + * + * \param ul_color 24-bits RGB color. + */ +static void ili93xx_write_ram(ili93xx_color_t ul_color) +{ + LCD_WD((ul_color >> 16) & 0xFF); + LCD_WD((ul_color >> 8) & 0xFF); + LCD_WD(ul_color & 0xFF); +} + +/** + * \brief Write multiple data in buffer to LCD controller for ili93xx. + * + * \param p_ul_buf data buffer. + * \param ul_size size in pixels. + */ +static void ili93xx_write_ram_buffer(const ili93xx_color_t *p_ul_buf, + uint32_t ul_size) +{ + uint32_t ul_addr; + for (ul_addr = 0; ul_addr < (ul_size - ul_size % 8); ul_addr += 8) { + ili93xx_write_ram(p_ul_buf[ul_addr]); + ili93xx_write_ram(p_ul_buf[ul_addr + 1]); + ili93xx_write_ram(p_ul_buf[ul_addr + 2]); + ili93xx_write_ram(p_ul_buf[ul_addr + 3]); + ili93xx_write_ram(p_ul_buf[ul_addr + 4]); + ili93xx_write_ram(p_ul_buf[ul_addr + 5]); + ili93xx_write_ram(p_ul_buf[ul_addr + 6]); + ili93xx_write_ram(p_ul_buf[ul_addr + 7]); + } + for (; ul_addr < ul_size; ul_addr++) { + ili93xx_write_ram(p_ul_buf[ul_addr]); + } +} + +/** + * \brief Write a word (16bits)to LCD Register. + * + * \param uc_reg register address. + * \param us_data data to be written. + */ +static void ili93xx_write_register_word(uint8_t uc_reg, uint16_t us_data) +{ + LCD_IR(0); + LCD_IR(uc_reg); + LCD_WD((us_data >> 8) & 0xFF); + LCD_WD(us_data & 0xFF); +} + +/** + * \brief Write data to LCD Register for ili93xx. + * + * \param uc_reg register address. + * \param us_data data to be written. + */ +static void ili93xx_write_register(uint8_t uc_reg, uint8_t *p_data, + uint8_t uc_datacnt) +{ +uint8_t i; + + LCD_IR(0); + LCD_IR(uc_reg); + for (i = 0; i < uc_datacnt; i++) { + LCD_WD(p_data[i]); + } +} + +/** + * \brief Prepare to read GRAM data for ili93xx. + */ +static void ili93xx_read_ram_prepare(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + LCD_IR(0); + /** Write Data to GRAM (R22h) */ + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + LCD_IR(0); + /** Write Data to GRAM (R2Eh) */ + LCD_IR(ILI9341_CMD_MEMORY_READ); + } +} + +/** + * \brief Read data to LCD GRAM for ili93xx. + * + * \note For ili9325, because pixel data LCD GRAM is 18-bits, so convertion + * to RGB 24-bits will cause low color bit lose. + * + * \return color 24-bits RGB color. + */ +static uint32_t ili93xx_read_ram(void) +{ + uint8_t value[3]; + uint32_t color; + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** dummy read*/ + value[0] = LCD_RD(); + value[1] = LCD_RD(); + /** data upper byte*/ + value[0] = LCD_RD(); + /** data lower byte */ + value[1] = LCD_RD(); + + /** Convert RGB565 to RGB888 */ + /** For BGR format */ + color = ((value[0] & 0xF8)) | ((value[0] & 0x07) << 13) | + ((value[1] & 0xE0) << 5) | + ((value[1] & 0x1F) << 19); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** dummy read */ + value[0] = LCD_RD(); + /** the highest byte - R byte*/ + value[0] = LCD_RD(); + /** the middle byte - G byte*/ + value[1] = LCD_RD(); + /** the lowest byte - B byte*/ + value[2] = LCD_RD(); + /** combine R, G, B byte to a color value */ + color = (value[0] << 16) | (value[1] << 8) | value[2]; + } + + return color; +} + +/** + * \brief Read data from LCD Register. + * + * \param uc_reg register address. + * \param p_data the pointer to the read data. + * \param uc_datacnt the number of the read data + */ +static void ili93xx_read_register(uint8_t uc_reg, uint8_t *p_data, + uint8_t uc_datacnt) +{ +uint8_t i; + + LCD_IR(0); + LCD_IR(uc_reg); + + for (i = 0; i < uc_datacnt; i++) { + p_data[i] = LCD_RD(); + } +} + +/** + * \brief Delay function. + */ +static void ili93xx_delay(uint32_t ul_ms) +{ + volatile uint32_t i; + + for (i = 0; i < ul_ms; i++) { + for (i = 0; i < 100000; i++) { + } + } +} + +/** + * \brief Check box coordinates. + * + * \param p_ul_x1 X coordinate of upper-left corner on LCD. + * \param p_ul_y1 Y coordinate of upper-left corner on LCD. + * \param p_ul_x2 X coordinate of lower-right corner on LCD. + * \param p_ul_y2 Y coordinate of lower-right corner on LCD. + */ +static void ili93xx_check_box_coordinates(uint32_t *p_ul_x1, uint32_t *p_ul_y1, + uint32_t *p_ul_x2, uint32_t *p_ul_y2) +{ + uint32_t dw; + + if (*p_ul_x1 >= g_ul_lcd_x_length) { + *p_ul_x1 = g_ul_lcd_x_length - 1; + } + + if (*p_ul_x2 >= g_ul_lcd_x_length) { + *p_ul_x2 = g_ul_lcd_x_length - 1; + } + + if (*p_ul_y1 >= g_ul_lcd_y_length) { + *p_ul_y1 = g_ul_lcd_y_length - 1; + } + + if (*p_ul_y2 >= g_ul_lcd_y_length) { + *p_ul_y2 = g_ul_lcd_y_length - 1; + } + + if (*p_ul_x1 > *p_ul_x2) { + dw = *p_ul_x1; + *p_ul_x1 = *p_ul_x2; + *p_ul_x2 = dw; + } + + if (*p_ul_y1 > *p_ul_y2) { + dw = *p_ul_y1; + *p_ul_y1 = *p_ul_y2; + *p_ul_y2 = dw; + } +} + +/** + * \brief Read device ID to idenfity the device + * ILI9325 device ID locates in Device Code Read (R00h) register. + * ILI9341 device ID locates in Read ID4 (RD3h) register. + * + * \return 0 if secceed in identifying device; otherwise fails. + */ +uint8_t ili93xx_device_type_identify(void) +{ + uint8_t paratable[6]; + uint16_t chipid; + + /** Read ID4 (RD4h) register to get device code for ILI9341*/ + ili93xx_read_register(ILI9341_CMD_READ_ID4, paratable, 4); + chipid = ((uint16_t)paratable[2] << 8) + paratable[3]; + + if (chipid == ILI9341_DEVICE_CODE) { + g_uc_device_type = DEVICE_TYPE_ILI9341; + return 0; + } + + /** Driver Code Read (R00h) for ILI9325*/ + ili93xx_read_register(ILI9325_DEVICE_CODE_REG, paratable, 2); + chipid = ((uint16_t)paratable[0] << 8) + paratable[1]; + if (chipid == ILI9325_DEVICE_CODE) { + g_uc_device_type = DEVICE_TYPE_ILI9325; + return 0; + } + + return 1; +} + +/** + * \brief Initialize the ILI93XX lcd driver. + * + * \note Make sure below works have been done before calling ili93xx_init() + * 1. ILI93xx related Pins have been initialized correctly. + * 2. SMC has been configured correctly for access ILI93xx (8-bit system + * interface for now). + * + * \param p_opt pointer to ILI93xx option structure. + * + * \return 0 if initialization succeeds, otherwise fails. + */ +uint32_t ili93xx_init(struct ili93xx_opt_t *p_opt) +{ + uint8_t paratable[15]; + + /** Identify the LCD driver device*/ + if (ili93xx_device_type_identify() != 0) { + return 1; + } + + g_ul_lcd_x_length = ILI93XX_LCD_WIDTH; + g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT; + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Turn off LCD */ + ili93xx_write_register_word(ILI9325_DISP_CTRL1, ILI9325_DISP_CTRL1_GON | + ILI9325_DISP_CTRL1_DTE | ILI9325_DISP_CTRL1_D(0x03)); + + /** Start initial sequence */ + /** Disable sleep and standby mode*/ + ili93xx_write_register_word(ILI9325_POWER_CTRL1, 0x0000); + /** Start internal OSC */ + ili93xx_write_register_word(ILI9325_START_OSC_CTRL, + ILI9325_START_OSC_CTRL_EN); + /** Set SS bit and direction output from S720 to S1 */ + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1, + ILI9325_DRIVER_OUTPUT_CTRL1_SS); + /** Set 1 line inversion */ + ili93xx_write_register_word(ILI9325_LCD_DRIVING_CTRL, + ILI9325_LCD_DRIVING_CTRL_BIT10 | ILI9325_LCD_DRIVING_CTRL_EOR + | ILI9325_LCD_DRIVING_CTRL_BC0); + /** Disable resizing feature */ + ili93xx_write_register_word(ILI9325_RESIZE_CTRL, 0x0000); + /** Set the back porch and front porch */ + ili93xx_write_register_word(ILI9325_DISP_CTRL2, + ILI9325_DISP_CTRL2_BP( + 0x07) | ILI9325_DISP_CTRL2_FP(0x02)); + /** Set non-display area refresh cycle ISC[3:0] */ + ili93xx_write_register_word(ILI9325_DISP_CTRL3, 0x0000); + /** Disable FMARK function */ + ili93xx_write_register_word(ILI9325_DISP_CTRL4, 0x0000); + /** 18-bit RGB interface and writing display data by system + *interface */ + ili93xx_write_register_word(ILI9325_RGB_DISP_INTERFACE_CTRL1, + 0x0000); + /** Set the output position of frame cycle */ + ili93xx_write_register_word(ILI9325_FRAME_MAKER_POS, 0x0000); + /** RGB interface polarity */ + ili93xx_write_register_word(ILI9325_RGB_DISP_INTERFACE_CTRL2, + 0x0000); + + /** Power on sequence */ + /** Disable sleep and standby mode */ + ili93xx_write_register_word(ILI9325_POWER_CTRL1, 0x0000); + + /** + * Selects the operating frequency of the step-up circuit 1,2 + * and Sets the ratio factor of Vci. + */ + ili93xx_write_register_word(ILI9325_POWER_CTRL2, 0x0000); + /** Set VREG1OUT voltage */ + ili93xx_write_register_word(ILI9325_POWER_CTRL3, 0x0000); + /** Set VCOM amplitude */ + ili93xx_write_register_word(ILI9325_POWER_CTRL4, 0x0000); + ili93xx_delay(200); + + /** Enable power supply and source driver */ + + /** + * Adjusts the constant current and Sets the factor used + * in the step-up circuits. + */ + ili93xx_write_register_word(ILI9325_POWER_CTRL1, + ILI9325_POWER_CTRL1_SAP | ILI9325_POWER_CTRL1_BT(0x02) | + ILI9325_POWER_CTRL1_APE | + ILI9325_POWER_CTRL1_AP(0x01)); + + /** + * Select the operating frequency of the step-up circuit 1,2 and + * Sets the ratio factor of Vci + */ + ili93xx_write_register_word(ILI9325_POWER_CTRL2, + ILI9325_POWER_CTRL2_DC1(0x02) | + ILI9325_POWER_CTRL2_DC0(0x02) | ILI9325_POWER_CTRL2_VC(0x07)); + ili93xx_delay(50); + /** Internal reference voltage= Vci */ + ili93xx_write_register_word(ILI9325_POWER_CTRL3, + ILI9325_POWER_CTRL3_PON | ILI9325_POWER_CTRL3_VRH(0x0B)); + ili93xx_delay(50); + /** Set VDV[4:0] for VCOM amplitude */ + ili93xx_write_register_word(ILI9325_POWER_CTRL4, + ILI9325_POWER_CTRL4_VDV(0x11)); + /** Set VCM[5:0] for VCOMH */ + ili93xx_write_register_word(ILI9325_POWER_CTRL7, + ILI9325_POWER_CTRL7_VCM(0x19)); + /** Set Frame Rate */ + ili93xx_write_register_word(ILI9325_FRAME_RATE_AND_COLOR_CTRL, + ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(0x0D)); + ili93xx_delay(50); + + /** Adjust the Gamma Curve */ + ili93xx_write_register_word(ILI9325_GAMMA_CTL1, 0x0000); + ili93xx_write_register_word(ILI9325_GAMMA_CTL2, + ILI9325_GAMMA_CTL2_KP3(0x02) | + ILI9325_GAMMA_CTL2_KP2(0x04)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL3, + ILI9325_GAMMA_CTL3_KP5(0x02) | + ILI9325_GAMMA_CTL3_KP4(0x00)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL4, + ILI9325_GAMMA_CTL4_RP1(0x00) | + ILI9325_GAMMA_CTL4_RP0(0x07)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL5, + ILI9325_GAMMA_CTL5_VRP1(0x14) | + ILI9325_GAMMA_CTL5_VRP0(0x04)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL6, + ILI9325_GAMMA_CTL6_KN1(0x07) | + ILI9325_GAMMA_CTL6_KN0(0x05)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL7, + ILI9325_GAMMA_CTL7_KN3(0x03) | + ILI9325_GAMMA_CTL7_KN2(0x05)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL8, + ILI9325_GAMMA_CTL8_KN5(0x07) | + ILI9325_GAMMA_CTL8_KN4(0x07)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL9, + ILI9325_GAMMA_CTL9_RN1(0x07) | + ILI9325_GAMMA_CTL9_RN0(0x01)); + ili93xx_write_register_word(ILI9325_GAMMA_CTL10, + ILI9325_GAMMA_CTL10_VRN1(0x00) | + ILI9325_GAMMA_CTL10_VRN0(0x0E)); + /** + * Use the high speed write mode (HWM=1) + * When TRI = 1, data are transferred to the internal RAM in + * 8-bit x 3 transfers mode via the 8-bit interface. + * DFM Set the mode of transferring data to the internal RAM + * when TRI = 1. + * I/D[1:0] = 11 Horizontal : increment Vertical : increment, + * AM=0:Horizontal + */ + ili93xx_write_register_word(ILI9325_ENTRY_MODE, + ILI9325_ENTRY_MODE_TRI | ILI9325_ENTRY_MODE_DFM | + ILI9325_ENTRY_MODE_ID(0x01) | ILI9325_ENTRY_MODE_BGR); + /** + * Sets the number of lines to drive the LCD at an interval of 8 + * lines. The scan direction is from G320 to G1 + */ + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2, + ILI9325_DRIVER_OUTPUT_CTRL2_GS | + ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27)); + + /** Vertical Scrolling */ + /** Disable scrolling and enable the grayscale inversion */ + ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL, + ILI9325_BASE_IMG_DISP_CTRL_REV); + ili93xx_write_register_word(ILI9325_VERTICAL_SCROLL_CTRL, + 0x0000); + + /** Disable Partial Display */ + ili93xx_write_register_word(ILI9325_PARTIAL_IMG1_DISP_POS, + 0x0000); + ili93xx_write_register_word( + ILI9325_PARTIAL_IMG1_AREA_START_LINE, + 0x0000); + ili93xx_write_register_word(ILI9325_PARTIAL_IMG1_AREA_END_LINE, + 0x0000); + ili93xx_write_register_word(ILI9325_PARTIAL_IMG2_DISP_POS, + 0x0000); + ili93xx_write_register_word( + ILI9325_PARTIAL_IMG2_AREA_START_LINE, + 0x0000); + ili93xx_write_register_word(ILI9325_PARTIAL_IMG2_AREA_END_LINE, + 0x0000); + + /** Panel Control */ + ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL1, + ILI9325_PANEL_INTERFACE_CTRL1_RTNI(0x10)); + ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL2, + ILI9325_PANEL_INTERFACE_CTRL2_NOWI(0x06)); + ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL4, + ILI9325_PANEL_INTERFACE_CTRL4_DIVE(0x01) | + ILI9325_PANEL_INTERFACE_CTRL4_RTNE(0x10)); + + ili93xx_set_window(0, 0, p_opt->ul_width, p_opt->ul_height); + ili93xx_set_foreground_color(p_opt->foreground_color); + ili93xx_set_cursor_position(0, 0); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** init for ILI9341 **/ + /** power control A configuration*/ + paratable[0] = 0x39; + paratable[1] = 0x2C; + paratable[2] = 0x00; + paratable[3] = 0x34; + paratable[4] = 0x02; + ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_A, paratable, 5); + + /** power control B configuration */ + paratable[0] = 0; + paratable[1] = 0xAA; + paratable[2] = 0xB0; + ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_B, paratable, 3); + + /** Pump Ratio Control configuration */ + paratable[0] = 0x30; + ili93xx_write_register(ILI9341_CMD_PUMP_RATIO_CONTROL, + paratable, 1); + + /** Power Control 1 configuration*/ + paratable[0] = 0x25; + ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_1, paratable, 1); + + /** Power Control 2 configuration*/ + paratable[0] = 0x11; + ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_2, paratable, 1); + + /** VOM Control 1 configuration*/ + paratable[0] = 0x5C; + paratable[1] = 0x4C; + ili93xx_write_register(ILI9341_CMD_VCOM_CONTROL_1, paratable, 2); + + /** VOM control 2 configuration*/ + paratable[0] = 0x94; + ili93xx_write_register(ILI9341_CMD_VCOM_CONTROL_2, paratable, 1); + + /** Driver Timing Control A configuration*/ + paratable[0] = 0x85; + paratable[1] = 0x01; + paratable[2] = 0x78; + ili93xx_write_register(ILI9341_CMD_DRIVER_TIMING_CTL_A, paratable, 3); + + /** Driver Timing Control B configuration*/ + paratable[0] = 0x00; + paratable[1] = 0x00; + ili93xx_write_register(ILI9341_CMD_DRIVER_TIMING_CTL_B, paratable, 2); + + /** Memory Access Control configuration*/ + paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX | + ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR; + ili93xx_write_register(ILI9341_CMD_MEMORY_ACCESS_CONTROL, + paratable, 1); + + /** Colmod Pixel Format Set configuation*/ + paratable[0] = 0x06; + ili93xx_write_register(ILI9341_CMD_PIXEL_FORMAT_SET, paratable, 1); + + /** Display Function Control */ + paratable[0] = 0x02; + paratable[1] = 0x82; + paratable[2] = 0x27; + paratable[3] = 0x00; + ili93xx_write_register(ILI9341_CMD_DISPLAY_FUNCTION_CTL, + paratable, 4); + + paratable[0] = 0x00; + ili93xx_write_register(ILI9341_CMD_ENABLE_3_GAMMA_CONTROL, + paratable,1); + + paratable[0] = 0x01; + ili93xx_write_register(ILI9341_CMD_GAMMA_SET, paratable,1); + + /** set gamma curve parameters*/ + paratable[0]=0x0F; + paratable[1]=0x31; + paratable[2]=0x2B; + paratable[3]=0x0C; + paratable[4]=0x0E; + paratable[5]=0x08; + paratable[6]=0x4E; + paratable[7]=0xF1; + paratable[8]=0x37; + paratable[9]=0x07; + paratable[10]=0x10; + paratable[11]=0x03; + paratable[12]=0x0E; + paratable[13]=0x09; + paratable[14]=0x00; + ili93xx_write_register(ILI9341_CMD_POSITIVE_GAMMA_CORRECTION, + paratable, 15); + paratable[0]=0x00; + paratable[1]=0x0E; + paratable[2]=0x14; + paratable[3]=0x03; + paratable[4]=0x11; + paratable[5]=0x07; + paratable[6]=0x31; + paratable[7]=0xC1; + paratable[8]=0x48; + paratable[9]=0x08; + paratable[10]=0x0F; + paratable[11]=0x0C; + paratable[12]=0x31; + paratable[13]=0x36; + paratable[14]=0x0F; + ili93xx_write_register(ILI9341_CMD_NEGATIVE_GAMMA_CORRECTION, + paratable, 15); + + /** set window area*/ + ili93xx_set_window(0, 0, p_opt->ul_width, p_opt->ul_height); + ili93xx_set_foreground_color(p_opt->foreground_color); + /** Leave sleep mode*/ + ili93xx_write_register(ILI9341_CMD_SLEEP_OUT, paratable, 0); + ili93xx_delay(10); + /** Display on*/ + ili93xx_write_register(ILI9341_CMD_DISPLAY_ON, paratable, 0); + } else { + /** exit with return value 1 if device type is not supported.*/ + return 1; + } + + return 0; +} + +/** + * \brief get the device type. + */ +uint8_t ili93xx_device_type(void) +{ + return g_uc_device_type; +} + +/** + * \brief Turn on the LCD. + */ +void ili93xx_display_on(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_write_register_word(ILI9325_DISP_CTRL1, + ILI9325_DISP_CTRL1_BASEE | + ILI9325_DISP_CTRL1_GON | + ILI9325_DISP_CTRL1_DTE | + ILI9325_DISP_CTRL1_D(0x03)); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_write_register(ILI9341_CMD_DISPLAY_ON, NULL, 0); + } +} + +/** + * \brief Turn off the LCD. + */ +void ili93xx_display_off(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_write_register_word(ILI9325_DISP_CTRL1, 0x00); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_write_register(ILI9341_CMD_DISPLAY_OFF, NULL, 0); + } +} + +/** + * \brief Set foreground color. + * + * \param ul_color foreground color. + */ +void ili93xx_set_foreground_color(ili93xx_color_t ul_color) +{ + uint32_t i; + + /** Fill the cache with selected color */ + for (i = 0; i < LCD_DATA_CACHE_SIZE; ++i) { + g_ul_pixel_cache[i] = ul_color; + } +} + +/** + * \brief Fill the LCD buffer with the specified color. + * + * \param ul_color fill color. + */ +void ili93xx_fill(ili93xx_color_t ul_color) +{ + uint32_t dw; + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_set_cursor_position(0, 0); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length); + } + + ili93xx_write_ram_prepare(); + + for (dw = ILI93XX_LCD_WIDTH * ILI93XX_LCD_HEIGHT; dw > 0; dw--) { + ili93xx_write_ram(ul_color); + } +} + +/** + * \brief Set display window. + * + * \param ul_x Horizontal address start position + * \param ul_y Vertical address start position + * \param ul_width The width of the window. + * \param ul_height The height of the window. + */ +void ili93xx_set_window(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width, + uint32_t ul_height) +{ + Assert(ul_x <= (g_ul_lcd_x_length - 1)); + Assert(ul_y <= (g_ul_lcd_y_length - 1)); + Assert(ul_width <= (g_ul_lcd_x_length - ul_x)); + Assert(ul_height <= (g_ul_lcd_y_length - ul_y)); + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Set Horizontal Address Start Position */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_START, + (uint16_t)ul_x); + + /** Set Horizontal Address End Position */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_END, + (uint16_t)(ul_x + ul_width - 1)); + + /** Set Vertical Address Start Position */ + ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_START, + (uint16_t)ul_y); + + /** Set Vertical Address End Position */ + ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_END, + (uint16_t)(ul_y + ul_height - 1)); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + uint8_t paratable[4]; + + /** Set Column Address Position */ + paratable[0] = (ul_x >> 8) & 0xFF; + paratable[1] = ul_x & 0xFF; + paratable[2] = ((ul_x + ul_width - 1) >> 8) & 0xFF; + paratable[3] = (ul_x + ul_width - 1) & 0xFF; + ili93xx_write_register(ILI9341_CMD_COLUMN_ADDRESS_SET, + paratable, 4); + + /** Set Page Address Position */ + paratable[0] = (ul_y >> 8) & 0xFF; + paratable[1] = ul_y & 0xFF; + paratable[2] = ((ul_y + ul_height - 1) >> 8) & 0xFF; + paratable[3] = (ul_y + ul_height - 1) & 0xFF; + ili93xx_write_register(ILI9341_CMD_PAGE_ADDRESS_SET, + paratable, 4); + } +} + +/** + * \brief Set cursor of LCD screen. + * + * \param us_x X coordinate of upper-left corner on LCD. + * \param us_y Y coordinate of upper-left corner on LCD. + */ +void ili93xx_set_cursor_position(uint16_t us_x, uint16_t us_y) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** GRAM Horizontal/Vertical Address Set (R20h, R21h) */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_GRAM_ADDR_SET, us_x); + ili93xx_write_register_word(ILI9325_VERTICAL_GRAM_ADDR_SET, us_y); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** There is no corresponding operation for ILI9341. */ + } +} + +/** + * \brief Scroll up/down for the number of specified lines. + * + * \param ul_lines number of lines to scroll. + */ +void ili93xx_scroll(int32_t ul_lines) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_write_register_word(ILI9325_VERTICAL_SCROLL_CTRL, ul_lines); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + uint8_t paratable[2]; + + paratable[0] = (ul_lines >> 8) & 0xFF; + paratable[1] = ul_lines & 0xFF; + ili93xx_write_register(ILI9341_CMD_VERT_SCROLL_START_ADDRESS, + paratable, 2); + } +} + +/** + * \brief Vertical Scroll area definition for ili9341. + * + * \param us_tfa the top fixed area (the No. of lines) + * \param us_vsa the height of the vetical scrolling area + * \param us_bfa the bottom fixed area (the No. of lines) + */ +void ili93xx_vscroll_area_define(uint16_t us_tfa, uint16_t us_vsa, + uint16_t us_bfa) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + uint8_t paratable[6]; + + paratable[0] = (us_tfa >> 8) & 0xFF; + paratable[1] = us_tfa & 0xFF; + paratable[2] = (us_vsa >> 8) & 0xFF; + paratable[3] = us_vsa & 0xFF; + paratable[4] = (us_bfa >> 8) & 0xFF; + paratable[5] = us_bfa & 0xFF; + ili93xx_write_register(ILI9341_CMD_VERT_SCROLL_DEFINITION, + paratable, 6); + } +} + +/** + * \brief Enable the scrolling feature. + */ +void ili93xx_enable_scroll(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL, + ILI9325_BASE_IMG_DISP_CTRL_REV | + ILI9325_BASE_IMG_DISP_CTRL_VLE); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** no operation needed for ILI9341*/ + } +} + +/** + * \brief Disable the scrolling feature. + */ +void ili93xx_disable_scroll(void) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL, + ILI9325_BASE_IMG_DISP_CTRL_REV); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_display_off(); + ili93xx_write_register(ILI9341_CMD_NORMAL_DISP_MODE_ON, NULL, 0); + ili93xx_display_on(); + } +} + +/** + * \brief Set display direction. + * + * \param e_dd 0: horizontal direction, 1: vertical direction + * \param e_shd: horizontal increase(0) or decrease(1) + * \param e_scd: vertical increase(1) or decrease(0) + */ +void ili93xx_set_display_direction(enum ili93xx_display_direction e_dd, + enum ili93xx_shift_direction e_shd, + enum ili93xx_scan_direction e_scd) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + if (e_dd == LANDSCAPE) { + ili93xx_write_register_word(ILI9325_ENTRY_MODE, + ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | + ILI9325_ENTRY_MODE_DFM | ILI9325_ENTRY_MODE_ID(0x00)| + ILI9325_ENTRY_MODE_AM); + g_ul_lcd_x_length = ILI93XX_LCD_HEIGHT; + g_ul_lcd_y_length = ILI93XX_LCD_WIDTH; + } else { + ili93xx_write_register_word(ILI9325_ENTRY_MODE, + ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI | + ILI9325_ENTRY_MODE_DFM | ILI9325_ENTRY_MODE_ID(0x01)); + g_ul_lcd_x_length = ILI93XX_LCD_WIDTH; + g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT; + } + + if (e_shd == H_INCREASE) { + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1, 0x0000); + } else { + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1, + ILI9325_DRIVER_OUTPUT_CTRL1_SS); + } + + if (e_scd == V_INCREASE) { + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2, + ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27)); + } else { + ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2, + ILI9325_DRIVER_OUTPUT_CTRL2_GS | + ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27)); + } + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + if (e_dd == LANDSCAPE) { + uint8_t paratable[1]; + paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_MV | + ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR; + ili93xx_write_register( + ILI9341_CMD_MEMORY_ACCESS_CONTROL, + paratable, 1); + g_ul_lcd_x_length = ILI93XX_LCD_HEIGHT; + g_ul_lcd_y_length = ILI93XX_LCD_WIDTH; + } else { + uint8_t paratable[1]; + paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR | + ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX; + ili93xx_write_register( + ILI9341_CMD_MEMORY_ACCESS_CONTROL, + paratable, 1); + g_ul_lcd_x_length = ILI93XX_LCD_WIDTH; + g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT; + } + } +} + +/** + * \brief Draw a pixel on LCD. + * + * \param ul_x X coordinate of pixel. + * \param ul_y Y coordinate of pixel. + * + * \return 0 if succeeds, otherwise fails. + */ +uint32_t ili93xx_draw_pixel(uint32_t ul_x, uint32_t ul_y) +{ + if ((ul_x >= g_ul_lcd_x_length) || (ul_y >= g_ul_lcd_y_length)) { + return 1; + } + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Set cursor */ + ili93xx_set_cursor_position(ul_x, ul_y); + /** Prepare to write in GRAM */ + ili93xx_write_ram_prepare(); + ili93xx_write_ram(*g_ul_pixel_cache); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_set_window(ul_x, ul_y, 0, 0); + /** Prepare to write in GRAM */ + ili93xx_write_ram_prepare(); + ili93xx_write_ram(*g_ul_pixel_cache); + } + + return 0; +} + +/** + * \brief Get a pixel from LCD. + * + * \param ul_x X coordinate of pixel. + * \param ul_y Y coordinate of pixel. + * + * \return the pixel color. + */ +ili93xx_color_t ili93xx_get_pixel(uint32_t ul_x, uint32_t ul_y) +{ + Assert(ul_x <= g_ul_lcd_x_length); + Assert(ul_y <= g_ul_lcd_y_length); + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Set cursor */ + ili93xx_set_cursor_position(ul_x, ul_y); + /** Prepare to write in GRAM */ + ili93xx_read_ram_prepare(); + return ili93xx_read_ram(); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + ili93xx_set_window(ul_x, ul_y, 0, 0); + /** Prepare to write in GRAM */ + ili93xx_read_ram_prepare(); + return ili93xx_read_ram(); + } + + return 0; +} + +/** + * \brief Draw a line on LCD, which is not horizontal or vertical. + * + * \param ul_x1 X coordinate of line start. + * \param ul_y1 Y coordinate of line start. + * \param ul_x2 X coordinate of line end. + * \param ul_y2 Y coordinate of line endl. + */ +static void ili93xx_draw_line_bresenham(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2) +{ + int dx, dy; + int i; + int xinc, yinc, cumul; + int x, y; + + x = ul_x1; + y = ul_y1; + dx = ul_x2 - ul_x1; + dy = ul_y2 - ul_y1; + xinc = (dx > 0) ? 1 : -1; + yinc = (dy > 0) ? 1 : -1; + dx = abs(ul_x2 - ul_x1); + dy = abs(ul_y2 - ul_y1); + + ili93xx_draw_pixel(x, y); + + if (dx > dy) { + cumul = dx >> 1; + + for (i = 1; i <= dx; i++) { + x += xinc; + cumul += dy; + + if (cumul >= dx) { + cumul -= dx; + y += yinc; + } + + ili93xx_draw_pixel(x, y); + } + } else { + cumul = dy >> 1; + + for (i = 1; i <= dy; i++) { + y += yinc; + cumul += dx; + + if (cumul >= dy) { + cumul -= dy; + x += xinc; + } + + ili93xx_draw_pixel(x, y); + } + } +} + +/** + * \brief Draw a line on LCD. + * + * \param ul_x1 X coordinate of line start. + * \param ul_y1 Y coordinate of line start. + * \param ul_x2 X coordinate of line end. + * \param ul_y2 Y coordinate of line end. + */ +void ili93xx_draw_line(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2) +{ + if ((ul_y1 == ul_y2) || (ul_x1 == ul_x2)) { + ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x2, ul_y2); + } else { + ili93xx_draw_line_bresenham(ul_x1, ul_y1, ul_x2, ul_y2); + } +} + +/** + * \brief Draw a rectangle on LCD. + * + * \param ul_x1 X coordinate of upper-left corner on LCD. + * \param ul_y1 Y coordinate of upper-left corner on LCD. + * \param ul_x2 X coordinate of lower-right corner on LCD. + * \param ul_y2 Y coordinate of lower-right corner on LCD. + */ +void ili93xx_draw_rectangle(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2) +{ + ili93xx_check_box_coordinates(&ul_x1, &ul_y1, &ul_x2, &ul_y2); + + ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x2, ul_y1); + ili93xx_draw_filled_rectangle(ul_x1, ul_y2, ul_x2, ul_y2); + + ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x1, ul_y2); + ili93xx_draw_filled_rectangle(ul_x2, ul_y1, ul_x2, ul_y2); +} + +/** + * \brief Draw a filled rectangle on LCD. + * + * \param ul_x1 X coordinate of upper-left corner on LCD. + * \param ul_y1 Y coordinate of upper-left corner on LCD. + * \param ul_x2 X coordinate of lower-right corner on LCD. + * \param ul_y2 Y coordinate of lower-right corner on LCD. + */ +void ili93xx_draw_filled_rectangle(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2) +{ + uint32_t size, blocks; + + /** Swap coordinates if necessary */ + ili93xx_check_box_coordinates(&ul_x1, &ul_y1, &ul_x2, &ul_y2); + + /** Determine the refresh window area */ + ili93xx_set_window(ul_x1, ul_y1, (ul_x2 - ul_x1) + 1, + (ul_y2 - ul_y1) + 1); + + /** Set cursor */ + ili93xx_set_cursor_position(ul_x1, ul_y1); + + /** Prepare to write in Graphic RAM */ + ili93xx_write_ram_prepare(); + + size = (ul_x2 - ul_x1 + 1) * (ul_y2 - ul_y1 + 1); + + /** Send pixels blocks => one SPI IT / block */ + blocks = size / LCD_DATA_CACHE_SIZE; + while (blocks--) { + ili93xx_write_ram_buffer(g_ul_pixel_cache, + LCD_DATA_CACHE_SIZE); + } + + /** Send remaining pixels */ + ili93xx_write_ram_buffer(g_ul_pixel_cache, + size % LCD_DATA_CACHE_SIZE); + + /** Reset the refresh window area */ + ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length); +} + +/** + * \brief Draw a circle on LCD. + * + * \param ul_x X coordinate of circle center. + * \param ul_y Y coordinate of circle center. + * \param ul_r circle radius. + * + * \return 0 if succeeds, otherwise fails. + */ +uint32_t ili93xx_draw_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r) +{ + int32_t d; + uint32_t curX; + uint32_t curY; + + if (ul_r == 0) { + return 1; + } + + d = 3 - (ul_r << 1); + curX = 0; + curY = ul_r; + + while (curX <= curY) { + ili93xx_draw_pixel(ul_x + curX, ul_y + curY); + ili93xx_draw_pixel(ul_x + curX, ul_y - curY); + ili93xx_draw_pixel(ul_x - curX, ul_y + curY); + ili93xx_draw_pixel(ul_x - curX, ul_y - curY); + ili93xx_draw_pixel(ul_x + curY, ul_y + curX); + ili93xx_draw_pixel(ul_x + curY, ul_y - curX); + ili93xx_draw_pixel(ul_x - curY, ul_y + curX); + ili93xx_draw_pixel(ul_x - curY, ul_y - curX); + + if (d < 0) { + d += (curX << 2) + 6; + } else { + d += ((curX - curY) << 2) + 10; + curY--; + } + + curX++; + } + + return 0; +} + +/** + * \brief Draw a filled circle on LCD. + * + * \param ul_x X coordinate of circle center. + * \param ul_y Y coordinate of circle center. + * \param ul_r circle radius. + * + * \return 0 if succeeds, otherwise fails. + */ +uint32_t ili93xx_draw_filled_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r) +{ + signed int d; /* Decision Variable */ + uint32_t dwCurX; /* Current X Value */ + uint32_t dwCurY; /* Current Y Value */ + uint32_t dwXmin, dwYmin; + + if (ul_r == 0) { + return 1; + } + + d = 3 - (ul_r << 1); + dwCurX = 0; + dwCurY = ul_r; + + while (dwCurX <= dwCurY) { + dwXmin = (dwCurX > ul_x) ? 0 : ul_x - dwCurX; + dwYmin = (dwCurY > ul_y) ? 0 : ul_y - dwCurY; + ili93xx_draw_filled_rectangle(dwXmin, dwYmin, ul_x + dwCurX, + dwYmin); + ili93xx_draw_filled_rectangle(dwXmin, ul_y + dwCurY, + ul_x + dwCurX, ul_y + dwCurY); + dwXmin = (dwCurY > ul_x) ? 0 : ul_x - dwCurY; + dwYmin = (dwCurX > ul_y) ? 0 : ul_y - dwCurX; + ili93xx_draw_filled_rectangle(dwXmin, dwYmin, ul_x + dwCurY, + dwYmin); + ili93xx_draw_filled_rectangle(dwXmin, ul_y + dwCurX, + ul_x + dwCurY, ul_y + dwCurX); + + if (d < 0) { + d += (dwCurX << 2) + 6; + } else { + d += ((dwCurX - dwCurY) << 2) + 10; + dwCurY--; + } + + dwCurX++; + } + + return 0; +} + +/** + * \brief Draw an ASCII character on LCD. + * + * \param ul_x X coordinate of character upper-left corner. + * \param ul_y Y coordinate of character upper-left corner. + * \param uc_c character to print. + */ +static void ili93xx_draw_char(uint32_t ul_x, uint32_t ul_y, uint8_t uc_c) +{ + uint32_t row, col; + uint32_t offset, offset0, offset1; + + /** + * Compute offset according of the specified ASCII character + * Note: the first 32 characters of the ASCII table are not handled + */ + offset = ((uint32_t)uc_c - 0x20) * 20; + + for (col = 0; col < 10; col++) { + /** Compute the first and second byte offset of a column */ + offset0 = offset + col * 2; + offset1 = offset0 + 1; + + /** + * Draw pixel on screen depending on the corresponding bit value + * from the charset + */ + for (row = 0; row < 8; row++) { + if ((p_uc_charset10x14[offset0] >> (7 - row)) & 0x1) { + ili93xx_draw_pixel(ul_x + col, ul_y + row); + } + } + + for (row = 0; row < 6; row++) { + if ((p_uc_charset10x14[offset1] >> (7 - row)) & 0x1) { + ili93xx_draw_pixel(ul_x + col, ul_y + row + 8); + } + } + } +} + +/** + * \brief Draw a string on LCD. + * + * \param ul_x X coordinate of string top-left corner. + * \param ul_y Y coordinate of string top-left corner. + * \param p_str String to display. + */ +void ili93xx_draw_string(uint32_t ul_x, uint32_t ul_y, const uint8_t *p_str) +{ + uint32_t xorg = ul_x; + + while (*p_str != 0) { + /** If newline, jump to the next line (font height + 2) */ + if (*p_str == '\n') { + ul_y += gfont.height + 2; + ul_x = xorg; + } else { + /** + * Draw the character and place cursor right after (font + * width + 2) + */ + ili93xx_draw_char(ul_x, ul_y, *p_str); + ul_x += gfont.width + 2; + } + + p_str++; + } +} + +/** + * \brief Draw a pixmap on LCD. + * + * \param ul_x X coordinate of upper-left corner on LCD. + * \param ul_y Y coordinate of upper-left corner on LCD. + * \param ul_width width of the picture. + * \param ul_height height of the picture. + * \param p_ul_pixmap pixmap of the image. + */ +void ili93xx_draw_pixmap(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width, + uint32_t ul_height, const ili93xx_color_t *p_ul_pixmap) +{ + uint32_t size; + uint32_t dwX1, dwY1, dwX2, dwY2; + dwX1 = ul_x; + dwY1 = ul_y; + dwX2 = ul_x + ul_width; + dwY2 = ul_y + ul_height; + + /** Swap coordinates if necessary */ + ili93xx_check_box_coordinates(&dwX1, &dwY1, &dwX2, &dwY2); + + /** Determine the refresh window area */ + ili93xx_set_window(dwX1, dwY1, (dwX2 - dwX1 + 1), (dwY2 - dwY1 + 1)); + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Set cursor */ + ili93xx_set_cursor_position(dwX1, dwY1); + /** Prepare to write in GRAM */ + ili93xx_write_ram_prepare(); + + size = (dwX2 - dwX1) * (dwY2 - dwY1); + + ili93xx_write_ram_buffer(p_ul_pixmap, size); + + /** Reset the refresh window area */ + ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** Prepare to write in GRAM */ + ili93xx_write_ram_prepare(); + + size = (dwX2 - dwX1) * (dwY2 - dwY1); + + ili93xx_write_ram_buffer(p_ul_pixmap, size); + + /** Reset the refresh window area */ + ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length); + } +} + +/** + * \internal + * \brief Helper function to send the drawing limits (boundaries) to the display + * + * This function is used to send the currently set upper-left and lower-right + * drawing limits to the display, as set through the various limit functions. + * + * \param send_end_limits True to also send the lower-right drawing limits + */ +static inline void ili93xx_send_draw_limits(const bool send_end_limits) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Set Horizontal Address Start Position */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_START, + (uint16_t)limit_start_x); + + if (send_end_limits) { + /** Set Horizontal Address End Position */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_END, + (uint16_t)(limit_end_x)); + } + + /** Set Vertical Address Start Position */ + ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_START, + (uint16_t)limit_start_y); + if (send_end_limits) { + /** Set Vertical Address End Position */ + ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_END, + (uint16_t)(limit_end_y)); + } + + /** GRAM Horizontal/Vertical Address Set (R20h, R21h) */ + ili93xx_write_register_word(ILI9325_HORIZONTAL_GRAM_ADDR_SET, + limit_start_x); + ili93xx_write_register_word(ILI9325_VERTICAL_GRAM_ADDR_SET, + limit_start_y); + + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** Set Horizontal Address Start Position */ + ili93xx_write_register_word(ILI9341_CMD_COLUMN_ADDRESS_SET, + (uint16_t)limit_start_x); + + if (send_end_limits) { + /** Set Horizontal Address End Position */ + ili93xx_write_register_word( + ILI9341_CMD_COLUMN_ADDRESS_SET, + (uint16_t)(limit_end_x)); + } + + ili93xx_write_register(0, NULL, 0); + + /** Set Vertical Address Start Position */ + ili93xx_write_register_word(ILI9341_CMD_PAGE_ADDRESS_SET, + (uint16_t)limit_start_y); + if (send_end_limits) { + /** Set Vertical Address End Position */ + ili93xx_write_register_word( + ILI9341_CMD_PAGE_ADDRESS_SET, + (uint16_t)(limit_end_y)); + } + + ili93xx_write_register(0, NULL, 0); + } +} + +/** + * \brief Set the display top left drawing limit + * + * Use this function to set the top left limit of the drawing limit box. + * + * \param x The x coordinate of the top left corner + * \param y The y coordinate of the top left corner + */ +void ili93xx_set_top_left_limit(ili93xx_coord_t x, ili93xx_coord_t y) +{ + limit_start_x = x; + limit_start_y = y; + + ili93xx_send_draw_limits(false); +} + +/** + * \brief Set the display bottom right drawing limit + * + * Use this function to set the bottom right corner of the drawing limit box. + * + * \param x The x coordinate of the bottom right corner + * \param y The y coordinate of the bottom right corner + */ +void ili93xx_set_bottom_right_limit(ili93xx_coord_t x, ili93xx_coord_t y) +{ + limit_end_x = x; + limit_end_y = y; + + ili93xx_send_draw_limits(true); +} + +/** + * \brief Set the full display drawing limits + * + * Use this function to set the full drawing limit box. + * + * \param start_x The x coordinate of the top left corner + * \param start_y The y coordinate of the top left corner + * \param end_x The x coordinate of the bottom right corner + * \param end_y The y coordinate of the bottom right corner + */ +void ili93xx_set_limits(ili93xx_coord_t start_x, ili93xx_coord_t start_y, + ili93xx_coord_t end_x, ili93xx_coord_t end_y) +{ + limit_start_x = start_x; + limit_start_y = start_y; + limit_end_x = end_x; + limit_end_y = end_y; + + ili93xx_send_draw_limits(true); +} + +/** + * \brief Read a single color from the graphical memory + * + * Use this function to read a color from the graphical memory of the + * controller. + * + * \retval ili93xx_color_t The read color pixel + */ +ili93xx_color_t ili93xx_read_gram(void) +{ + uint8_t value[3]; + ili93xx_color_t color; + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + LCD_IR(0); + /** Write Data to GRAM (R22h) */ + LCD_IR(ILI9325_GRAM_DATA_REG); + /** two dummy read */ + value[0] = LCD_RD(); + value[1] = LCD_RD(); + /** data upper byte */ + value[0] = LCD_RD(); + /** data lower byte */ + value[1] = LCD_RD(); + + /** Convert RGB565 to RGB888 */ + /** For BGR format */ + color = ((value[0] & 0xF8)) | + ((value[0] & 0x07) << 13) | ((value[1] & 0xE0) << 5) | + ((value[1] & 0x1F) << 19); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + LCD_IR(0); + /** Write Data to GRAM (R2Eh) */ + LCD_IR(ILI9341_CMD_MEMORY_READ); + /** dummy read */ + value[0] = LCD_RD(); + /** the highest byte - R byte*/ + value[0] = LCD_RD(); + /** the middle byte - G byte*/ + value[1] = LCD_RD(); + /** the lowest byte - B byte*/ + value[2] = LCD_RD(); + /** combine R, G, B byte to a color value */ + color = (value[0] << 16) | (value[1] << 8) | value[2]; + } + return color; +} + +/** + * \brief Write the graphical memory with a single color pixel + * + * Use this function to write a single color pixel to the controller memory. + * + * \param color The color pixel to write to the screen + */ +void ili93xx_write_gram(ili93xx_color_t color) +{ + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + LCD_IR(0); + /** Write Data to GRAM (R22h) */ + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + /** memory write command (R2Ch)*/ + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(0); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + } + LCD_WD((color >> 16) & 0xFF); + LCD_WD((color >> 8) & 0xFF); + LCD_WD(color & 0xFF); +} + +/** + * \brief Copy pixels from SRAM to the screen + * + * Used to copy a large quantitative of data to the screen in one go. + * + * \param pixels Pointer to the pixel data + * \param count Number of pixels to copy to the screen + */ +void ili93xx_copy_pixels_to_screen(const ili93xx_color_t *pixels, + uint32_t count) +{ + /** Sanity check to make sure that the pixel count is not zero */ + Assert(count > 0); + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + LCD_IR(0); + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(0); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + } + + while (count--) { + LCD_WD((*pixels >> 16) & 0xFF); + LCD_WD((*pixels >> 8) & 0xFF); + LCD_WD(*pixels & 0xFF); + pixels++; + } +} + +/** + * \brief Copy pixels from SRAM to the screen + * + * Used to copy a large quantitative of data to the screen in one go. + * + * \param pixels Pointer to the pixel data + * \param count Number of pixels to copy to the screen + */ +void ili93xx_copy_raw_pixel_24bits_to_screen(const uint8_t *raw_pixels, + uint32_t count) +{ + ili93xx_color_t pixels; + + /** Sanity check to make sure that the pixel count is not zero */ + Assert(count > 0); + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + LCD_IR(0); + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(0); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + } + while (count--) { + pixels = (*raw_pixels) | + (*(raw_pixels +1)) << 8 | + (*(raw_pixels + 2)) << 16; + LCD_WD((pixels >> 16) & 0xFF); + LCD_WD((pixels >> 8) & 0xFF); + LCD_WD(pixels & 0xFF); + raw_pixels += 3; + } +} + +/** + * \brief Set a given number of pixels to the same color + * + * Use this function to write a certain number of pixels to the same color + * within a set limit. + * + * \param color The color to write to the display + * \param count The number of pixels to write with this color + */ +void ili93xx_duplicate_pixel(const ili93xx_color_t color, uint32_t count) +{ + /** Sanity check to make sure that the pixel count is not zero */ + Assert(count > 0); + + if (g_uc_device_type == DEVICE_TYPE_ILI9325) { + /** Write Data to GRAM (R22h) */ + LCD_IR(0); + LCD_IR(ILI9325_GRAM_DATA_REG); + } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) { + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(0); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + } + + while (count--) { + LCD_WD((color >> 16) & 0xFF); + LCD_WD((color >> 8) & 0xFF); + LCD_WD(color & 0xFF); + } +} + +/** + * \brief Copy pixels from the screen to a pixel buffer + * + * Use this function to copy pixels from the display to an internal SRAM buffer. + * + * \param pixels Pointer to the pixel buffer to read to + * \param count Number of pixels to read + */ +void ili93xx_copy_pixels_from_screen(ili93xx_color_t *pixels, uint32_t count) +{ + /** Remove warnings */ + UNUSED(pixels); + UNUSED(count); +} + +/** + * \} + */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h new file mode 100644 index 000000000..61ba2140d --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h @@ -0,0 +1,349 @@ +/** + * \file + * + * \brief API driver for ili93xx TFT display component. + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ILI93XX_H_INCLUDED +#define ILI93XX_H_INCLUDED + +/** + * \defgroup ili93xx_display_group - LCD with ili93xx component driver + * + * This is a driver for LCD with ili93xx. Now this driver supports ili9325 and + * ili9341.This component is custom LCD used for SAM4E-EK. + * The driver provides functions for initializtion and control of the LCD. + * + * See \ref sam_component_ili93xx_quickstart. + * + * \{ + */ + +#include "compiler.h" +#include "board.h" +#include "conf_ili93xx.h" + +/** @cond 0 */ +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/** @endcond */ + +/** Type define for an integer type large enough to store a pixel color. */ +typedef uint32_t ili93xx_color_t; + +/** Type define for an integer type large enough to store a pixel coordinate. + */ +typedef int16_t ili93xx_coord_t; + +/** This macro generates a 16-bit native color for the display from a + * 24-bit RGB value. + */ +#define ili93xx_COLOR(r, g, b) ((r << 16) | (g << 8) | b) + +typedef ili93xx_color_t gfx_color_t; +typedef int16_t gfx_coord_t; + +/** ili93xx screen size */ +#define ILI93XX_LCD_WIDTH 240 +#define ILI93XX_LCD_HEIGHT 320 + +/** ili93xx ID code */ +#define ILI9325_DEVICE_CODE (0x9325u) +#define ILI9341_DEVICE_CODE (0x9341u) +#define DEVICE_TYPE_ILI9325 1 +#define DEVICE_TYPE_ILI9341 2 +/** Define EBI access for ILI93xx 8-bit System Interface.*/ +#if defined(BOARD_ILI93XX_ADDR) && defined (BOARD_ILI93XX_RS) +static inline void LCD_IR(uint8_t lcd_index) +{ + /** ILI9325 index register address */ + *((volatile uint8_t *)(BOARD_ILI93XX_ADDR)) = lcd_index; +} + +static inline void LCD_WD(uint8_t lcd_data) +{ + *((volatile uint8_t *)((BOARD_ILI93XX_ADDR) | (BOARD_ILI93XX_RS))) = + lcd_data; +} + +static inline uint8_t LCD_RD(void) +{ + return *((volatile uint8_t *)((BOARD_ILI93XX_ADDR) |(BOARD_ILI93XX_RS))); +} + +#else + #error "Missing module configuration for ILI93xx!" +#endif + +/** RGB 24-bits color table definition (RGB888). */ +#define COLOR_BLACK (0x000000u) +#define COLOR_WHITE (0xFFFFFFu) +#define COLOR_BLUE (0x0000FFu) +#define COLOR_GREEN (0x00FF00u) +#define COLOR_RED (0xFF0000u) +#define COLOR_NAVY (0x000080u) +#define COLOR_DARKBLUE (0x00008Bu) +#define COLOR_DARKGREEN (0x006400u) +#define COLOR_DARKCYAN (0x008B8Bu) +#define COLOR_CYAN (0x00FFFFu) +#define COLOR_TURQUOISE (0x40E0D0u) +#define COLOR_INDIGO (0x4B0082u) +#define COLOR_DARKRED (0x800000u) +#define COLOR_OLIVE (0x808000u) +#define COLOR_GRAY (0x808080u) +#define COLOR_SKYBLUE (0x87CEEBu) +#define COLOR_BLUEVIOLET (0x8A2BE2u) +#define COLOR_LIGHTGREEN (0x90EE90u) +#define COLOR_DARKVIOLET (0x9400D3u) +#define COLOR_YELLOWGREEN (0x9ACD32u) +#define COLOR_BROWN (0xA52A2Au) +#define COLOR_DARKGRAY (0xA9A9A9u) +#define COLOR_SIENNA (0xA0522Du) +#define COLOR_LIGHTBLUE (0xADD8E6u) +#define COLOR_GREENYELLOW (0xADFF2Fu) +#define COLOR_SILVER (0xC0C0C0u) +#define COLOR_LIGHTGREY (0xD3D3D3u) +#define COLOR_LIGHTCYAN (0xE0FFFFu) +#define COLOR_VIOLET (0xEE82EEu) +#define COLOR_AZUR (0xF0FFFFu) +#define COLOR_BEIGE (0xF5F5DCu) +#define COLOR_MAGENTA (0xFF00FFu) +#define COLOR_TOMATO (0xFF6347u) +#define COLOR_GOLD (0xFFD700u) +#define COLOR_ORANGE (0xFFA500u) +#define COLOR_SNOW (0xFFFAFAu) +#define COLOR_YELLOW (0xFFFF00u) + +/** + * Input parameters when initializing ili9325 driver. + */ +struct ili93xx_opt_t { + /** LCD width in pixel*/ + uint32_t ul_width; + /** LCD height in pixel*/ + uint32_t ul_height; + /** LCD foreground color*/ + uint32_t foreground_color; + /** LCD background color*/ + uint32_t background_color; +}; + +/** + * Font structure + */ +struct ili93xx_font { + /** Font width in pixels. */ + uint8_t width; + /** Font height in pixels. */ + uint8_t height; +}; + +/** + * Display direction option + */ +enum ili93xx_display_direction { + LANDSCAPE = 0, + PORTRAIT = 1 +}; + +/** + * Shift direction option + */ +enum ili93xx_shift_direction { + H_INCREASE = 0, + H_DECREASE = 1 +}; + +/** + * Scan direction option + */ +enum ili93xx_scan_direction { + V_INCREASE = 0, + V_DEREASE = 1 +}; + +uint32_t ili93xx_init(struct ili93xx_opt_t *p_opt); +void ili93xx_display_on(void); +void ili93xx_display_off(void); +void ili93xx_set_foreground_color(ili93xx_color_t ul_color); +void ili93xx_fill(ili93xx_color_t ul_color); +void ili93xx_set_window(uint32_t ul_x, uint32_t ul_y, + uint32_t ul_width, uint32_t ul_height); +void ili93xx_set_cursor_position(uint16_t us_x, uint16_t us_y); +void ili93xx_scroll(int32_t ul_lines); +void ili93xx_enable_scroll(void); +void ili93xx_disable_scroll(void); +void ili93xx_set_display_direction(enum ili93xx_display_direction e_dd, + enum ili93xx_shift_direction e_shd, + enum ili93xx_scan_direction e_scd); +uint32_t ili93xx_draw_pixel(uint32_t ul_x, uint32_t ul_y); +ili93xx_color_t ili93xx_get_pixel(uint32_t ul_x, uint32_t ul_y); +void ili93xx_draw_line(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2); +void ili93xx_draw_rectangle(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2); +void ili93xx_draw_filled_rectangle(uint32_t ul_x1, uint32_t ul_y1, + uint32_t ul_x2, uint32_t ul_y2); +uint32_t ili93xx_draw_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r); +uint32_t ili93xx_draw_filled_circle(uint32_t ul_x, uint32_t ul_y, + uint32_t ul_r); +void ili93xx_draw_string(uint32_t ul_x, uint32_t ul_y, const uint8_t *p_str); +void ili93xx_draw_pixmap(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width, + uint32_t ul_height, const ili93xx_color_t *p_ul_pixmap); +void ili93xx_set_top_left_limit(ili93xx_coord_t x, ili93xx_coord_t y); +void ili93xx_set_bottom_right_limit(ili93xx_coord_t x, ili93xx_coord_t y); +void ili93xx_set_limits(ili93xx_coord_t start_x, ili93xx_coord_t start_y, + ili93xx_coord_t end_x, ili93xx_coord_t end_y); +ili93xx_color_t ili93xx_read_gram(void); +void ili93xx_write_gram(ili93xx_color_t color); +void ili93xx_copy_pixels_to_screen(const ili93xx_color_t *pixels, + uint32_t count); +void ili93xx_copy_raw_pixel_24bits_to_screen(const uint8_t *raw_pixels, + uint32_t count); +void ili93xx_duplicate_pixel(const ili93xx_color_t color, uint32_t count); +void ili93xx_copy_pixels_from_screen(ili93xx_color_t *pixels, uint32_t count); +uint8_t ili93xx_device_type(void); +void ili93xx_vscroll_area_define(uint16_t us_tfa, uint16_t us_vsa, + uint16_t us_bfa); +uint8_t ili93xx_device_type_identify(void); + +/** @cond 0 */ +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/** @endcond */ + +/** + * \} + */ + +/** + * \page sam_component_ili93xx_quickstart Quick Start Guide for the ILI93XX + * LCD Glass component. + * + * This is the quick start guide for the \ref ili93xx_display_group, with + * step-by-step instructions on how to configure and use the driver for + * a specific use case.The code examples can be copied into e.g the main + * application loop or any other function that will need to control the + * ili93xx LCD Glass component module. Now ili9325 and ili9341 are supported. + * + * \section ili93xx_qs_use_cases Use cases + * - \ref ili93xx_basic + * + * \section ili93xx_basic ili93xx LCD Glass basic usage + * + * This use case will demonstrate how to initialize the ili93xx LCD Glass + * module. + * + * + * \section ili93xx_basic_setup Setup steps + * + * \subsection ili93xx_basic_prereq Prerequisites + * + * This module requires the following driver + * - \ref smc_group + * + * \subsection ili93xx_basic_setup_code + * + * Add this to the main loop or a setup function: + * \code + * struct ili93xx_opt_t g_ili93xx_display_opt; + * g_ili93xx_display_opt.ul_width = ILI93XX_LCD_WIDTH; + * g_ili93xx_display_opt.ul_height = ILI93XX_LCD_HEIGHT; + * g_ili93xx_display_opt.foreground_color = COLOR_BLACK; + * g_ili93xx_display_opt.background_color = COLOR_WHITE; + * ili93xx_init(&g_ili93xx_display_opt); + * \endcode + * + * \subsection ili93xx_basic_setup_workflow + * -\ref ili93xx_basic_setup_code + * + * \section ili93xx_basic_usage Usage steps + * + * \subsection ili93xx_basic_usage_code + * + * -# Set display on + * \code + * ili93xx_display_on(); + * \endcode + * + * -# Turn display off + * \code + * ili93xx_display_off(); + * \endcode + * + * -# Draw a pixel + * \code + * ili93xx_set_foreground_color(COLOR_RED); + * ili93xx_draw_pixel(60, 60); + * \endcode + * + * -# Draw a line and circle + * \code + * ili93xx_set_foreground_color(COLOR_BLUE); + * ili93xx_draw_circle(180, 160, 40); + * ili93xx_set_foreground_color(COLOR_VIOLET); + * ili93xx_draw_line(0, 0, 240, 320); + * \endcode + * + * -# Draw a string of text + * \code + * ili93xx_set_foreground_color(COLOR_BLACK); + * ili93xx_draw_string(10, 20, (uint8_t *)"ili93xx_lcd example"); + * \endcode + * + * -# Fill a rectangle with one certain color + * \code + * ili93xx_set_foreground_color(COLOR_BLUE); + * ili93xx_draw_filled_rectangle(0, 0, ILI93XX_LCD_WIDTH, ILI93XX_LCD_HEIGHT); + * \endcode + * + * -# Get device type + * \code + * ili93xx_device_type(); + * \endcode + */ + +#endif /* ILI93XX_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c new file mode 100644 index 000000000..4e18e6f16 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c @@ -0,0 +1,429 @@ +/** + * \file + * + * \brief Static Memory Controller (SMC) driver for SAM. + * + * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#include "smc.h" +#include "board.h" + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/// @endcond + +/** + * \defgroup sam_drivers_smc_group Static Memory Controller (SMC) + * + * Driver for the Static Memory Controller. It provides functions for configuring + * and using the on-chip SMC. + * + * @{ + */ + +#if ((SAM3S) || (SAM3U) || (SAM3XA) || (SAM4S) || (SAM4E)) +#define SMC_WPKEY_VALUE (0x534D43) +/** + * \brief Configure the SMC Setup timing for the specified Chip Select. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip Select number to be set. + * \param ul_setup_timing Setup timing for NWE, NCS, NRD. + */ +void smc_set_setup_timing(Smc *p_smc, uint32_t ul_cs, + uint32_t ul_setup_timing) +{ + p_smc->SMC_CS_NUMBER[ul_cs].SMC_SETUP = ul_setup_timing; +} + +/** + * \brief Configure the SMC pulse timing for the specified Chip Select. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip Select number to be set. + * \param ul_pulse_timing Pulse timing for NWE,NCS,NRD. + */ +void smc_set_pulse_timing(Smc *p_smc, uint32_t ul_cs, + uint32_t ul_pulse_timing) +{ + p_smc->SMC_CS_NUMBER[ul_cs].SMC_PULSE = ul_pulse_timing; +} + +/** + * \brief Configure the SMC cycle timing for the specified Chip Select. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip Select number to be set. + * \param ul_cycle_timing Cycle timing for NWE and NRD. + */ +void smc_set_cycle_timing(Smc *p_smc, uint32_t ul_cs, + uint32_t ul_cycle_timing) +{ + p_smc->SMC_CS_NUMBER[ul_cs].SMC_CYCLE = ul_cycle_timing; +} + +/** + * \brief Configure the SMC mode for the specified Chip Select. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip select number to be set. + * \param ul_mode SMC mode. + */ +void smc_set_mode(Smc *p_smc, uint32_t ul_cs, uint32_t ul_mode) +{ + p_smc->SMC_CS_NUMBER[ul_cs].SMC_MODE = ul_mode; +} + +/** + * \brief Get the SMC mode of the specified Chip Select. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip select number to be set. + * + * \return SMC mode. + */ +uint32_t smc_get_mode(Smc *p_smc, uint32_t ul_cs) +{ + return p_smc->SMC_CS_NUMBER[ul_cs].SMC_MODE; +} + +/** + * \brief Set write protection of SMC registers. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_enable 1 to enable, 0 to disable. + */ +void smc_enable_writeprotect(Smc *p_smc, uint32_t ul_enable) +{ +#if (SAM3S || SAM4S || SAM4E) + if (ul_enable) + p_smc->SMC_WPMR = + SMC_WPMR_WPKEY(SMC_WPKEY_VALUE) | SMC_WPMR_WPEN; + else + p_smc->SMC_WPMR = SMC_WPMR_WPKEY(SMC_WPKEY_VALUE); +#else + if (ul_enable) + p_smc->SMC_WPCR = + SMC_WPCR_WP_KEY(SMC_WPKEY_VALUE) | + SMC_WPCR_WP_EN; + else + p_smc->SMC_WPCR = SMC_WPCR_WP_KEY(SMC_WPKEY_VALUE); +#endif +} + +/** + * \brief Get the status of SMC write protection register. + * + * \param p_smc Pointer to an SMC instance. + * + * \return Write protect status. + */ +uint32_t smc_get_writeprotect_status(Smc *p_smc) +{ + return p_smc->SMC_WPSR; +} +#endif /* ((SAM3S) || (SAM3U) || (SAM3XA)) */ + +#if ((SAM3U) || (SAM3XA)) +/** + * \brief Configure the SMC nand timing for the specified Chip Select. + * \param p_smc Pointer to an SMC instance. + * \param ul_cs Chip Select number to be set. + * \param ul_nand_timing nand timing for related signal. + */ +void smc_set_nand_timing(Smc *p_smc, uint32_t ul_cs, + uint32_t ul_nand_timing) +{ + p_smc->SMC_CS_NUMBER[ul_cs].SMC_TIMINGS= ul_nand_timing; +} + +/** + * \brief Initialize NFC configuration. + * \param p_smc Pointer to an SMC instance. + * \param ul_config SMC NFC Configuration. + */ +void smc_nfc_init(Smc *p_smc, uint32_t ul_config) +{ + p_smc->SMC_CFG = ul_config; +} + +/** + * \brief Set NFC page size. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_page_size Use pattern defined in the device header file. + */ +void smc_nfc_set_page_size(Smc *p_smc, uint32_t ul_page_size) +{ + p_smc->SMC_CFG &= (~SMC_CFG_PAGESIZE_Msk); + p_smc->SMC_CFG |= ul_page_size; +} + +/** + * \brief Enable NFC controller to read both main and spare area in read mode. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_enable_spare_read(Smc *p_smc) +{ + p_smc->SMC_CFG |= SMC_CFG_RSPARE; +} + +/** + * \brief Prevent NFC controller from reading the spare area in read mode. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_disable_spare_read(Smc *p_smc) +{ + p_smc->SMC_CFG &= (~SMC_CFG_RSPARE); +} + +/** + * \brief Enable NFC controller to write both main and spare area in write mode. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_enable_spare_write(Smc *p_smc) +{ + p_smc->SMC_CFG |= SMC_CFG_WSPARE; +} + +/** + * \brief Prevent NFC controller from writing the spare area in read mode. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_disable_spare_write(Smc *p_smc) +{ + p_smc->SMC_CFG &= (~SMC_CFG_WSPARE); +} + +/** + * \brief Enable NFC controller. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_enable(Smc *p_smc) +{ + p_smc->SMC_CTRL = SMC_CTRL_NFCEN; +} + +/** + * \brief Disable NFC controller. + * + * \param p_smc Pointer to an SMC instance. + */ +void smc_nfc_disable(Smc *p_smc) +{ + p_smc->SMC_CTRL = SMC_CTRL_NFCDIS; +} + +/** + * \brief Get the NFC Status. + * + * \param p_smc Pointer to an SMC instance. + * + * \return Returns the current status register of SMC NFC Status Register. + * This resets the internal value of the status register, so further + * read may yield different values. + */ +uint32_t smc_nfc_get_status(Smc *p_smc) +{ + return p_smc->SMC_SR; +} + +/** + * \brief Enable SMC interrupts. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_sources Interrupt source bitmap. + */ +void smc_nfc_enable_interrupt(Smc *p_smc, uint32_t ul_sources) +{ + p_smc->SMC_IER = ul_sources; +} + +/** + * \brief Disable SMC interrupts. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_sources Interrupt source bitmap. + */ +void smc_nfc_disable_interrupt(Smc *p_smc, uint32_t ul_sources) +{ + p_smc->SMC_IDR = ul_sources; +} + +/** + * \brief Get the interrupt mask. + * + * \param p_smc Pointer to an SMC instance. + * + * \return Interrupt mask bitmap. + */ +uint32_t smc_nfc_get_interrupt_mask(Smc *p_smc) +{ + return p_smc->SMC_IMR; +} + +/** + * \brief Set flash cycle 0 address. + * + * \param p_smc Pointer to an SMC instance. + * \param uc_address0 Address cycle 0 in 5 address cycles. + */ +void smc_nfc_set_address0(Smc *p_smc, uint8_t uc_address0) +{ + p_smc->SMC_ADDR = uc_address0; +} + +/** + * \brief Set NFC sram bank. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_bank NFC sram bank. + */ +void smc_nfc_set_bank(Smc *p_smc, uint32_t ul_bank) +{ + p_smc->SMC_BANK = SMC_BANK_BANK(ul_bank); +} + +/** + * \brief Use the HOST nandflash controller to send a command. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_cmd Command to send. + * \param ul_address_cycle Address cycle when command access is decoded. + * \param ul_cycle0 Address at first cycle. + */ +void smc_nfc_send_command(Smc *p_smc, uint32_t ul_cmd, + uint32_t ul_address_cycle, uint32_t ul_cycle0) +{ + volatile uint32_t *p_command_address; + + /* Wait until host controller is not busy. */ + while (((*((volatile uint32_t *)(BOARD_NF_DATA_ADDR + NFCADDR_CMD_NFCCMD))) + & NFC_BUSY_FLAG) == NFC_BUSY_FLAG) { + } + /* Send the command plus the ADDR_CYCLE. */ + p_command_address = (volatile uint32_t *)(ul_cmd + BOARD_NF_DATA_ADDR); + p_smc->SMC_ADDR = ul_cycle0; + *p_command_address = ul_address_cycle; + while (!((p_smc->SMC_SR & SMC_SR_CMDDONE) == SMC_SR_CMDDONE)) { + } +} + +/** + * \brief Initialize ECC mode. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_type Type of correction, use pattern defined in the device header file. + * \param ul_pagesize Page size of NAND Flash device, use pattern defined in + * the device header file. + */ +void smc_ecc_init(Smc *p_smc, uint32_t ul_type, uint32_t ul_pagesize) +{ + /* Software Reset ECC. */ + p_smc->SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST; + p_smc->SMC_ECC_MD = ul_type | ul_pagesize; +} + +/** + * \brief Get ECC status by giving ecc number. + * + * \param p_smc Pointer to an SMC instance. + * \param ul_parity_number ECC parity number from 0 to 15. + * + * \return ECC status by giving ECC number. + */ +uint32_t smc_ecc_get_status(Smc *p_smc, uint32_t ul_parity_number) +{ + uint32_t status; + + if (ul_parity_number < 8) { + status = p_smc->SMC_ECC_SR1; + } else { + status = p_smc->SMC_ECC_SR2; + ul_parity_number -= 8; + } + + return ((status >> (ul_parity_number * 4)) & ECC_STATUS_MASK); +} + +/** + * \brief Get all ECC parity registers value. + * + * \param p_smc Pointer to an SMC instance. + * \param p_ecc Pointer to a parity buffer. + */ +void smc_ecc_get_value(Smc *p_smc, uint32_t *p_ecc) +{ + p_ecc[0] = p_smc->SMC_ECC_PR0; + p_ecc[1] = p_smc->SMC_ECC_PR1; + p_ecc[2] = p_smc->SMC_ECC_PR2; + p_ecc[3] = p_smc->SMC_ECC_PR3; + p_ecc[4] = p_smc->SMC_ECC_PR4; + p_ecc[5] = p_smc->SMC_ECC_PR5; + p_ecc[6] = p_smc->SMC_ECC_PR6; + p_ecc[7] = p_smc->SMC_ECC_PR7; + p_ecc[8] = p_smc->SMC_ECC_PR8; + p_ecc[9] = p_smc->SMC_ECC_PR9; + p_ecc[10] = p_smc->SMC_ECC_PR10; + p_ecc[11] = p_smc->SMC_ECC_PR11; + p_ecc[12] = p_smc->SMC_ECC_PR12; + p_ecc[13] = p_smc->SMC_ECC_PR13; + p_ecc[14] = p_smc->SMC_ECC_PR14; + p_ecc[15] = p_smc->SMC_ECC_PR15; +} +#endif /* ((SAM3U) || (SAM3XA)) */ + +//@} + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/// @endcond diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h new file mode 100644 index 000000000..5ba786ba5 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h @@ -0,0 +1,120 @@ +/** + * \file + * + * \brief Static Memory Controller (SMC) driver for SAM. + * + * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef SMC_H_INCLUDED +#define SMC_H_INCLUDED + +#include "compiler.h" + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +extern "C" { +#endif +/**INDENT-ON**/ +/// @endcond + +#if ((SAM3S) || (SAM3U) || (SAM3XA) || (SAM4S) || (SAM4E)) +void smc_set_setup_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_setup_timing); +void smc_set_pulse_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_pulse_timing); +void smc_set_cycle_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_cycle_timing); +void smc_set_mode(Smc *p_smc, uint32_t ul_cs, uint32_t ul_mode); +uint32_t smc_get_mode(Smc *p_smc, uint32_t ul_cs); +void smc_enable_writeprotect(Smc *p_smc, uint32_t ul_enable); +uint32_t smc_get_writeprotect_status(Smc *p_smc); +#endif /* ((SAM3S) || (SAM3U) || (SAM3XA)) */ + +#if ((SAM3U) || (SAM3XA)) +/* NFCADDR_CMD : NFC Address Command */ +#define NFCADDR_CMD_CMD1 (0xFFu << 2) /* Command Register Value for Cycle 1 */ +#define NFCADDR_CMD_CMD2 (0xFFu << 10) /* Command Register Value for Cycle 2 */ +#define NFCADDR_CMD_VCMD2 (0x1u << 18) /* Valid Cycle 2 Command */ +#define NFCADDR_CMD_ACYCLE (0x7u << 19) /* Number of Address required for the current command */ +#define NFCADDR_CMD_ACYCLE_NONE (0x0u << 19) /* No address cycle */ +#define NFCADDR_CMD_ACYCLE_ONE (0x1u << 19) /* One address cycle */ +#define NFCADDR_CMD_ACYCLE_TWO (0x2u << 19) /* Two address cycles */ +#define NFCADDR_CMD_ACYCLE_THREE (0x3u << 19) /* Three address cycles */ +#define NFCADDR_CMD_ACYCLE_FOUR (0x4u << 19) /* Four address cycles */ +#define NFCADDR_CMD_ACYCLE_FIVE (0x5u << 19) /* Five address cycles */ +#define NFCADDR_CMD_CSID_Pos 22 +#define NFCADDR_CMD_CSID_Msk (0x7u << NFCADDR_CMD_CSID_Pos) /* Chip Select Identifier */ +#define NFCADDR_CMD_CSID(value) ((NFCADDR_CMD_CSID_Msk & ((value) << NFCADDR_CMD_CSID_Pos))) +#define NFCADDR_CMD_NFCEN (0x1u << 25) /* NFC Enable */ +#define NFCADDR_CMD_NFC_READ (0x0u << 26) /* NFC Write Enable */ +#define NFCADDR_CMD_NFC_WIRTE (0x1u << 26) /* NFC Write Enable */ +#define NFCADDR_CMD_NFCCMD (0x1u << 27) /* NFC Command Enable */ + +#define NFC_BUSY_FLAG 0x8000000 +#define ECC_STATUS_MASK 0x07 + +void smc_set_nand_timing(Smc * p_smc, uint32_t ul_cs, + uint32_t ul_nand_timing); +void smc_nfc_init(Smc *p_smc, uint32_t ul_config); +void smc_nfc_set_page_size(Smc *p_smc, uint32_t ul_page_size); +void smc_nfc_enable_spare_read(Smc *p_smc); +void smc_nfc_disable_spare_read(Smc *p_smc); +void smc_nfc_enable_spare_write(Smc *p_smc); +void smc_nfc_disable_spare_write(Smc *p_smc); +void smc_nfc_enable(Smc *p_smc); +void smc_nfc_disable(Smc *p_smc); +uint32_t smc_nfc_get_status(Smc * p_smc); +void smc_nfc_enable_interrupt(Smc *p_smc, uint32_t ul_sources); +void smc_nfc_disable_interrupt(Smc *p_smc, uint32_t ul_sources); +uint32_t smc_nfc_get_interrupt_mask(Smc *p_smc); +void smc_nfc_set_address0(Smc *p_smc, uint8_t uc_address0); +void smc_nfc_set_bank(Smc *p_smc, uint32_t ul_bank); +void smc_nfc_send_command(Smc *p_smc, uint32_t ul_cmd, uint32_t ul_address_cycle, uint32_t ul_cycle0); +void smc_ecc_init(Smc *p_smc, uint32_t ul_type, uint32_t ul_pagesize); +uint32_t smc_ecc_get_status(Smc *p_smc, uint32_t ul_parity_number); +void smc_ecc_get_value(Smc *p_smc, uint32_t *p_ecc); +#endif /* ((SAM3U) || (SAM3XA)) */ + +/// @cond 0 +/**INDENT-OFF**/ +#ifdef __cplusplus +} +#endif +/**INDENT-ON**/ +/// @endcond + +#endif /* SMC_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c new file mode 100644 index 000000000..27abd4845 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c @@ -0,0 +1,174 @@ +/** + * gfx_draw_bmpfile() is provided by and copyright to Atmel Corporation with the + * following usage restrictions: + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Standard includes. */ +#include + +/* Library includes. */ +#include + +/* Bitmap. */ +#include "logo_atmel.h" + +/* Chip select number to be set for LCD. */ +#define ILI93XX_LCD_CS 1 + +/* + * Initialise the LCD and output a bitmap. + */ +void vInitialiseLCD( void ); + +/* + * Output a bitmap to the LCD. + */ +static void gfx_draw_bmpfile( const uint8_t *bmpImage ); + +/*-----------------------------------------------------------*/ + +COMPILER_PACK_SET( 1 ) +struct bmpfile_header { + /** signature, must be 4D42 hex */ + uint16_t type; + /** size of BMP file in bytes (unreliable) */ + uint32_t file_size; + /** reserved, must be zero */ + uint16_t reserved1; + /** reserved, must be zero */ + uint16_t reserved2; + /** offset to start of image data in bytes */ + uint32_t offset; + /** size of BITMAPINFOHEADER structure, must be 40 */ + uint32_t header_size; + /** image width in pixels */ + uint32_t width; + /** image height in pixels */ + uint32_t height; + /** number of planes in the image, must be 1 */ + uint16_t planes; + /** number of bits per pixel (1, 4, 8, 16, 24, 32) */ + uint16_t bits; + /** compression type (0=none, 1=RLE-8, 2=RLE-4) */ + uint32_t compression; + /** size of image data in bytes (including padding) */ + uint32_t inage_size; + /** horizontal resolution in pixels per meter */ + uint32_t h_resolution; + /** vertical resolution in pixels per meter */ + uint32_t v_resolution; + /** number of colors in image, or zero */ + uint32_t colours; + /** number of important colors, or zero */ + uint32_t important_colors; +}; +COMPILER_PACK_RESET() + +void vInitialiseLCD( void ) +{ +struct ili93xx_opt_t g_ili93xx_display_opt; + + /* Configure SMC interface for Lcd */ + smc_set_setup_timing( SMC, ILI93XX_LCD_CS, SMC_SETUP_NWE_SETUP( 2 ) | SMC_SETUP_NCS_WR_SETUP( 2 ) | SMC_SETUP_NRD_SETUP( 2 ) | SMC_SETUP_NCS_RD_SETUP( 2 ) ); + smc_set_pulse_timing( SMC, ILI93XX_LCD_CS, SMC_PULSE_NWE_PULSE( 4 ) | SMC_PULSE_NCS_WR_PULSE( 4 ) | SMC_PULSE_NRD_PULSE( 10 )| SMC_PULSE_NCS_RD_PULSE( 10 ) ); + smc_set_cycle_timing( SMC, ILI93XX_LCD_CS, SMC_CYCLE_NWE_CYCLE( 10 )| SMC_CYCLE_NRD_CYCLE( 22 ) ); + smc_set_mode( SMC, ILI93XX_LCD_CS, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE ); + + /* Initialise the LCD. */ + g_ili93xx_display_opt.ul_width = ILI93XX_LCD_WIDTH; + g_ili93xx_display_opt.ul_height = ILI93XX_LCD_HEIGHT; + g_ili93xx_display_opt.foreground_color = COLOR_BLACK; + g_ili93xx_display_opt.background_color = COLOR_WHITE; + ili93xx_init( &g_ili93xx_display_opt ); + + /* Set backlight level */ + aat31xx_set_backlight(AAT31XX_AVG_BACKLIGHT_LEVEL); + + /* Turn on LCD */ + ili93xx_display_on(); + + /* Clear. */ + ili93xx_set_foreground_color( COLOR_WHITE ); + ili93xx_draw_filled_rectangle( 0, 0, ILI93XX_LCD_WIDTH, ILI93XX_LCD_HEIGHT ); + + /* Draw logos. */ + ili93xx_set_cursor_position( 0,0 ); + gfx_draw_bmpfile( logo_atmel_bmp ); + + /* Set foreground colour ready to write text. */ + ili93xx_set_foreground_color( COLOR_BLACK ); +} +/*-----------------------------------------------------------*/ + +static void gfx_draw_bmpfile( const uint8_t *bmpImage ) +{ + struct bmpfile_header *bmp_header; + uint32_t length; + uint32_t i = 0; + uint32_t offset; + uint16_t j; + + bmp_header = (struct bmpfile_header*) bmpImage; + length = bmp_header->height * bmp_header->width * 3; + offset = sizeof(struct bmpfile_header); + + if (ili93xx_device_type() == DEVICE_TYPE_ILI9325) { + + ili93xx_set_cursor_position(0, 0); + + /** Prepare to write in GRAM */ + LCD_IR(0); + LCD_IR(ILI9325_GRAM_DATA_REG); + for (i = offset; i < length; i += 3) { + /** Invert red and blue. */ + LCD_WD(bmpImage[i + 2]); + LCD_WD(bmpImage[i + 1]); + LCD_WD(bmpImage[i]); + } + } else if (ili93xx_device_type() == DEVICE_TYPE_ILI9341) { + ili93xx_set_window(0, 0, bmp_header->width - 15, bmp_header->height); + /** memory write command (R2Ch)*/ + LCD_IR(ILI9341_CMD_MEMORY_WRITE); + LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE); + + /** the original image is mirrored */ + for (i= bmp_header->height - 1; i * bmp_header->width * 3 > offset; + i -=1) { + for (j = 45; j < bmp_header->width * 3; j += 3) { + LCD_WD(bmpImage[i * bmp_header->width * 3 + j + 2]); + LCD_WD(bmpImage[i * bmp_header->width * 3 + j + 1]); + LCD_WD(bmpImage[i * bmp_header->width * 3 + j]); + } + } + } +} diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h index 03d53df4b..cbb258fa4 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h @@ -56,6 +56,14 @@ #include #include +// From module: Display - AAT31XX Backlight Controller +#include + +// From module: Display - ILI93xx LCD Controller +#include +#include +#include + // From module: Ethernet MAC (GMAC) #include @@ -87,6 +95,9 @@ // From module: SAM4E startup code #include +// From module: SMC - Static Memory Controller +#include + // From module: System Clock Control - SAM4E implementation #include diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h index 8369b918b..2c5311b56 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h @@ -91,7 +91,7 @@ #define configTICK_RATE_HZ ( 1000 ) #define configMAX_PRIORITIES ( 5 ) #define configMINIMAL_STACK_SIZE ( ( unsigned short ) 130 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 34 * 1024 ) ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 46 * 1024 ) ) #define configMAX_TASK_NAME_LEN ( 10 ) #define configUSE_TRACE_FACILITY 1 #define configUSE_16_BIT_TICKS 0 @@ -212,6 +212,16 @@ ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */ #define configNET_MASK2 255 #define configNET_MASK3 0 +/* The address of the echo server. Used when the demo is build to include the +UDP echo tasks (when mainINCLUDE_ECHO_CLIENT_TASKS is set to 1 in +FreeRTOSConfig.h. +http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Common_Echo_Clients.shtml */ +#define configECHO_SERVER_ADDR0 192 +#define configECHO_SERVER_ADDR1 168 +#define configECHO_SERVER_ADDR2 0 +#define configECHO_SERVER_ADDR3 2 + + /* The priority used by the Ethernet MAC driver interrupt. */ #define configMAC_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ) diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h index ffaf4ecf1..05ef01180 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h @@ -111,7 +111,7 @@ stack will revert to using the static IP address even when ipconfigUSE_DHCP is set to 1 if a valid configuration cannot be obtained from a DHCP server for any reason. The static configuration used is that passed into the stack by the FreeRTOS_IPInit() function call. */ -#define ipconfigUSE_DHCP 0 +#define ipconfigUSE_DHCP 1 /* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at increasing time intervals until either a reply is received from a DHCP server @@ -205,7 +205,7 @@ contain. For normal Ethernet V2 frames the maximum MTU is 1500. Setting a lower value can save RAM, depending on the buffer management scheme used. If ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must be divisible by 8. */ -#define ipconfigNETWORK_MTU 1200 +#define ipconfigNETWORK_MTU 1000 /* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver. DNS is used through the FreeRTOS_gethostbyname() API function. */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h new file mode 100644 index 000000000..0d757c52f --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h @@ -0,0 +1,59 @@ +/** + * \file + * + * \brief AAT31XX configuration. + * + * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +//! Configuration of the AAT31XX Backlight driver + +#ifndef CONF_AAT31XX_H_INCLUDED +#define CONF_AAT31XX_H_INCLUDED + +#include "board.h" + +#if !defined(BOARD_AAT31XX_SET_GPIO) + + #warning The AAT31XX PIN configuration does not exist in the board definition file. Using default settings. + + #define BOARD_AAT31XX_SET_GPIO PIO_PC13_IDX /* Should use the PIN index of which pin is connected with EN/SET of AAT31XX device */ + +#endif + +#endif /* CONF_AAT31XX_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h index 4a914ee21..e616581ec 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h @@ -49,6 +49,13 @@ /* Enable ETH PHY: KSZ8051MNL feature */ #define CONF_BOARD_KSZ8051MNL + +/** Configure LCD EBI pins */ +#define CONF_BOARD_ILI93XX + +/** Configure Backlight control pin */ +#define CONF_BOARD_AAT3155 + /* * LED pins are not configured for PWM function here. * Because those LED pins are enabled for PIO function by default. diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h new file mode 100644 index 000000000..53ee3cbec --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h @@ -0,0 +1,62 @@ +/** + * \file + * + * \brief ILI93XX configuration. + * + * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +//! Configuration of the ILI93XX (ILI9325 or ILI9341) LCD display driver + +#ifndef CONF_ILI93XX_H_INCLUDED +#define CONF_ILI93XX_H_INCLUDED + +#include "board.h" + +#if !defined(BOARD_ILI93XX_ADDR) || !defined(BOARD_ILI93XX_RS) + + #warning The ILI93XX EBI configuration does not exist in the board definition file. Using default settings. + + /** The base address, depends on which SMC chip select is used by ILI9325. */ + #define BOARD_ILI93XX_ADDR 0x61000000 + /** Register select (1 << 1) */ + #define BOARD_ILI93XX_RS 1 << 1 + +#endif + +#endif /* CONF_ILI93XX_H_INCLUDED */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h new file mode 100644 index 000000000..c2ce4b9f7 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h @@ -0,0 +1,15412 @@ +/** + * \file + * + * \brief Atmel logo for the FreeRTOS Web/DSP Demo. + * + * Copyright (c) 2013 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef __ATMEL_LOGO_H__ +#define __ATMEL_LOGO_H__ +const uint8_t logo_atmel_bmp[230454]= +{ +0x42,0x4d,0x36,0x84,0x03,0x00,0x00,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x28, +0x00,0x00,0x00,0xf0,0x00,0x00,0x00,0x40,0x01,0x00,0x00,0x01,0x00,0x18,0x00, +0x00,0x00,0x00,0x00,0x00,0x84,0x03,0x00,0x13,0x0b,0x00,0x00,0x13,0x0b,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, +0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 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+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc, +0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc +}; +#endif /* __ATMEL_LOGO_H__ */ diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c index 81582ce0f..66b806014 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c @@ -131,6 +131,7 @@ static void prvSetupHardware( void ) board_init(); sysclk_init(); pmc_enable_periph_clk( ID_GMAC ); + pmc_enable_periph_clk( ID_SMC ); vParTestInitialise(); } /*-----------------------------------------------------------*/ @@ -233,14 +234,22 @@ void _exit_( int status ) vAssertCalled( __LINE__, __FILE__ ); for( ;; ); } +/*-----------------------------------------------------------*/ +/* Provided to keep the linker happy. */ int _read( void ) { return 0; } +/*-----------------------------------------------------------*/ +/* Provided to keep the linker happy. */ int _write( int x ) { ( void ) x; return 0; -} \ No newline at end of file +} +/*-----------------------------------------------------------*/ + + + diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c index 22376afca..e6a5ff01b 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c @@ -70,9 +70,13 @@ /* FreeRTOS+UDP includes. */ #include "FreeRTOS_UDP_IP.h" +#include "FreeRTOS_Sockets.h" -/* Demo application includes. */ +/* UDP demo includes. */ #include "UDPCommandInterpreter.h" +#include "TwoEchoClients.h" + +/* Standard demo includes. */ #include "partest.h" #include "blocktim.h" #include "flash_timer.h" @@ -128,9 +132,12 @@ passed into the network event hook is eNetworkUp). */ #define mainDISCONNECTED_IP_TASK_PRIORITY ( tskIDLE_PRIORITY ) /* UDP command server task parameters. */ -#define mainUDP_CLI_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define mainUDP_CLI_PORT_NUMBER ( 5001UL ) -#define mainUDP_CLI_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2U ) +#define mainUDP_CLI_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainUDP_CLI_PORT_NUMBER ( 5001UL ) +#define mainUDP_CLI_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2U ) + +/* Set to 1 to include the UDP echo client tasks. */ +#define mainINCLUDE_ECHO_CLIENT_TASKS 1 /*-----------------------------------------------------------*/ @@ -159,6 +166,11 @@ extern void vRegisterFileSystemCLICommands( void ); */ extern void vRegisterUDPCLICommands( void ); +/* + * Initialise the LCD and output a bitmap. + */ +extern void vInitialiseLCD( void ); + /*-----------------------------------------------------------*/ /* The default IP and MAC address used by the demo. The address configuration @@ -180,6 +192,9 @@ int main_full( void ) { xTimerHandle xTimer = NULL; + /* Initialise the LCD and output the bitmap. */ + vInitialiseLCD(); + /* If the file system is only going to be accessed from one task then F_FS_THREAD_AWARE can be set to 0 and the set of example files are created before the RTOS scheduler is started. If the file system is going to be @@ -319,6 +334,9 @@ unsigned long ulErrorOccurred = pdFALSE; void vApplicationIPNetworkEventHook( eIPCallbackEvent_t eNetworkEvent ) { static long lTasksAlreadyCreated = pdFALSE; +const unsigned long ulXCoord = 3, ulYCoord = 3, ulIPAddressOffset = 45; +unsigned long ulIPAddress; +char cIPAddress[ 20 ]; /* Note: If the application is started without the network cable plugged in then ipconfigUDP_TASK_PRIORITY should be set to 0 in FreeRTOSIPConfig.h to @@ -330,14 +348,27 @@ static long lTasksAlreadyCreated = pdFALSE; passed into the network event hook is eNetworkUp). */ if( eNetworkEvent == eNetworkUp ) { - vTaskPrioritySet( NULL, mainCONNECTED_IP_TASK_PRIORITY ); - if( lTasksAlreadyCreated == pdFALSE ) { /* Create the task that handles the CLI on a UDP port. The port number is set using the configUDP_CLI_PORT_NUMBER setting in FreeRTOSConfig.h. */ vStartUDPCommandInterpreterTask( mainUDP_CLI_TASK_STACK_SIZE, mainUDP_CLI_PORT_NUMBER, mainUDP_CLI_TASK_PRIORITY ); + + #if( mainINCLUDE_ECHO_CLIENT_TASKS == 1 ) + { + vStartEchoClientTasks( configMINIMAL_STACK_SIZE, tskIDLE_PRIORITY ); + } + #endif } + + /* Obtain the IP address, convert it to a string, then display. */ + FreeRTOS_GetAddressConfiguration( &ulIPAddress, NULL, NULL, NULL ); + FreeRTOS_inet_ntoa( ulIPAddress, cIPAddress ); + ili93xx_draw_string( ulXCoord, ulYCoord, ( uint8_t * ) "IP: " ); + ili93xx_draw_string( ulXCoord + ulIPAddressOffset, ulYCoord, ( uint8_t * ) cIPAddress ); + + /* Set the IP task up to the desired priority now it has connected. */ + vTaskPrioritySet( NULL, mainCONNECTED_IP_TASK_PRIORITY ); } if( eNetworkEvent == eNetworkDown ) @@ -387,25 +418,7 @@ void vApplicationPingReplyHook( ePingReplyStatus_t eStatus, uint16_t usIdentifie { /* This demo has nowhere to output any information so does nothing. */ ( void ) usIdentifier; - - switch( eStatus ) - { - case eSuccess : - break; - - case eInvalidChecksum : - break; - - case eInvalidData : - break; - - default : - /* It is not possible to get here as all enums have their own - case. */ - break; - } + ( void ) eStatus; } - - - +/*-----------------------------------------------------------*/