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Update MPS430X ports so the sleep mode bits are cleared on exit from the tick interrupt.

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Update heap_4.c.
This commit is contained in:
Richard Barry 2012-08-11 20:57:11 +00:00
parent 59c9044de1
commit 054b018d0e
5 changed files with 29 additions and 32 deletions
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1
Source/portable/CCS/MSP430X/port.c
View file

@ -213,6 +213,7 @@ interrupt void vTickISREntry( void )
{ {
extern void vPortTickISR( void ); extern void vPortTickISR( void );
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
#if configUSE_PREEMPTION == 1 #if configUSE_PREEMPTION == 1
extern void vPortPreemptiveTickISR( void ); extern void vPortPreemptiveTickISR( void );
vPortPreemptiveTickISR(); vPortPreemptiveTickISR();

6
Source/portable/CCS/MSP430X/portext.asm
View file

@ -88,12 +88,6 @@ portRESTORE_CONTEXT .macro
pop_x r15 pop_x r15
mov.w r15, &usCriticalNesting mov.w r15, &usCriticalNesting
popm_x #12, r15 popm_x #12, r15
;The last thing on the stack will be the status register.
;Ensure the power down bits are clear ready for the next
;time this power down register is popped from the stack.
bic.w #0xf0, 0( sp )
pop.w sr pop.w sr
ret_x ret_x
.endm .endm

1
Source/portable/IAR/MSP430X/port.c
View file

@ -214,6 +214,7 @@ __interrupt __raw void vTickISREntry( void )
{ {
extern void vPortTickISR( void ); extern void vPortTickISR( void );
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
vPortTickISR(); vPortTickISR();
} }

10
Source/portable/IAR/MSP430X/portext.s43
View file

@ -95,12 +95,6 @@ portRESTORE_CONTEXT macro
pop_x r15 pop_x r15
mov.w r15, &usCriticalNesting mov.w r15, &usCriticalNesting
popm_x #12, r15 popm_x #12, r15
/* The last thing on the stack will be the status register.
Ensure the power down bits are clear ready for the next
time this power down register is popped from the stack. */
bic.w #0xf0, 0( sp )
pop.w sr pop.w sr
reta reta
endm endm
@ -122,7 +116,9 @@ portRESTORE_CONTEXT macro
vPortTickISR: vPortTickISR:
/* The sr is not saved in portSAVE_CONTEXT() because vPortYield() needs /* The sr is not saved in portSAVE_CONTEXT() because vPortYield() needs
to save it manually before it gets modified (interrupts get disabled). */ to save it manually before it gets modified (interrupts get disabled).
Entering through this interrupt means the SR is already on the stack, but
this keeps the stack frames identical. */
push.w sr push.w sr
portSAVE_CONTEXT portSAVE_CONTEXT

15
Source/portable/MemMang/heap_4.c
View file

@ -356,7 +356,7 @@ unsigned char *puc;
} }
#define INCLUDE_TEST_CODE 1 #define INCLUDE_TEST_CODE 0
#if INCLUDE_TEST_CODE == 1 #if INCLUDE_TEST_CODE == 1
#define heapMAX_TEST_BLOCKS 6 #define heapMAX_TEST_BLOCKS 6
@ -366,6 +366,7 @@ void vTestHeap4( void )
void *pvReturned; void *pvReturned;
static void *pvUsedBlocks[ heapMAX_TEST_BLOCKS ]; static void *pvUsedBlocks[ heapMAX_TEST_BLOCKS ];
unsigned long ulIndex = 0, ulSize, ulRandSample; unsigned long ulIndex = 0, ulSize, ulRandSample;
size_t xSize1, xSize2, xSize3;
static const unsigned long ulCombinations[ 6 ][ 3 ] = static const unsigned long ulCombinations[ 6 ][ 3 ] =
{ {
{ 0, 1, 2 }, { 0, 1, 2 },
@ -530,13 +531,17 @@ static const unsigned long ulCombinations[ 6 ][ 3 ] =
} }
/* Do the same, but using random block sizes. */ /* Do the same, but using random block sizes. */
for( ulRandSample = 0; ulRandSample < 0x5ffff; ulRandSample++ ) for( ulRandSample = 0; ulRandSample < 0xffffffUL; ulRandSample++ )
{ {
xSize1 = rand();
xSize2 = rand();
xSize3 = rand();
for( ulIndex = 0; ulIndex < 6; ulIndex++ ) for( ulIndex = 0; ulIndex < 6; ulIndex++ )
{ {
pvUsedBlocks[ 0 ] = pvPortMalloc( rand() ); pvUsedBlocks[ 0 ] = pvPortMalloc( xSize1 );
pvUsedBlocks[ 1 ] = pvPortMalloc( rand() ); pvUsedBlocks[ 1 ] = pvPortMalloc( xSize2 );
pvUsedBlocks[ 2 ] = pvPortMalloc( rand() ); pvUsedBlocks[ 2 ] = pvPortMalloc( xSize3 );
vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 0 ] ] ); vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 0 ] ] );
vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 1 ] ] ); vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 1 ] ] );