mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Update trace recorder to include heap tracing and new v8 features.
This commit is contained in:
parent
853696a991
commit
04ae37ef12
15 changed files with 1218 additions and 608 deletions
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Tracealyzer v2.5.0 Recorder Library
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* Tracealyzer v2.6.0 Recorder Library
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* Percepio AB, www.percepio.com
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*
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* trcConfig.h
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@ -91,9 +91,15 @@
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* stores User Events labels and names of deleted tasks, queues, or other kernel
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* objects. Note that the names of active objects not stored here but in the
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* Object Table. Thus, if you don't use User Events or delete any kernel
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* objects you set this to zero (0) to minimize RAM usage.
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* objects you set this to a very low value, e.g. 4, but not zero (0) since
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* this causes a declaration of a zero-sized array, for which the C compiler
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* behavior is not standardized and may cause misaligned data.
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******************************************************************************/
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#define SYMBOL_TABLE_SIZE 1000
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#define SYMBOL_TABLE_SIZE 800
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#if (SYMBOL_TABLE_SIZE == 0)
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#error "SYMBOL_TABLE_SIZE may not be zero!"
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#endif
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/*******************************************************************************
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* USE_SEPARATE_USER_EVENT_BUFFER
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@ -119,7 +125,7 @@
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*
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* Only in use if USE_SEPARATE_USER_EVENT_BUFFER is set to 1.
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******************************************************************************/
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#define USER_EVENT_BUFFER_SIZE 500
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#define USER_EVENT_BUFFER_SIZE 10
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/*******************************************************************************
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* USER_EVENT_CHANNELS
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@ -169,6 +175,8 @@
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#define NQueue 10
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#define NSemaphore 10
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#define NMutex 10
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#define NTimer 2
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#define NEventGroup 2
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/* Maximum object name length for each class (includes zero termination) */
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#define NameLenTask 15
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@ -176,6 +184,8 @@
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#define NameLenQueue 15
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#define NameLenSemaphore 15
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#define NameLenMutex 15
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#define NameLenTimer 15
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#define NameLenEventGroup 15
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/******************************************************************************
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* TRACE_DESCRIPTION
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@ -234,7 +244,7 @@
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* If this is one (1), the TRACE_ASSERT macro will verify that a condition is
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* true. If the condition is false, vTraceError() will be called.
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*****************************************************************************/
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#define USE_TRACE_ASSERT 0
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#define USE_TRACE_ASSERT 1
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/******************************************************************************
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* INCLUDE_FLOAT_SUPPORT
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@ -264,8 +274,7 @@
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* much faster than a printf and can therefore be used in timing critical code.
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* See vTraceUserEvent() and vTracePrintF() in trcUser.h
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*
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* Note that Tracealyzer Professional Edition is required for User Events,
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* they are not displayed in Tracealyzer Free Edition.
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* Note that User Events are not displayed in FreeRTOS+Trace Free Edition.
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*****************************************************************************/
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#define INCLUDE_USER_EVENTS 1
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@ -319,6 +328,17 @@
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*****************************************************************************/
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#define INCLUDE_OBJECT_DELETE 1
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/******************************************************************************
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* INCLUDE_MEMMANG_EVENTS
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*
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* Macro which should be defined as either zero (0) or one (1).
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* Default is 1.
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*
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* This controls if malloc and free calls should be traced. Set this to zero to
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* exclude malloc/free calls from the tracing.
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*****************************************************************************/
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#define INCLUDE_MEMMANG_EVENTS 1
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/******************************************************************************
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* CONFIGURATION RELATED TO BEHAVIOR
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*****************************************************************************/
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@ -425,29 +445,86 @@
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*****************************************************************************/
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#define USE_IMPLICIT_IFE_RULES 1
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/******************************************************************************
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* INCLUDE_SAVE_TO_FILE
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* USE_16BIT_OBJECT_HANDLES
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*
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* Macro which should be defined as either zero (0) or one (1).
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* Default is 0.
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*
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* If enabled (1), the recorder will include code for saving the trace
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* to a local file system.
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******************************************************************************/
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#ifdef WIN32
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#define INCLUDE_SAVE_TO_FILE 1
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#else
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#define INCLUDE_SAVE_TO_FILE 0
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* If set to 0 (zero), the recorder uses 8-bit handles to identify kernel
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* objects such as tasks and queues. This limits the supported number of
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* concurrently active objects to 255 of each type (object class).
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*
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* If set to 1 (one), the recorder uses 16-bit handles to identify kernel
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* objects such as tasks and queues. This limits the supported number of
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* concurrent objects to 65535 of each type (object class). However, since the
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* object property table is limited to 64 KB, the practical limit is about
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* 3000 objects in total.
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*
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* NOTE: An object with a high ID (> 255) will generate an extra event
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* (= 4 byte) in the event buffer.
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*
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* NOTE: Some internal tables in the recorder gets larger when using 16-bit
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* handles. The additional RAM usage is 5-10 byte plus 1 byte per kernel object
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*, i.e., task, queue, semaphore, mutex, etc.
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*****************************************************************************/
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#define USE_16BIT_OBJECT_HANDLES 0
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/****** Port Name ******************** Code ** Official ** OS Platform ******
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* PORT_APPLICATION_DEFINED -2 - -
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* PORT_NOT_SET -1 - -
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* PORT_HWIndependent 0 Yes Any
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* PORT_Win32 1 Yes FreeRTOS Win32
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* PORT_Atmel_AT91SAM7 2 No Any
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* PORT_Atmel_UC3A0 3 No Any
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* PORT_ARM_CortexM 4 Yes Any
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* PORT_Renesas_RX600 5 Yes Any
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* PORT_Microchip_dsPIC_AND_PIC24 6 Yes Any
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* PORT_TEXAS_INSTRUMENTS_TMS570 7 No Any
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* PORT_TEXAS_INSTRUMENTS_MSP430 8 No Any
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* PORT_MICROCHIP_PIC32 9 No Any
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* PORT_XILINX_PPC405 10 No FreeRTOS
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* PORT_XILINX_PPC440 11 No FreeRTOS
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* PORT_XILINX_MICROBLAZE 12 No Any
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* PORT_NXP_LPC210X 13 No Any
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*****************************************************************************/
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#define SELECTED_PORT PORT_ARM_CortexM
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#if (SELECTED_PORT == PORT_NOT_SET)
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#error "You need to define SELECTED_PORT here!"
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#endif
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/******************************************************************************
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* TEAM_LICENSE_CODE
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* USE_PRIMASK_CS (for Cortex M devices only)
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*
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* An integer constant that selects between two options for the critical
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* sections of the recorder library.
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*
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* Macro which defines a string - the team license code.
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* If no team license is available, this should be an empty string "".
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* This should be maximum 32 chars, including zero-termination.
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*****************************************************************************/
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#define TEAM_LICENSE_CODE ""
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* 0: The default FreeRTOS critical section (BASEPRI) - default setting
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* 1: Always disable ALL interrupts (using PRIMASK)
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*
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* Option 0 uses the standard FreeRTOS macros for critical sections.
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* However, on Cortex-M devices they only disable interrupts with priorities
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* below a certain configurable level, while higher priority ISRs remain active.
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* Such high-priority ISRs may not use the recorder functions in this mode.
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*
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* Option 1 allows you to safely call the recorder from any ISR, independent of
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* the interrupt priority. This mode may however cause higher IRQ latencies
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* (some microseconds) since ALL configurable interrupts are disabled during
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* the recorder's critical sections in this mode, using the PRIMASK register.
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******************************************************************************/
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#define USE_PRIMASK_CS 0
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/******************************************************************************
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* HEAP_SIZE_BELOW_16M
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*
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* An integer constant that can be used to reduce the buffer usage of memory
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* allocation events (malloc/free). This value should be 1 if the heap size is
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* below 16 MB (2^24 byte), and you can live with addresses truncated to the
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* lower 24 bit. Otherwise set it to 0 to get the full 32-bit addresses.
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******************************************************************************/
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#define HEAP_SIZE_BELOW_16M 0
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#endif
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@ -1,461 +0,0 @@
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/*******************************************************************************
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* Tracealyzer v2.5.0 Recorder Library
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* Percepio AB, www.percepio.com
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*
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* trcHardwarePort.h
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*
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* Contains together with trcHardwarePort.c all hardware portability issues of
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* the trace recorder library.
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*
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* Terms of Use
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* This software is copyright Percepio AB. The recorder library is free for
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* use together with Percepio products. You may distribute the recorder library
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* in its original form, including modifications in trcPort.c and trcPort.h
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* given that these modification are clearly marked as your own modifications
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* and documented in the initial comment section of these source files.
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* This software is the intellectual property of Percepio AB and may not be
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* sold or in other ways commercially redistributed without explicit written
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* permission by Percepio AB.
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*
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* Disclaimer
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* The trace tool and recorder library is being delivered to you AS IS and
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* Percepio AB makes no warranty as to its use or performance. Percepio AB does
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* not and cannot warrant the performance or results you may obtain by using the
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* software or documentation. Percepio AB make no warranties, express or
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* implied, as to noninfringement of third party rights, merchantability, or
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* fitness for any particular purpose. In no event will Percepio AB, its
|
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* technology partners, or distributors be liable to you for any consequential,
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* incidental or special damages, including any lost profits or lost savings,
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* even if a representative of Percepio AB has been advised of the possibility
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* of such damages, or for any claim by any third party. Some jurisdictions do
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* not allow the exclusion or limitation of incidental, consequential or special
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* damages, or the exclusion of implied warranties or limitations on how long an
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* implied warranty may last, so the above limitations may not apply to you.
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*
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* Copyright Percepio AB, 2013.
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* www.percepio.com
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******************************************************************************/
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#ifndef TRCPORT_H
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#define TRCPORT_H
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#include "trcKernelPort.h"
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/* If Win32 port */
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#ifdef WIN32
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#undef _WIN32_WINNT
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#define _WIN32_WINNT 0x0600
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/* Standard includes. */
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#include <stdio.h>
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#include <windows.h>
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#include <direct.h>
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/*******************************************************************************
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* The Win32 port by default saves the trace to file and then kills the
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* program when the recorder is stopped, to facilitate quick, simple tests
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* of the recorder.
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******************************************************************************/
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#define WIN32_PORT_SAVE_WHEN_STOPPED 1
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#define WIN32_PORT_EXIT_WHEN_STOPPED 1
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#endif
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#define DIRECTION_INCREMENTING 1
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#define DIRECTION_DECREMENTING 2
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/******************************************************************************
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* Supported ports
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*
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* PORT_HWIndependent
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* A hardware independent fallback option for event timestamping. Provides low
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* resolution timestamps based on the OS tick.
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* This may be used on the Win32 port, but may also be used on embedded hardware
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* platforms. All time durations will be truncated to the OS tick frequency,
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* typically 1 KHz. This means that a task or ISR that executes in less than
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* 1 ms get an execution time of zero.
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*
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* PORT_Win32
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* "Accurate" timestamping based on the Windows performance counter for Win32 builds.
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* Note that this gives the host machine time, not the kernel time.
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*
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* Officially supported hardware timer ports:
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* - PORT_Atmel_AT91SAM7
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* - PORT_Atmel_UC3A0
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* - PORT_ARM_CortexM
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* - PORT_Renesas_RX600
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* - PORT_Microchip_dsPIC_AND_PIC24
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*
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* We also provide several "unofficial" hardware-specific ports. There have
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* been developed by external contributors, and have not yet been verified
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* by Percepio AB. Let us know if you have problems getting these to work.
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*
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* Unofficial hardware specific ports provided are:
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* - PORT_TEXAS_INSTRUMENTS_TMS570
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* - PORT_TEXAS_INSTRUMENTS_MSP430
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* - PORT_MICROCHIP_PIC32
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* - PORT_XILINX_PPC405
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* - PORT_XILINX_PPC440
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* - PORT_XILINX_MICROBLAZE
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* - PORT_NXP_LPC210X
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*
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*****************************************************************************/
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#define PORT_NOT_SET -1
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#define PORT_APPLICATION_DEFINED -2
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/*** Officially supported hardware timer ports *******************************/
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#define PORT_HWIndependent 0
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#define PORT_Win32 1
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#define PORT_Atmel_AT91SAM7 2
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#define PORT_Atmel_UC3A0 3
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#define PORT_ARM_CortexM 4
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#define PORT_Renesas_RX600 5
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#define PORT_Microchip_dsPIC_AND_PIC24 6
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/*** Unofficial ports, provided by external developers, not yet verified *****/
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#define PORT_TEXAS_INSTRUMENTS_TMS570 7
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#define PORT_TEXAS_INSTRUMENTS_MSP430 8
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#define PORT_MICROCHIP_PIC32 9
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#define PORT_XILINX_PPC405 10
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#define PORT_XILINX_PPC440 11
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#define PORT_XILINX_MICROBLAZE 12
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#define PORT_NXP_LPC210X 13
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/*** Select your port here! **************************************************/
|
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#define SELECTED_PORT PORT_NOT_SET
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/*****************************************************************************/
|
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|
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#if (SELECTED_PORT == PORT_NOT_SET)
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#error "You need to define SELECTED_PORT here!"
|
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#endif
|
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|
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/*******************************************************************************
|
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* IRQ_PRIORITY_ORDER
|
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*
|
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* Macro which should be defined as an integer of 0 or 1.
|
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*
|
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* This should be 0 if lower IRQ priority values implies higher priority
|
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* levels, such as on ARM Cortex M. If the opposite scheme is used, i.e.,
|
||||
* if higher IRQ priority values means higher priority, this should be 1.
|
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*
|
||||
* This setting is not critical. It is used only to sort and colorize the
|
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* interrupts in priority order, in case you record interrupts using
|
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* the vTraceStoreISRBegin and vTraceStoreISREnd routines.
|
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*
|
||||
* We provide this setting for some hardware architectures below:
|
||||
* - ARM Cortex M: 0 (lower IRQ priority values are more significant)
|
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* - Atmel AT91SAM7x: 1 (higher IRQ priority values are more significant)
|
||||
* - Atmel AVR32: 1 (higher IRQ priority values are more significant)
|
||||
* - Renesas RX600: 1 (higher IRQ priority values are more significant)
|
||||
* - Microchip PIC24: 0 (lower IRQ priority values are more significant)
|
||||
* - Microchip dsPIC: 0 (lower IRQ priority values are more significant)
|
||||
* - TI TMS570: 0 (lower IRQ priority values are more significant)
|
||||
* - Freescale HCS08: 0 (lower IRQ priority values are more significant)
|
||||
* - Freescale HCS12: 0 (lower IRQ priority values are more significant)
|
||||
* - PowerPC 405: 0 (lower IRQ priority values are more significant)
|
||||
* - PowerPC 440: 0 (lower IRQ priority values are more significant)
|
||||
* - Freescale ColdFire: 1 (higher IRQ priority values are more significant)
|
||||
* - NXP LPC210x: 0 (lower IRQ priority values are more significant)
|
||||
* - MicroBlaze: 0 (lower IRQ priority values are more significant)
|
||||
*
|
||||
* If your chip is not on the above list, and you perhaps know this detail by
|
||||
* heart, please inform us by e-mail to support@percepio.com.
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
* HWTC Macros
|
||||
*
|
||||
* These four HWTC macros provides a hardware isolation layer representing a
|
||||
* generic hardware timer/counter used for driving the operating system tick,
|
||||
* such as the SysTick feature of ARM Cortex M3/M4, or the PIT of the Atmel
|
||||
* AT91SAM7X.
|
||||
*
|
||||
* HWTC_COUNT: The current value of the counter. This is expected to be reset
|
||||
* a each tick interrupt. Thus, when the tick handler starts, the counter has
|
||||
* already wrapped.
|
||||
*
|
||||
* HWTC_COUNT_DIRECTION: Should be one of:
|
||||
* - DIRECTION_INCREMENTING - for hardware timer/counters of incrementing type
|
||||
* such as the PIT on Atmel AT91SAM7X.
|
||||
* When the counter value reach HWTC_PERIOD, it is reset to zero and the
|
||||
* interrupt is signaled.
|
||||
* - DIRECTION_DECREMENTING - for hardware timer/counters of decrementing type
|
||||
* such as the SysTick on ARM Cortex M3/M4 chips.
|
||||
* When the counter value reach 0, it is reset to HWTC_PERIOD and the
|
||||
* interrupt is signaled.
|
||||
*
|
||||
* HWTC_PERIOD: The number of increments or decrements of HWTC_COUNT between
|
||||
* two tick interrupts. This should preferably be mapped to the reload
|
||||
* register of the hardware timer, to make it more portable between chips in the
|
||||
* same family. The macro should in most cases be (reload register + 1).
|
||||
*
|
||||
* HWTC_DIVISOR: If the timer frequency is very high, like on the Cortex M chips
|
||||
* (where the SysTick runs at the core clock frequency), the "differential
|
||||
* timestamping" used in the recorder will more frequently insert extra XTS
|
||||
* events to store the timestamps, which increases the event buffer usage.
|
||||
* In such cases, to reduce the number of XTS events and thereby get longer
|
||||
* traces, you use HWTC_DIVISOR to scale down the timestamps and frequency.
|
||||
* Assuming a OS tick rate of 1 KHz, it is suggested to keep the effective timer
|
||||
* frequency below 65 MHz to avoid an excessive amount of XTS events. Thus, a
|
||||
* Cortex M chip running at 72 MHZ should use a HWTC_DIVISOR of 2, while a
|
||||
* faster chip require a higher HWTC_DIVISOR value.
|
||||
*
|
||||
* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
|
||||
* or the trace recorder library. Typically you should not need to change
|
||||
* the code of vTracePortGetTimeStamp if using the HWTC macros.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#if (SELECTED_PORT == PORT_Win32)
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||||
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||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
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#define HWTC_COUNT (ulGetRunTimeCounterValue())
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||||
#define HWTC_PERIOD 0
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||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
|
||||
|
||||
#elif (SELECTED_PORT == PORT_HWIndependent)
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT 0
|
||||
#define HWTC_PERIOD 1
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
|
||||
|
||||
#elif (SELECTED_PORT == PORT_Atmel_AT91SAM7)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
|
||||
/* HWTC_PERIOD is hardcoded for AT91SAM7X256-EK Board (48 MHz)
|
||||
A more generic solution is to get the period from pxPIT->PITC_PIMR */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)
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||||
#define HWTC_PERIOD (AT91C_BASE_PITC->PITC_PIMR + 1)
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_Atmel_UC3A0)
|
||||
#error HWTC_PERIOD must point to the reload register! Not yet updated for this hardware port!
|
||||
|
||||
/* For Atmel AVR32 (AT32UC3A) */
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT sysreg_read(AVR32_COUNT)
|
||||
#define HWTC_PERIOD
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_ARM_CortexM)
|
||||
|
||||
/* For all chips using ARM Cortex M cores */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
|
||||
#define HWTC_COUNT (*((uint32_t*)0xE000E018))
|
||||
#define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1)
|
||||
#define HWTC_DIVISOR 2
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_Renesas_RX600)
|
||||
|
||||
#include "iodefine.h"
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (CMT0.CMCNT)
|
||||
#define HWTC_PERIOD (CMT0.CMCOR + 1)
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24)
|
||||
|
||||
/* For Microchip PIC24 and dsPIC (16 bit) */
|
||||
|
||||
/* Note: The trace library was originally designed for 32-bit MCUs, and is slower
|
||||
than intended on 16-bit MCUs. Storing an event on a PIC24 takes about 70 µs.
|
||||
In comparison, 32-bit MCUs are often 10-20 times faster. If recording overhead
|
||||
becomes a problem on PIC24, use the filters to exclude less interesting tasks
|
||||
or system calls. */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (TMR1)
|
||||
#define HWTC_PERIOD (PR1+1)
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_NXP_LPC210X)
|
||||
#error HWTC_PERIOD must point to the reload register! Not yet updated for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
/* Tested with LPC2106, but should work with most LPC21XX chips. */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT *((uint32_t *)0xE0004008 )
|
||||
#define HWTC_PERIOD
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
#define RTIFRC0 *((uint32_t *)0xFFFFFC10)
|
||||
#define RTICOMP0 *((uint32_t *)0xFFFFFC50)
|
||||
#define RTIUDCP0 *((uint32_t *)0xFFFFFC54)
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (RTIFRC0 - (RTICOMP0 - RTIUDCP0))
|
||||
#define HWTC_PERIOD (RTIUDCP0)
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (TA0R)
|
||||
#define HWTC_PERIOD TRACE_CPU_CLOCKS_PER_TICK
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
|
||||
#define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */
|
||||
#define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_XILINX_PPC405)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
|
||||
#define HWTC_COUNT mfspr( 0x3db)
|
||||
#define HWTC_PERIOD
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_XILINX_PPC440)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
/* This should work with most PowerPC chips */
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
|
||||
#define HWTC_COUNT mfspr( 0x016 )
|
||||
#define HWTC_PERIOD
|
||||
#define HWTC_DIVISOR 1
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE)
|
||||
#error HWTC_PERIOD must point to the reload register! Not verified for this hardware port!
|
||||
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
|
||||
|
||||
/* This should work with most Microblaze configurations.
|
||||
* It uses the AXI Timer 0 - the tick interrupt source.
|
||||
* If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.
|
||||
*/
|
||||
#include "xtmrctr_l.h"
|
||||
|
||||
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
|
||||
#define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )
|
||||
#define HWTC_PERIOD
|
||||
#define HWTC_DIVISOR 16
|
||||
|
||||
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
|
||||
|
||||
#elif (SELECTED_PORT == PORT_APPLICATION_DEFINED)
|
||||
|
||||
#if !( defined (HWTC_COUNT_DIRECTION) && defined (HWTC_COUNT) && defined (HWTC_PERIOD) && defined (HWTC_DIVISOR) && defined (IRQ_PRIORITY_ORDER) )
|
||||
#error SELECTED_PORT is PORT_APPLICATION_DEFINED but not all of the necessary constants have been defined.
|
||||
#endif
|
||||
|
||||
|
||||
#elif (SELECTED_PORT != PORT_NOT_SET)
|
||||
|
||||
#error "SELECTED_PORT had unsupported value!"
|
||||
#define SELECTED_PORT PORT_NOT_SET
|
||||
|
||||
#endif
|
||||
|
||||
#if (SELECTED_PORT != PORT_NOT_SET)
|
||||
|
||||
#ifndef HWTC_COUNT_DIRECTION
|
||||
#error "HWTC_COUNT_DIRECTION is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_COUNT
|
||||
#error "HWTC_COUNT is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_PERIOD
|
||||
#error "HWTC_PERIOD is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef HWTC_DIVISOR
|
||||
#error "HWTC_DIVISOR is not set!"
|
||||
#endif
|
||||
|
||||
#ifndef IRQ_PRIORITY_ORDER
|
||||
#error "IRQ_PRIORITY_ORDER is not set!"
|
||||
#elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)
|
||||
#error "IRQ_PRIORITY_ORDER has bad value!"
|
||||
#endif
|
||||
|
||||
#if (HWTC_DIVISOR < 1)
|
||||
#error "HWTC_DIVISOR must be a non-zero positive value!"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
/*******************************************************************************
|
||||
* vTraceConsoleMessage
|
||||
*
|
||||
* A wrapper for your system-specific console "printf" console output function.
|
||||
* This needs to be correctly defined to see status reports from the trace
|
||||
* status monitor task (this is defined in trcUser.c).
|
||||
******************************************************************************/
|
||||
#if (SELECTED_PORT == PORT_Atmel_AT91SAM7)
|
||||
/* Port specific includes */
|
||||
#include "console.h"
|
||||
#endif
|
||||
|
||||
#define vTraceConsoleMessage(x)
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortGetTimeStamp
|
||||
*
|
||||
* Returns the current time based on the HWTC macros which provide a hardware
|
||||
* isolation layer towards the hardware timer/counter.
|
||||
*
|
||||
* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
|
||||
* or the trace recorder library. Typically you should not need to change
|
||||
* the code of vTracePortGetTimeStamp if using the HWTC macros.
|
||||
*
|
||||
******************************************************************************/
|
||||
void vTracePortGetTimeStamp(uint32_t *puiTimestamp);
|
||||
|
||||
/*******************************************************************************
|
||||
* vTracePortEnd
|
||||
*
|
||||
* This function is called when the recorder is stopped due to full buffer.
|
||||
* Mainly intended to show a message in the console.
|
||||
* This is used by the Win32 port to store the trace to a file. The file path is
|
||||
* set using vTracePortSetFileName.
|
||||
******************************************************************************/
|
||||
void vTracePortEnd(void);
|
||||
|
||||
#endif
|
Loading…
Add table
Add a link
Reference in a new issue