mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-20 01:58:32 -04:00
Normalize line endings and whitespace in source files
This commit is contained in:
Paul Bartell
Paul Bartell
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
558
portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
vendored
558
portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
vendored
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@ -30,7 +30,7 @@
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* \file
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* \ingroup OS_FREERTOS
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* \brief freertos support for arc processor
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* like task dispatcher, interrupt handler
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* like task dispatcher, interrupt handler
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*/
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/** @cond OS_FREERTOS_ASM_ARC_SUPPORT */
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@ -45,30 +45,30 @@
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* task dispatcher
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*
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*/
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.text
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.align 4
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.global dispatch
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.text
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.align 4
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.global dispatch
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dispatch:
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/*
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* the pre-conditions of this routine are task context, CPU is
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* locked, dispatch is enabled.
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*/
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SAVE_NONSCRATCH_REGS /* save callee save registers */
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mov r1, dispatch_r
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PUSH r1 /* save return address */
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ld r0, [pxCurrentTCB]
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bl dispatcher
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SAVE_NONSCRATCH_REGS /* save callee save registers */
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mov r1, dispatch_r
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PUSH r1 /* save return address */
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ld r0, [pxCurrentTCB]
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bl dispatcher
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/* return routine when task dispatch happened in task context */
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dispatch_r:
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RESTORE_NONSCRATCH_REGS /* recover registers */
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j [blink]
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RESTORE_NONSCRATCH_REGS /* recover registers */
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j [blink]
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/*
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* start dispatch
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*/
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.global start_dispatch
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.align 4
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.global start_dispatch
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.align 4
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start_dispatch:
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/*
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* this routine is called in the non-task context during the startup of the kernel
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@ -79,18 +79,18 @@ start_dispatch:
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* locked, the interrupts outside the kernel such as fiq can be
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* enabled.
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*/
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clri
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mov r0, 0
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st r0, [exc_nest_count]
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b dispatcher_0
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clri
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mov r0, 0
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st r0, [exc_nest_count]
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b dispatcher_0
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/*
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* dispatcher
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*/
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dispatcher:
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ld r1, [ulCriticalNesting]
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PUSH r1 /* save critical nesting */
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st sp, [r0] /* save stack pointer of current task, r0->pxCurrentTCB */
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jl vTaskSwitchContext /* change the value of pxCurrentTCB */
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ld r1, [ulCriticalNesting]
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PUSH r1 /* save critical nesting */
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st sp, [r0] /* save stack pointer of current task, r0->pxCurrentTCB */
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jl vTaskSwitchContext /* change the value of pxCurrentTCB */
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/*
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* before dispatcher is called, task context | cpu locked | dispatch enabled
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* should be satisfied. In this routine, the processor will jump
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@ -99,329 +99,329 @@ dispatcher:
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* i.e. kernel mode, IRQ disabled, dispatch enabled
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*/
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dispatcher_0:
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ld r1, [pxCurrentTCB]
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ld sp, [r1] /* recover task stack */
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ld r1, [pxCurrentTCB]
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ld sp, [r1] /* recover task stack */
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#if ARC_FEATURE_STACK_CHECK
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#if ARC_FEATURE_SEC_PRESENT
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lr r0, [AUX_SEC_STAT]
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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lr r0, [AUX_SEC_STAT]
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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#else
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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#endif
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jl vPortSetStackCheck
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jl vPortSetStackCheck
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#if ARC_FEATURE_SEC_PRESENT
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lr r0, [AUX_SEC_STAT]
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bset r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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lr r0, [AUX_SEC_STAT]
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bset r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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#else
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lr r0, [AUX_STATUS32]
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bset r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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lr r0, [AUX_STATUS32]
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bset r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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#endif
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#endif
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POP r0 /* get critical nesting */
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st r0, [ulCriticalNesting]
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POP r0 /* get return address */
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j [r0]
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POP r0 /* get critical nesting */
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st r0, [ulCriticalNesting]
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POP r0 /* get return address */
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j [r0]
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/*
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* task startup routine
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*
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*/
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.text
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.global start_r
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.align 4
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.text
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.global start_r
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.align 4
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start_r:
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seti /* unlock cpu */
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mov blink, vPortEndTask /* set return address */
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POP r1 /* get task function body */
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POP r0 /* get task parameters */
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j [r1]
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seti /* unlock cpu */
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mov blink, vPortEndTask /* set return address */
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POP r1 /* get task function body */
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POP r0 /* get task parameters */
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j [r1]
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/****** exceptions and interrupts handing ******/
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/****** entry for exception handling ******/
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.global exc_entry_cpu
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.align 4
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.global exc_entry_cpu
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.align 4
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exc_entry_cpu:
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EXCEPTION_PROLOGUE
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EXCEPTION_PROLOGUE
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mov blink, sp
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mov r3, sp /* as exception handler's para(p_excinfo) */
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mov blink, sp
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mov r3, sp /* as exception handler's para(p_excinfo) */
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ld r0, [exc_nest_count]
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add r1, r0, 1
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st r1, [exc_nest_count]
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brne r0, 0, exc_handler_1
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ld r0, [exc_nest_count]
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add r1, r0, 1
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st r1, [exc_nest_count]
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brne r0, 0, exc_handler_1
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/* change to exception stack if interrupt happened in task context */
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mov sp, _e_stack
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mov sp, _e_stack
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exc_handler_1:
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PUSH blink
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PUSH blink
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lr r0, [AUX_ECR]
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lsr r0, r0, 16
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mov r1, exc_int_handler_table
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ld.as r2, [r1, r0]
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lr r0, [AUX_ECR]
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lsr r0, r0, 16
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mov r1, exc_int_handler_table
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ld.as r2, [r1, r0]
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mov r0, r3
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jl [r2] /* !!!!jump to exception handler where interrupts are not allowed! */
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mov r0, r3
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jl [r2] /* !!!!jump to exception handler where interrupts are not allowed! */
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/* interrupts are not allowed */
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ret_exc:
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POP sp
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mov r1, exc_nest_count
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ld r0, [r1]
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sub r0, r0, 1
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st r0, [r1]
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brne r0, 0, ret_exc_1 /* nest exception case */
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lr r1, [AUX_IRQ_ACT] /* nest interrupt case */
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brne r1, 0, ret_exc_1
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POP sp
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mov r1, exc_nest_count
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ld r0, [r1]
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sub r0, r0, 1
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st r0, [r1]
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brne r0, 0, ret_exc_1 /* nest exception case */
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lr r1, [AUX_IRQ_ACT] /* nest interrupt case */
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brne r1, 0, ret_exc_1
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ld r0, [context_switch_reqflg]
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brne r0, 0, ret_exc_2
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ret_exc_1: /* return from non-task context, interrupts or exceptions are nested */
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ld r0, [context_switch_reqflg]
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brne r0, 0, ret_exc_2
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ret_exc_1: /* return from non-task context, interrupts or exceptions are nested */
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EXCEPTION_EPILOGUE
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rtie
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EXCEPTION_EPILOGUE
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rtie
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/* there is a dispatch request */
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ret_exc_2:
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/* clear dispatch request */
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mov r0, 0
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st r0, [context_switch_reqflg]
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/* clear dispatch request */
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mov r0, 0
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st r0, [context_switch_reqflg]
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ld r0, [pxCurrentTCB]
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breq r0, 0, ret_exc_1
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ld r0, [pxCurrentTCB]
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breq r0, 0, ret_exc_1
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SAVE_CALLEE_REGS /* save callee save registers */
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SAVE_CALLEE_REGS /* save callee save registers */
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_AE /* clear exception bit */
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kflag r0
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_AE /* clear exception bit */
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kflag r0
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mov r1, ret_exc_r /* save return address */
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PUSH r1
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mov r1, ret_exc_r /* save return address */
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PUSH r1
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bl dispatcher /* r0->pxCurrentTCB */
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bl dispatcher /* r0->pxCurrentTCB */
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ret_exc_r:
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/* recover exception status */
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lr r0, [AUX_STATUS32]
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bset r0, r0, AUX_STATUS_BIT_AE
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kflag r0
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/* recover exception status */
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lr r0, [AUX_STATUS32]
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bset r0, r0, AUX_STATUS_BIT_AE
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kflag r0
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RESTORE_CALLEE_REGS /* recover registers */
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EXCEPTION_EPILOGUE
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rtie
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RESTORE_CALLEE_REGS /* recover registers */
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EXCEPTION_EPILOGUE
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rtie
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/****** entry for normal interrupt exception handling ******/
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.global exc_entry_int /* entry for interrupt handling */
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.align 4
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.global exc_entry_int /* entry for interrupt handling */
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.align 4
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exc_entry_int:
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#if ARC_FEATURE_FIRQ == 1
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#if ARC_FEATURE_RGF_NUM_BANKS > 1
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lr r0, [AUX_IRQ_ACT] /* check whether it is P0 interrupt */
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btst r0, 0
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jnz exc_entry_firq
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lr r0, [AUX_IRQ_ACT] /* check whether it is P0 interrupt */
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btst r0, 0
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jnz exc_entry_firq
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#else
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PUSH r10
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lr r10, [AUX_IRQ_ACT]
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btst r10, 0
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POP r10
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jnz exc_entry_firq
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PUSH r10
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lr r10, [AUX_IRQ_ACT]
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btst r10, 0
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POP r10
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jnz exc_entry_firq
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#endif
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#endif
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INTERRUPT_PROLOGUE
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INTERRUPT_PROLOGUE
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mov blink, sp
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mov blink, sp
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clri /* disable interrupt */
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ld r3, [exc_nest_count]
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add r2, r3, 1
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st r2, [exc_nest_count]
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seti /* enable higher priority interrupt */
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clri /* disable interrupt */
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ld r3, [exc_nest_count]
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add r2, r3, 1
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st r2, [exc_nest_count]
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seti /* enable higher priority interrupt */
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brne r3, 0, irq_handler_1
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brne r3, 0, irq_handler_1
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/* change to exception stack if interrupt happened in task context */
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mov sp, _e_stack
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mov sp, _e_stack
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#if ARC_FEATURE_STACK_CHECK
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#if ARC_FEATURE_SEC_PRESENT
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lr r0, [AUX_SEC_STAT]
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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lr r0, [AUX_SEC_STAT]
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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#else
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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#endif
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#endif
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irq_handler_1:
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PUSH blink
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PUSH blink
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lr r0, [AUX_IRQ_CAUSE]
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mov r1, exc_int_handler_table
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ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */
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lr r0, [AUX_IRQ_CAUSE]
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mov r1, exc_int_handler_table
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ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */
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/* handle software triggered interrupt */
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lr r3, [AUX_IRQ_HINT]
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cmp r3, r0
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bne.d irq_hint_handled
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xor r3, r3, r3
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sr r3, [AUX_IRQ_HINT]
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lr r3, [AUX_IRQ_HINT]
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cmp r3, r0
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bne.d irq_hint_handled
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xor r3, r3, r3
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sr r3, [AUX_IRQ_HINT]
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irq_hint_handled:
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jl [r2] /* jump to interrupt handler */
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jl [r2] /* jump to interrupt handler */
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/* no interrupts are allowed from here */
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ret_int:
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clri /* disable interrupt */
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clri /* disable interrupt */
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POP sp
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mov r1, exc_nest_count
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ld r0, [r1]
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sub r0, r0, 1
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st r0, [r1]
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POP sp
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mov r1, exc_nest_count
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ld r0, [r1]
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sub r0, r0, 1
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st r0, [r1]
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/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */
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lr r0, [AUX_IRQ_CAUSE]
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sr r0, [AUX_IRQ_SELECT]
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lr r3, [AUX_IRQ_PRIORITY]
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lr r1, [AUX_IRQ_ACT]
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bclr r2, r1, r3
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brne r2, 0, ret_int_1
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lr r0, [AUX_IRQ_CAUSE]
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sr r0, [AUX_IRQ_SELECT]
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lr r3, [AUX_IRQ_PRIORITY]
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lr r1, [AUX_IRQ_ACT]
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bclr r2, r1, r3
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brne r2, 0, ret_int_1
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ld r0, [context_switch_reqflg]
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brne r0, 0, ret_int_2
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ret_int_1: /* return from non-task context */
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INTERRUPT_EPILOGUE
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rtie
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ld r0, [context_switch_reqflg]
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brne r0, 0, ret_int_2
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ret_int_1: /* return from non-task context */
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INTERRUPT_EPILOGUE
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rtie
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/* there is a dispatch request */
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ret_int_2:
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/* clear dispatch request */
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mov r0, 0
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st r0, [context_switch_reqflg]
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/* clear dispatch request */
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mov r0, 0
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st r0, [context_switch_reqflg]
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ld r0, [pxCurrentTCB]
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breq r0, 0, ret_int_1
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ld r0, [pxCurrentTCB]
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breq r0, 0, ret_int_1
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/* r1 has old AUX_IRQ_ACT */
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PUSH r1
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PUSH r1
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/* clear related bits in IRQ_ACT manually to simulate a irq return */
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sr r2, [AUX_IRQ_ACT]
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sr r2, [AUX_IRQ_ACT]
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|
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SAVE_CALLEE_REGS /* save callee save registers */
|
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mov r1, ret_int_r /* save return address */
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PUSH r1
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SAVE_CALLEE_REGS /* save callee save registers */
|
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mov r1, ret_int_r /* save return address */
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PUSH r1
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bl dispatcher /* r0->pxCurrentTCB */
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bl dispatcher /* r0->pxCurrentTCB */
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|
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ret_int_r:
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RESTORE_CALLEE_REGS /* recover registers */
|
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POPAX AUX_IRQ_ACT
|
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INTERRUPT_EPILOGUE
|
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rtie
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RESTORE_CALLEE_REGS /* recover registers */
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POPAX AUX_IRQ_ACT
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INTERRUPT_EPILOGUE
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rtie
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#if ARC_FEATURE_FIRQ == 1
|
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.global exc_entry_firq
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.align 4
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.global exc_entry_firq
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.align 4
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exc_entry_firq:
|
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#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS > 1
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#if ARC_FEATURE_SEC_PRESENT
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lr r0, [AUX_SEC_STAT]
|
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
|
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lr r0, [AUX_SEC_STAT]
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bclr r0, r0, AUX_SEC_STAT_BIT_SSC
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sflag r0
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#else
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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lr r0, [AUX_STATUS32]
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bclr r0, r0, AUX_STATUS_BIT_SC
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kflag r0
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#endif
|
||||
#endif
|
||||
SAVE_FIQ_EXC_REGS
|
||||
SAVE_FIQ_EXC_REGS
|
||||
|
||||
mov blink, sp
|
||||
mov blink, sp
|
||||
|
||||
ld r3, [exc_nest_count]
|
||||
add r2, r3, 1
|
||||
st r2, [exc_nest_count]
|
||||
ld r3, [exc_nest_count]
|
||||
add r2, r3, 1
|
||||
st r2, [exc_nest_count]
|
||||
|
||||
brne r3, 0, firq_handler_1
|
||||
brne r3, 0, firq_handler_1
|
||||
#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS == 1
|
||||
#if ARC_FEATURE_SEC_PRESENT
|
||||
lr r0, [AUX_SEC_STAT]
|
||||
bclr r0, r0, AUX_SEC_STAT_BIT_SSC
|
||||
sflag r0
|
||||
lr r0, [AUX_SEC_STAT]
|
||||
bclr r0, r0, AUX_SEC_STAT_BIT_SSC
|
||||
sflag r0
|
||||
#else
|
||||
lr r0, [AUX_STATUS32]
|
||||
bclr r0, r0, AUX_STATUS_BIT_SC
|
||||
kflag r0
|
||||
lr r0, [AUX_STATUS32]
|
||||
bclr r0, r0, AUX_STATUS_BIT_SC
|
||||
kflag r0
|
||||
#endif
|
||||
#endif
|
||||
/* change to exception stack if interrupt happened in task context */
|
||||
mov sp, _e_stack
|
||||
mov sp, _e_stack
|
||||
firq_handler_1:
|
||||
PUSH blink
|
||||
PUSH blink
|
||||
|
||||
lr r0, [AUX_IRQ_CAUSE]
|
||||
mov r1, exc_int_handler_table
|
||||
ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */
|
||||
lr r0, [AUX_IRQ_CAUSE]
|
||||
mov r1, exc_int_handler_table
|
||||
ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */
|
||||
/* handle software triggered interrupt */
|
||||
lr r3, [AUX_IRQ_HINT]
|
||||
brne r3, r0, firq_hint_handled
|
||||
xor r3, r3, r3
|
||||
sr r3, [AUX_IRQ_HINT]
|
||||
lr r3, [AUX_IRQ_HINT]
|
||||
brne r3, r0, firq_hint_handled
|
||||
xor r3, r3, r3
|
||||
sr r3, [AUX_IRQ_HINT]
|
||||
firq_hint_handled:
|
||||
|
||||
jl [r2] /* jump to interrupt handler */
|
||||
jl [r2] /* jump to interrupt handler */
|
||||
/* no interrupts are allowed from here */
|
||||
ret_firq:
|
||||
clri
|
||||
POP sp
|
||||
clri
|
||||
POP sp
|
||||
|
||||
mov r1, exc_nest_count
|
||||
ld r0, [r1]
|
||||
sub r0, r0, 1
|
||||
st r0, [r1]
|
||||
mov r1, exc_nest_count
|
||||
ld r0, [r1]
|
||||
sub r0, r0, 1
|
||||
st r0, [r1]
|
||||
/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */
|
||||
lr r1, [AUX_IRQ_ACT]
|
||||
bclr r1, r1, 0
|
||||
brne r1, 0, ret_firq_1
|
||||
lr r1, [AUX_IRQ_ACT]
|
||||
bclr r1, r1, 0
|
||||
brne r1, 0, ret_firq_1
|
||||
|
||||
ld r0, [context_switch_reqflg]
|
||||
brne r0, 0, ret_firq_2
|
||||
ret_firq_1: /* return from non-task context */
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
rtie
|
||||
ld r0, [context_switch_reqflg]
|
||||
brne r0, 0, ret_firq_2
|
||||
ret_firq_1: /* return from non-task context */
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
rtie
|
||||
/* there is a dispatch request */
|
||||
ret_firq_2:
|
||||
/* clear dispatch request */
|
||||
mov r0, 0
|
||||
st r0, [context_switch_reqflg]
|
||||
/* clear dispatch request */
|
||||
mov r0, 0
|
||||
st r0, [context_switch_reqflg]
|
||||
|
||||
ld r0, [pxCurrentTCB]
|
||||
breq r0, 0, ret_firq_1
|
||||
ld r0, [pxCurrentTCB]
|
||||
breq r0, 0, ret_firq_1
|
||||
|
||||
/* reconstruct the interruptted context
|
||||
* When ARC_FEATURE_RGF_BANKED_REGS >= 16 (16, 32), sp is banked
|
||||
* so need to restore the fast irq stack.
|
||||
*/
|
||||
#if ARC_FEATURE_RGF_BANKED_REGS >= 16
|
||||
RESTORE_LP_REGS
|
||||
RESTORE_LP_REGS
|
||||
#if ARC_FEATURE_CODE_DENSITY
|
||||
RESTORE_CODE_DENSITY
|
||||
RESTORE_CODE_DENSITY
|
||||
#endif
|
||||
RESTORE_R58_R59
|
||||
RESTORE_R58_R59
|
||||
#endif
|
||||
|
||||
/* when BANKED_REGS == 16, r4-r9 wiil be also saved in fast irq stack
|
||||
* so pop them out
|
||||
*/
|
||||
#if ARC_FEATURE_RGF_BANKED_REGS == 16 && !defined(ARC_FEATURE_RF16)
|
||||
POP r9
|
||||
POP r8
|
||||
POP r7
|
||||
POP r6
|
||||
POP r5
|
||||
POP r4
|
||||
POP r9
|
||||
POP r8
|
||||
POP r7
|
||||
POP r6
|
||||
POP r5
|
||||
POP r4
|
||||
#endif
|
||||
|
||||
/* for other cases, unbanked regs are already in interrupted context's stack,
|
||||
|
|
@ -431,92 +431,92 @@ ret_firq_2:
|
|||
/* save the interruptted context */
|
||||
#if ARC_FEATURE_RGF_BANKED_REGS > 0
|
||||
/* switch back to bank0 */
|
||||
lr r0, [AUX_STATUS32]
|
||||
bic r0, r0, 0x70000
|
||||
kflag r0
|
||||
lr r0, [AUX_STATUS32]
|
||||
bic r0, r0, 0x70000
|
||||
kflag r0
|
||||
#endif
|
||||
|
||||
#if ARC_FEATURE_RGF_BANKED_REGS == 4
|
||||
/* r4 - r12, gp, fp, r30, blink already saved */
|
||||
PUSH r0
|
||||
PUSH r1
|
||||
PUSH r2
|
||||
PUSH r3
|
||||
PUSH r0
|
||||
PUSH r1
|
||||
PUSH r2
|
||||
PUSH r3
|
||||
#elif ARC_FEATURE_RGF_BANKED_REGS == 8
|
||||
/* r4 - r9, r0, r11 gp, fp, r30, blink already saved */
|
||||
PUSH r0
|
||||
PUSH r1
|
||||
PUSH r2
|
||||
PUSH r3
|
||||
PUSH r12
|
||||
PUSH r0
|
||||
PUSH r1
|
||||
PUSH r2
|
||||
PUSH r3
|
||||
PUSH r12
|
||||
#elif ARC_FEATURE_RGF_BANKED_REGS >= 16
|
||||
/* nothing is saved, */
|
||||
SAVE_R0_TO_R12
|
||||
SAVE_R0_TO_R12
|
||||
|
||||
SAVE_R58_R59
|
||||
PUSH gp
|
||||
PUSH fp
|
||||
PUSH r30 /* general purpose */
|
||||
PUSH blink
|
||||
SAVE_R58_R59
|
||||
PUSH gp
|
||||
PUSH fp
|
||||
PUSH r30 /* general purpose */
|
||||
PUSH blink
|
||||
|
||||
#if ARC_FEATURE_CODE_DENSITY
|
||||
SAVE_CODE_DENSITY
|
||||
SAVE_CODE_DENSITY
|
||||
#endif
|
||||
SAVE_LP_REGS
|
||||
SAVE_LP_REGS
|
||||
#endif
|
||||
PUSH ilink
|
||||
lr r0, [AUX_STATUS32_P0]
|
||||
PUSH r0
|
||||
lr r0, [AUX_IRQ_ACT]
|
||||
PUSH r0
|
||||
bclr r0, r0, 0
|
||||
sr r0, [AUX_IRQ_ACT]
|
||||
PUSH ilink
|
||||
lr r0, [AUX_STATUS32_P0]
|
||||
PUSH r0
|
||||
lr r0, [AUX_IRQ_ACT]
|
||||
PUSH r0
|
||||
bclr r0, r0, 0
|
||||
sr r0, [AUX_IRQ_ACT]
|
||||
|
||||
SAVE_CALLEE_REGS /* save callee save registers */
|
||||
SAVE_CALLEE_REGS /* save callee save registers */
|
||||
|
||||
mov r1, ret_firq_r /* save return address */
|
||||
PUSH r1
|
||||
ld r0, [pxCurrentTCB]
|
||||
bl dispatcher /* r0->pxCurrentTCB */
|
||||
mov r1, ret_firq_r /* save return address */
|
||||
PUSH r1
|
||||
ld r0, [pxCurrentTCB]
|
||||
bl dispatcher /* r0->pxCurrentTCB */
|
||||
|
||||
ret_firq_r:
|
||||
RESTORE_CALLEE_REGS /* recover registers */
|
||||
POPAX AUX_IRQ_ACT
|
||||
POPAX AUX_STATUS32_P0
|
||||
POP ilink
|
||||
RESTORE_CALLEE_REGS /* recover registers */
|
||||
POPAX AUX_IRQ_ACT
|
||||
POPAX AUX_STATUS32_P0
|
||||
POP ilink
|
||||
|
||||
#if ARC_FEATURE_RGF_NUM_BANKS > 1
|
||||
#if ARC_FEATURE_RGF_BANKED_REGS == 4
|
||||
/* r4 - r12, gp, fp, r30, blink already saved */
|
||||
POP r3
|
||||
POP r2
|
||||
POP r1
|
||||
POP r0
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
POP r3
|
||||
POP r2
|
||||
POP r1
|
||||
POP r0
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
#elif ARC_FEATURE_RGF_BANKED_REGS == 8
|
||||
/* r4 - r9, gp, fp, r30, blink already saved */
|
||||
POP r12
|
||||
POP r3
|
||||
POP r2
|
||||
POP r1
|
||||
POP r0
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
POP r12
|
||||
POP r3
|
||||
POP r2
|
||||
POP r1
|
||||
POP r0
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
#elif ARC_FEATURE_RGF_BANKED_REGS >= 16
|
||||
RESTORE_LP_REGS
|
||||
RESTORE_LP_REGS
|
||||
#if ARC_FEATURE_CODE_DENSITY
|
||||
RESTORE_CODE_DENSITY
|
||||
RESTORE_CODE_DENSITY
|
||||
#endif
|
||||
POP blink
|
||||
POP r30
|
||||
POP fp
|
||||
POP gp
|
||||
POP blink
|
||||
POP r30
|
||||
POP fp
|
||||
POP gp
|
||||
|
||||
RESTORE_R58_R59
|
||||
RESTORE_R0_TO_R12
|
||||
RESTORE_R58_R59
|
||||
RESTORE_R0_TO_R12
|
||||
#endif /* ARC_FEATURE_RGF_BANKED_REGS */
|
||||
#else
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
RESTORE_FIQ_EXC_REGS
|
||||
#endif /* ARC_FEATURE_RGF_NUM_BANKS */
|
||||
rtie
|
||||
rtie
|
||||
#endif
|
||||
/** @endcond */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue