mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Normalize line endings and whitespace in source files
This commit is contained in:
Paul Bartell
Paul Bartell
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
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@ -1,269 +1,269 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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#define portNVIC_SHPR3_REG ( ( volatile uint32_t * ) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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#define portVECTACTIVE_MASK ( 0xFFUL )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXC_RETURN ( 0xfffffffd )
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/* Let the user override the pre-loading of the initial LR with the address of
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* prvTaskExitError() in case it messes up unwinding of the stack in the
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* debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* For strict compliance with the Cortex-M spec the task start address should
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* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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/* The priority used by the kernel is assigned to a variable to make access
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* from inline assembler easier. */
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const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
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/* Each task maintains its own interrupt status in the critical nesting
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* variable. */
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static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void SysTick_Handler( void );
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/*
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* Functions defined in port_asm.asm.
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*/
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extern void vPortEnableVFP( void );
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extern void vPortStartFirstTask( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/* This exists purely to allow the const to be used from within the
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* port_asm.asm assembly file. */
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const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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* interrupt. */
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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* of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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/* A save method is being used that requires each task to maintain its
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* own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXC_RETURN;
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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* its caller as there is nothing to return to. If a task wants to exit it
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* should instead call vTaskDelete( NULL ).
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*
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* Artificially force an assert() to be triggered if configASSERT() is
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* defined, then stop here so application writers can catch the error. */
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configASSERT( ulCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ; ; )
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{
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}
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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/* Make PendSV and SysTick the lowest priority interrupts. */
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*( portNVIC_SHPR3_REG ) |= portNVIC_PENDSV_PRI;
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*( portNVIC_SHPR3_REG ) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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* here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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/* Ensure the VFP is enabled - it should be anyway. */
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vPortEnableVFP();
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/* Lazy save always. */
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*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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* Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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/* Barriers are normally not required but do ensure the code is completely
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* within the specified behaviour for the architecture. */
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__DSB();
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__ISB();
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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ulCriticalNesting++;
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__DSB();
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__ISB();
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/* This is not the interrupt safe version of the enter critical function so
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* assert() if it is being called from an interrupt context. Only API
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* functions that end in "FromISR" can be used in an interrupt. Only assert if
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* the critical nesting count is 1 to protect against recursive calls if the
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* assert function also uses a critical section. */
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if( ulCriticalNesting == 1 )
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{
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configASSERT( ( ( *( portNVIC_INT_CTRL ) ) & portVECTACTIVE_MASK ) == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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configASSERT( ulCriticalNesting );
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ulCriticalNesting--;
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if( ulCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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void SysTick_Handler( void )
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{
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uint32_t ulDummy;
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup the systick timer to generate the tick interrupts at the required
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* frequency.
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*/
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void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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/*-----------------------------------------------------------*/
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
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||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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#define portNVIC_SHPR3_REG ( ( volatile uint32_t * ) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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#define portVECTACTIVE_MASK ( 0xFFUL )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXC_RETURN ( 0xfffffffd )
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/* Let the user override the pre-loading of the initial LR with the address of
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* prvTaskExitError() in case it messes up unwinding of the stack in the
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* debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* For strict compliance with the Cortex-M spec the task start address should
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* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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/* The priority used by the kernel is assigned to a variable to make access
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* from inline assembler easier. */
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const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
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/* Each task maintains its own interrupt status in the critical nesting
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* variable. */
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static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void SysTick_Handler( void );
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/*
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* Functions defined in port_asm.asm.
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*/
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extern void vPortEnableVFP( void );
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extern void vPortStartFirstTask( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
|
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*/
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static void prvTaskExitError( void );
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/* This exists purely to allow the const to be used from within the
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* port_asm.asm assembly file. */
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const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
|
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void * pvParameters )
|
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{
|
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/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
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|
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/* Offset added to account for the way the MCU uses the stack on entry/exit
|
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* of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
|
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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|
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/* A save method is being used that requires each task to maintain its
|
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* own exec return value. */
|
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXC_RETURN;
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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return pxTopOfStack;
|
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}
|
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/*-----------------------------------------------------------*/
|
||||
|
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static void prvTaskExitError( void )
|
||||
{
|
||||
/* A function that implements a task must not exit or attempt to return to
|
||||
* its caller as there is nothing to return to. If a task wants to exit it
|
||||
* should instead call vTaskDelete( NULL ).
|
||||
*
|
||||
* Artificially force an assert() to be triggered if configASSERT() is
|
||||
* defined, then stop here so application writers can catch the error. */
|
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configASSERT( ulCriticalNesting == ~0UL );
|
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portDISABLE_INTERRUPTS();
|
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|
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for( ; ; )
|
||||
{
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
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/*
|
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* See header file for description.
|
||||
*/
|
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BaseType_t xPortStartScheduler( void )
|
||||
{
|
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
|
||||
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
|
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|
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/* Make PendSV and SysTick the lowest priority interrupts. */
|
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*( portNVIC_SHPR3_REG ) |= portNVIC_PENDSV_PRI;
|
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*( portNVIC_SHPR3_REG ) |= portNVIC_SYSTICK_PRI;
|
||||
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Initialise the critical nesting count ready for the first task. */
|
||||
ulCriticalNesting = 0;
|
||||
|
||||
/* Ensure the VFP is enabled - it should be anyway. */
|
||||
vPortEnableVFP();
|
||||
|
||||
/* Lazy save always. */
|
||||
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
|
||||
|
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/* Start the first task. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
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void vPortEndScheduler( void )
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||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
configASSERT( ulCriticalNesting == 1000UL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortYield( void )
|
||||
{
|
||||
/* Set a PendSV to request a context switch. */
|
||||
*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
|
||||
|
||||
/* Barriers are normally not required but do ensure the code is completely
|
||||
* within the specified behaviour for the architecture. */
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
ulCriticalNesting++;
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
/* This is not the interrupt safe version of the enter critical function so
|
||||
* assert() if it is being called from an interrupt context. Only API
|
||||
* functions that end in "FromISR" can be used in an interrupt. Only assert if
|
||||
* the critical nesting count is 1 to protect against recursive calls if the
|
||||
* assert function also uses a critical section. */
|
||||
if( ulCriticalNesting == 1 )
|
||||
{
|
||||
configASSERT( ( ( *( portNVIC_INT_CTRL ) ) & portVECTACTIVE_MASK ) == 0 );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
configASSERT( ulCriticalNesting );
|
||||
ulCriticalNesting--;
|
||||
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void SysTick_Handler( void )
|
||||
{
|
||||
uint32_t ulDummy;
|
||||
|
||||
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Pend a context switch. */
|
||||
*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Setup the systick timer to generate the tick interrupts at the required
|
||||
* frequency.
|
||||
*/
|
||||
void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
*( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
*( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -1,237 +1,236 @@
|
|||
;/*
|
||||
; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * SPDX-License-Identifier: MIT
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; */
|
||||
|
||||
|
||||
.extern pxCurrentTCB
|
||||
.extern vTaskSwitchContext
|
||||
.extern ulMaxSyscallInterruptPriorityConst
|
||||
|
||||
.global _vector_14
|
||||
.global _lc_ref__vector_pp_14
|
||||
.global SVC_Handler
|
||||
.global vPortStartFirstTask
|
||||
.global vPortEnableVFP
|
||||
.global ulPortSetInterruptMask
|
||||
.global vPortClearInterruptMask
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
_vector_14: .type func
|
||||
|
||||
mrs r0, psp
|
||||
isb
|
||||
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r2, [r3]
|
||||
|
||||
;Is the task using the FPU context? If so, push high vfp registers.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
|
||||
;Save the core registers.
|
||||
stmdb r0!, {r4-r11, r14}
|
||||
|
||||
;Save the new top of stack into the first member of the TCB.
|
||||
str r0, [r2]
|
||||
|
||||
stmdb sp!, {r0, r3}
|
||||
ldr.w r0, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r0, [r0]
|
||||
msr basepri, r0
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r0, r3}
|
||||
|
||||
;The first item in pxCurrentTCB is the task top of stack.
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
|
||||
;Is the task using the FPU context? If so, pop the high vfp registers too.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
|
||||
msr psp, r0
|
||||
isb
|
||||
bx r14
|
||||
|
||||
.size _vector_14, $-_vector_14
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
; This function is an XMC4000 silicon errata workaround. It will get used when
|
||||
; the SILICON_BUG_PMC_CM_001 linker macro is defined.
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
_lc_ref__vector_pp_14: .type func
|
||||
|
||||
mrs r0, psp
|
||||
isb
|
||||
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r2, [r3]
|
||||
|
||||
;Is the task using the FPU context? If so, push high vfp registers.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
|
||||
;Save the core registers.
|
||||
stmdb r0!, {r4-r11, r14}
|
||||
|
||||
;Save the new top of stack into the first member of the TCB.
|
||||
str r0, [r2]
|
||||
|
||||
stmdb sp!, {r3}
|
||||
ldr.w r0, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r0, [r0]
|
||||
msr basepri, r0
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r3}
|
||||
|
||||
;The first item in pxCurrentTCB is the task top of stack.
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
|
||||
;Is the task using the FPU context? If so, pop the high vfp registers too.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
|
||||
msr psp, r0
|
||||
isb
|
||||
push { lr }
|
||||
pop { pc } ; XMC4000 specific errata workaround. Do not used "bx lr" here.
|
||||
|
||||
.size _lc_ref__vector_pp_14, $-_lc_ref__vector_pp_14
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
SVC_Handler: .type func
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
msr psp, r0
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
.size SVC_Handler, $-SVC_Handler
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortStartFirstTask .type func
|
||||
;Use the NVIC offset register to locate the stack.
|
||||
ldr.w r0, =0xE000ED08
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0]
|
||||
;Set the msp back to the start of the stack.
|
||||
msr msp, r0
|
||||
;Call SVC to start the first task.
|
||||
cpsie i
|
||||
cpsie f
|
||||
dsb
|
||||
isb
|
||||
svc 0
|
||||
.size vPortStartFirstTask, $-vPortStartFirstTask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortEnableVFP .type func
|
||||
;The FPU enable bits are in the CPACR.
|
||||
ldr.w r0, =0xE000ED88
|
||||
ldr r1, [r0]
|
||||
|
||||
;Enable CP10 and CP11 coprocessors, then save back.
|
||||
orr r1, r1, #( 0xf << 20 )
|
||||
str r1, [r0]
|
||||
bx r14
|
||||
.size vPortEnableVFP, $-vPortEnableVFP
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
ulPortSetInterruptMask:
|
||||
mrs r0, basepri
|
||||
ldr.w r1, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r1, [r1]
|
||||
msr basepri, r1
|
||||
bx r14
|
||||
.size ulPortSetInterruptMask, $-ulPortSetInterruptMask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortClearInterruptMask:
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
.size vPortClearInterruptMask, $-vPortClearInterruptMask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.end
|
||||
|
||||
;/*
|
||||
; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * SPDX-License-Identifier: MIT
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; */
|
||||
|
||||
|
||||
.extern pxCurrentTCB
|
||||
.extern vTaskSwitchContext
|
||||
.extern ulMaxSyscallInterruptPriorityConst
|
||||
|
||||
.global _vector_14
|
||||
.global _lc_ref__vector_pp_14
|
||||
.global SVC_Handler
|
||||
.global vPortStartFirstTask
|
||||
.global vPortEnableVFP
|
||||
.global ulPortSetInterruptMask
|
||||
.global vPortClearInterruptMask
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
_vector_14: .type func
|
||||
|
||||
mrs r0, psp
|
||||
isb
|
||||
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r2, [r3]
|
||||
|
||||
;Is the task using the FPU context? If so, push high vfp registers.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
|
||||
;Save the core registers.
|
||||
stmdb r0!, {r4-r11, r14}
|
||||
|
||||
;Save the new top of stack into the first member of the TCB.
|
||||
str r0, [r2]
|
||||
|
||||
stmdb sp!, {r0, r3}
|
||||
ldr.w r0, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r0, [r0]
|
||||
msr basepri, r0
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r0, r3}
|
||||
|
||||
;The first item in pxCurrentTCB is the task top of stack.
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
|
||||
;Is the task using the FPU context? If so, pop the high vfp registers too.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
|
||||
msr psp, r0
|
||||
isb
|
||||
bx r14
|
||||
|
||||
.size _vector_14, $-_vector_14
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
; This function is an XMC4000 silicon errata workaround. It will get used when
|
||||
; the SILICON_BUG_PMC_CM_001 linker macro is defined.
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
_lc_ref__vector_pp_14: .type func
|
||||
|
||||
mrs r0, psp
|
||||
isb
|
||||
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r2, [r3]
|
||||
|
||||
;Is the task using the FPU context? If so, push high vfp registers.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
|
||||
;Save the core registers.
|
||||
stmdb r0!, {r4-r11, r14}
|
||||
|
||||
;Save the new top of stack into the first member of the TCB.
|
||||
str r0, [r2]
|
||||
|
||||
stmdb sp!, {r3}
|
||||
ldr.w r0, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r0, [r0]
|
||||
msr basepri, r0
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r3}
|
||||
|
||||
;The first item in pxCurrentTCB is the task top of stack.
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
|
||||
;Is the task using the FPU context? If so, pop the high vfp registers too.
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
|
||||
msr psp, r0
|
||||
isb
|
||||
push { lr }
|
||||
pop { pc } ; XMC4000 specific errata workaround. Do not used "bx lr" here.
|
||||
|
||||
.size _lc_ref__vector_pp_14, $-_lc_ref__vector_pp_14
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
SVC_Handler: .type func
|
||||
;Get the location of the current TCB.
|
||||
ldr.w r3, =pxCurrentTCB
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
;Pop the core registers.
|
||||
ldmia r0!, {r4-r11, r14}
|
||||
msr psp, r0
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
.size SVC_Handler, $-SVC_Handler
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortStartFirstTask .type func
|
||||
;Use the NVIC offset register to locate the stack.
|
||||
ldr.w r0, =0xE000ED08
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0]
|
||||
;Set the msp back to the start of the stack.
|
||||
msr msp, r0
|
||||
;Call SVC to start the first task.
|
||||
cpsie i
|
||||
cpsie f
|
||||
dsb
|
||||
isb
|
||||
svc 0
|
||||
.size vPortStartFirstTask, $-vPortStartFirstTask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortEnableVFP .type func
|
||||
;The FPU enable bits are in the CPACR.
|
||||
ldr.w r0, =0xE000ED88
|
||||
ldr r1, [r0]
|
||||
|
||||
;Enable CP10 and CP11 coprocessors, then save back.
|
||||
orr r1, r1, #( 0xf << 20 )
|
||||
str r1, [r0]
|
||||
bx r14
|
||||
.size vPortEnableVFP, $-vPortEnableVFP
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
ulPortSetInterruptMask:
|
||||
mrs r0, basepri
|
||||
ldr.w r1, =ulMaxSyscallInterruptPriorityConst
|
||||
ldr r1, [r1]
|
||||
msr basepri, r1
|
||||
bx r14
|
||||
.size ulPortSetInterruptMask, $-ulPortSetInterruptMask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.section .text
|
||||
.thumb
|
||||
.align 4
|
||||
vPortClearInterruptMask:
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
.size vPortClearInterruptMask, $-vPortClearInterruptMask
|
||||
.endsec
|
||||
|
||||
;-----------------------------------------------------------
|
||||
|
||||
.end
|
||||
|
|
|
|||
|
|
@ -1,133 +1,133 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYield( void );
|
||||
#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
||||
#define portNVIC_PENDSVSET 0x10000000
|
||||
#define portYIELD() vPortYield()
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
/*
|
||||
* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
|
||||
* registers. r0 is clobbered.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
|
||||
/*
|
||||
* Set basepri back to 0 without effective other registers.
|
||||
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
|
||||
*/
|
||||
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
|
||||
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMask );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYield( void );
|
||||
#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
||||
#define portNVIC_PENDSVSET 0x10000000
|
||||
#define portYIELD() vPortYield()
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
/*
|
||||
* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
|
||||
* registers. r0 is clobbered.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
|
||||
/*
|
||||
* Set basepri back to 0 without effective other registers.
|
||||
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
|
||||
*/
|
||||
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
|
||||
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMask );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue