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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Normalize line endings and whitespace in source files
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Paul Bartell
Paul Bartell
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
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@ -1,178 +1,174 @@
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;/*
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; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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; *
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; * SPDX-License-Identifier: MIT
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; *
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; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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; * this software and associated documentation files (the "Software"), to deal in
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; * the Software without restriction, including without limitation the rights to
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; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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; * the Software, and to permit persons to whom the Software is furnished to do so,
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; * subject to the following conditions:
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; *
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; * The above copyright notice and this permission notice shall be included in all
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; * copies or substantial portions of the Software.
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; *
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; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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; *
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; * https://www.FreeRTOS.org
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; * https://github.com/FreeRTOS
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; *
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; */
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INCLUDE FreeRTOSConfig.h
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INCLUDE portmacro.h
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EXTERN vApplicationIRQHandler
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EXTERN vTaskSwitchContext
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EXTERN ulPortYieldRequired
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EXTERN ulPortInterruptNesting
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PUBLIC FreeRTOS_SWI_Handler
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PUBLIC FreeRTOS_IRQ_Handler
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PUBLIC vPortRestoreTaskContext
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SYS_MODE EQU 0x1f
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SVC_MODE EQU 0x13
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IRQ_MODE EQU 0x12
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SECTION .text:CODE:ROOT(2)
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ARM
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INCLUDE portASM.h
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; SVC handler is used to yield a task.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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FreeRTOS_SWI_Handler
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PRESERVE8
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; Save the context of the current task and select a new task to run.
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portSAVE_CONTEXT
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LDR R0, =vTaskSwitchContext
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BLX R0
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portRESTORE_CONTEXT
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; vPortRestoreTaskContext is used to start the scheduler.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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vPortRestoreTaskContext
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; Switch to system mode
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CPS #SYS_MODE
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portRESTORE_CONTEXT
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; PL390 GIC interrupt handler
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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FreeRTOS_IRQ_Handler
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; Return to the interrupted instruction.
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SUB lr, lr, #4
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; Push the return address and SPSR
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PUSH {lr}
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MRS lr, SPSR
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PUSH {lr}
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; Change to supervisor mode to allow reentry.
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CPS #SVC_MODE
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; Push used registers.
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PUSH {r0-r4, r12}
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; Increment nesting count. r3 holds the address of ulPortInterruptNesting
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; for future use. r1 holds the original ulPortInterruptNesting value for
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; future use.
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LDR r3, =ulPortInterruptNesting
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LDR r1, [r3]
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ADD r4, r1, #1
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STR r4, [r3]
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; Read value from the interrupt acknowledge register, which is stored in r0
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; for future parameter and interrupt clearing use.
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LDR r2, =portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS
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LDR r0, [r2]
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; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
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; future use. _RB_ Is this ever necessary if start of stack is 8-byte aligned?
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MOV r2, sp
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AND r2, r2, #4
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SUB sp, sp, r2
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; Call the interrupt handler. r4 is pushed to maintain alignment.
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PUSH {r0-r4, lr}
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LDR r1, =vApplicationIRQHandler
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BLX r1
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POP {r0-r4, lr}
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ADD sp, sp, r2
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CPSID i
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; Write the value read from ICCIAR to ICCEOIR
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LDR r4, =portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS
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STR r0, [r4]
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; Restore the old nesting count
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STR r1, [r3]
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; A context switch is never performed if the nesting count is not 0
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CMP r1, #0
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BNE exit_without_switch
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; Did the interrupt request a context switch? r1 holds the address of
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; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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; use.
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LDR r1, =ulPortYieldRequired
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LDR r0, [r1]
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CMP r0, #0
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BNE switch_before_exit
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exit_without_switch
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; No context switch. Restore used registers, LR_irq and SPSR before
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; returning.
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POP {r0-r4, r12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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POP {LR}
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MOVS PC, LR
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switch_before_exit
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; A context switch is to be performed. Clear the context switch pending
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; flag.
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MOV r0, #0
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STR r0, [r1]
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; Restore used registers, LR-irq and SPSR before saving the context
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; to the task stack.
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POP {r0-r4, r12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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POP {LR}
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portSAVE_CONTEXT
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; Call the function that selects the new task to execute.
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; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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; instructions, or 8 byte aligned stack allocated data. LR does not need
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; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
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LDR r0, =vTaskSwitchContext
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BLX r0
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; Restore the context of, and branch to, the task selected to execute next.
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portRESTORE_CONTEXT
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END
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;/*
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; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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; *
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; * SPDX-License-Identifier: MIT
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; *
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; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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; * this software and associated documentation files (the "Software"), to deal in
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; * the Software without restriction, including without limitation the rights to
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; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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; * the Software, and to permit persons to whom the Software is furnished to do so,
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; * subject to the following conditions:
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; *
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; * The above copyright notice and this permission notice shall be included in all
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; * copies or substantial portions of the Software.
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; *
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; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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; *
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; * https://www.FreeRTOS.org
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; * https://github.com/FreeRTOS
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; *
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; */
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INCLUDE FreeRTOSConfig.h
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INCLUDE portmacro.h
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EXTERN vApplicationIRQHandler
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EXTERN vTaskSwitchContext
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EXTERN ulPortYieldRequired
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EXTERN ulPortInterruptNesting
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PUBLIC FreeRTOS_SWI_Handler
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PUBLIC FreeRTOS_IRQ_Handler
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PUBLIC vPortRestoreTaskContext
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SYS_MODE EQU 0x1f
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SVC_MODE EQU 0x13
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IRQ_MODE EQU 0x12
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SECTION .text:CODE:ROOT(2)
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ARM
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INCLUDE portASM.h
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; SVC handler is used to yield a task.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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FreeRTOS_SWI_Handler
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PRESERVE8
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; Save the context of the current task and select a new task to run.
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portSAVE_CONTEXT
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LDR R0, =vTaskSwitchContext
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BLX R0
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portRESTORE_CONTEXT
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; vPortRestoreTaskContext is used to start the scheduler.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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vPortRestoreTaskContext
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; Switch to system mode
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CPS #SYS_MODE
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portRESTORE_CONTEXT
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; PL390 GIC interrupt handler
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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FreeRTOS_IRQ_Handler
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; Return to the interrupted instruction.
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SUB lr, lr, #4
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; Push the return address and SPSR
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PUSH {lr}
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MRS lr, SPSR
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PUSH {lr}
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; Change to supervisor mode to allow reentry.
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CPS #SVC_MODE
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; Push used registers.
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PUSH {r0-r4, r12}
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; Increment nesting count. r3 holds the address of ulPortInterruptNesting
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; for future use. r1 holds the original ulPortInterruptNesting value for
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; future use.
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LDR r3, =ulPortInterruptNesting
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LDR r1, [r3]
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ADD r4, r1, #1
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STR r4, [r3]
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; Read value from the interrupt acknowledge register, which is stored in r0
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; for future parameter and interrupt clearing use.
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LDR r2, =portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS
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LDR r0, [r2]
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; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
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; future use. _RB_ Is this ever necessary if start of stack is 8-byte aligned?
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MOV r2, sp
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AND r2, r2, #4
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SUB sp, sp, r2
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; Call the interrupt handler. r4 is pushed to maintain alignment.
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PUSH {r0-r4, lr}
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LDR r1, =vApplicationIRQHandler
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BLX r1
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POP {r0-r4, lr}
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ADD sp, sp, r2
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CPSID i
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; Write the value read from ICCIAR to ICCEOIR
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LDR r4, =portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS
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STR r0, [r4]
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; Restore the old nesting count
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STR r1, [r3]
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; A context switch is never performed if the nesting count is not 0
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CMP r1, #0
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BNE exit_without_switch
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; Did the interrupt request a context switch? r1 holds the address of
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; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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; use.
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LDR r1, =ulPortYieldRequired
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LDR r0, [r1]
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CMP r0, #0
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BNE switch_before_exit
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exit_without_switch
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; No context switch. Restore used registers, LR_irq and SPSR before
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; returning.
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POP {r0-r4, r12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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POP {LR}
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MOVS PC, LR
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switch_before_exit
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; A context switch is to be performed. Clear the context switch pending
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; flag.
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MOV r0, #0
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STR r0, [r1]
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; Restore used registers, LR-irq and SPSR before saving the context
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; to the task stack.
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POP {r0-r4, r12}
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CPS #IRQ_MODE
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POP {LR}
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MSR SPSR_cxsf, LR
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POP {LR}
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portSAVE_CONTEXT
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; Call the function that selects the new task to execute.
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; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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; instructions, or 8 byte aligned stack allocated data. LR does not need
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; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
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LDR r0, =vTaskSwitchContext
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BLX r0
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; Restore the context of, and branch to, the task selected to execute next.
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portRESTORE_CONTEXT
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END
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