mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Normalize line endings and whitespace in source files
This commit is contained in:
Paul Bartell
Paul Bartell
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
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@ -1,128 +1,128 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
|
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
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* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
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||||
*
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||||
* The above copyright notice and this permission notice shall be included in all
|
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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.extern ulTopOfSystemStack
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.extern ulInterruptNesting
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/*-----------------------------------------------------------*/
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.macro portFREERTOS_INTERRUPT_ENTRY
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/* Save general purpose registers. */
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pusha
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/* If ulInterruptNesting is zero the rest of the task context will need
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saving and a stack switch might be required. */
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movl ulInterruptNesting, %eax
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test %eax, %eax
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jne 2f
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/* Interrupts are not nested, so save the rest of the task context. */
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.if configSUPPORT_FPU == 1
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/* If the task has a buffer allocated to save the FPU context then
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save the FPU context now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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fnsave ( %eax ) /* Save FLOP context into ucTempFPUBuffer array. */
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fwait
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1:
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/* Save the address of the FPU context, if any. */
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push pucPortTaskFPUContextBuffer
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.endif /* configSUPPORT_FPU */
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/* Find the TCB. */
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movl pxCurrentTCB, %eax
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/* Stack location is first item in the TCB. */
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movl %esp, (%eax)
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/* Switch stacks. */
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movl ulTopOfSystemStack, %esp
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movl %esp, %ebp
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2:
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/* Increment nesting count. */
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add $1, ulInterruptNesting
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.endm
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/*-----------------------------------------------------------*/
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.macro portINTERRUPT_EPILOGUE
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cli
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sub $1, ulInterruptNesting
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/* If the nesting has unwound to zero. */
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movl ulInterruptNesting, %eax
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test %eax, %eax
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jne 2f
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/* If a yield was requested then select a new TCB now. */
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movl ulPortYieldPending, %eax
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test %eax, %eax
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je 1f
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movl $0, ulPortYieldPending
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call vTaskSwitchContext
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1:
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/* Stack location is first item in the TCB. */
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movl pxCurrentTCB, %eax
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movl (%eax), %esp
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.if configSUPPORT_FPU == 1
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/* Restore address of task's FPU context buffer. */
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pop pucPortTaskFPUContextBuffer
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/* If the task has a buffer allocated in which its FPU context is saved,
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then restore it now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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frstor ( %eax )
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1:
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.endif
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2:
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popa
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.endm
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/*-----------------------------------------------------------*/
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.macro portFREERTOS_INTERRUPT_EXIT
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portINTERRUPT_EPILOGUE
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/* EOI. */
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movl $0x00, (0xFEE000B0)
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iret
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.endm
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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.extern ulTopOfSystemStack
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.extern ulInterruptNesting
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/*-----------------------------------------------------------*/
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.macro portFREERTOS_INTERRUPT_ENTRY
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/* Save general purpose registers. */
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pusha
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/* If ulInterruptNesting is zero the rest of the task context will need
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saving and a stack switch might be required. */
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movl ulInterruptNesting, %eax
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test %eax, %eax
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jne 2f
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/* Interrupts are not nested, so save the rest of the task context. */
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.if configSUPPORT_FPU == 1
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/* If the task has a buffer allocated to save the FPU context then
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save the FPU context now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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fnsave ( %eax ) /* Save FLOP context into ucTempFPUBuffer array. */
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fwait
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1:
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/* Save the address of the FPU context, if any. */
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push pucPortTaskFPUContextBuffer
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.endif /* configSUPPORT_FPU */
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/* Find the TCB. */
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movl pxCurrentTCB, %eax
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/* Stack location is first item in the TCB. */
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movl %esp, (%eax)
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/* Switch stacks. */
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movl ulTopOfSystemStack, %esp
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movl %esp, %ebp
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2:
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/* Increment nesting count. */
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add $1, ulInterruptNesting
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.endm
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/*-----------------------------------------------------------*/
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.macro portINTERRUPT_EPILOGUE
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cli
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sub $1, ulInterruptNesting
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/* If the nesting has unwound to zero. */
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movl ulInterruptNesting, %eax
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test %eax, %eax
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jne 2f
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/* If a yield was requested then select a new TCB now. */
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movl ulPortYieldPending, %eax
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test %eax, %eax
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je 1f
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movl $0, ulPortYieldPending
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call vTaskSwitchContext
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1:
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/* Stack location is first item in the TCB. */
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movl pxCurrentTCB, %eax
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movl (%eax), %esp
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.if configSUPPORT_FPU == 1
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/* Restore address of task's FPU context buffer. */
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pop pucPortTaskFPUContextBuffer
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/* If the task has a buffer allocated in which its FPU context is saved,
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then restore it now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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frstor ( %eax )
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1:
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.endif
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2:
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popa
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.endm
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/*-----------------------------------------------------------*/
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.macro portFREERTOS_INTERRUPT_EXIT
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portINTERRUPT_EPILOGUE
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/* EOI. */
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movl $0x00, (0xFEE000B0)
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iret
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.endm
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File diff suppressed because it is too large
Load diff
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@ -1,275 +1,268 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
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* this software and associated documentation files (the "Software"), to deal in
|
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* the Software without restriction, including without limitation the rights to
|
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
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* the Software, and to permit persons to whom the Software is furnished to do so,
|
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
|
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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.file "portASM.S"
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#include "FreeRTOSConfig.h"
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#include "ISR_Support.h"
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vPortCentralInterruptHandler
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.extern xTaskIncrementTick
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.extern vPortAPICErrorHandler
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.extern pucPortTaskFPUContextBuffer
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.extern ulPortYieldPending
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.global vPortStartFirstTask
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.global vPortCentralInterruptWrapper
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.global vPortAPICErrorHandlerWrapper
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.global vPortTimerHandler
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.global vPortYieldCall
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.global vPortAPICSpuriousHandler
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.text
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/*-----------------------------------------------------------*/
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.align 4
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.func vPortYieldCall
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vPortYieldCall:
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/* Save general purpose registers. */
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pusha
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.if configSUPPORT_FPU == 1
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/* If the task has a buffer allocated to save the FPU context then save
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the FPU context now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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fnsave ( %eax )
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fwait
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1:
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/* Save the address of the FPU context, if any. */
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push pucPortTaskFPUContextBuffer
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.endif /* configSUPPORT_FPU */
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/* Find the TCB. */
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movl pxCurrentTCB, %eax
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/* Stack location is first item in the TCB. */
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movl %esp, (%eax)
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call vTaskSwitchContext
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/* Find the location of pxCurrentTCB again - a callee saved register could
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be used in place of eax to prevent this second load, but that then relies
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on the compiler and other asm code. */
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movl pxCurrentTCB, %eax
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movl (%eax), %esp
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.if configSUPPORT_FPU == 1
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/* Restore address of task's FPU context buffer. */
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pop pucPortTaskFPUContextBuffer
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/* If the task has a buffer allocated in which its FPU context is saved,
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then restore it now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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frstor ( %eax )
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1:
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.endif
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popa
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iret
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.endfunc
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/*-----------------------------------------------------------*/
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.align 4
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.func vPortStartFirstTask
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vPortStartFirstTask:
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/* Find the TCB. */
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movl pxCurrentTCB, %eax
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/* Stack location is first item in the TCB. */
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movl (%eax), %esp
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/* Restore FPU context flag. */
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.if configSUPPORT_FPU == 1
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pop pucPortTaskFPUContextBuffer
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.endif /* configSUPPORT_FPU */
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/* Restore general purpose registers. */
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popa
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iret
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.endfunc
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/*-----------------------------------------------------------*/
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.align 4
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.func vPortAPICErrorHandlerWrapper
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vPortAPICErrorHandlerWrapper:
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pusha
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call vPortAPICErrorHandler
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popa
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/* EOI. */
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movl $0x00, (0xFEE000B0)
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iret
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.endfunc
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/*-----------------------------------------------------------*/
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.align 4
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.func vPortTimerHandler
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vPortTimerHandler:
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/* Save general purpose registers. */
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pusha
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/* Interrupts are not nested, so save the rest of the task context. */
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.if configSUPPORT_FPU == 1
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/* If the task has a buffer allocated to save the FPU context then save the
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FPU context now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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fnsave ( %eax ) /* Save FLOP context into ucTempFPUBuffer array. */
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fwait
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1:
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/* Save the address of the FPU context, if any. */
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push pucPortTaskFPUContextBuffer
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.endif /* configSUPPORT_FPU */
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/* Find the TCB. */
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movl pxCurrentTCB, %eax
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/* Stack location is first item in the TCB. */
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movl %esp, (%eax)
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/* Switch stacks. */
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movl ulTopOfSystemStack, %esp
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movl %esp, %ebp
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/* Increment nesting count. */
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add $1, ulInterruptNesting
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call xTaskIncrementTick
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sti
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/* Is a switch to another task required? */
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test %eax, %eax
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je _skip_context_switch
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cli
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call vTaskSwitchContext
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_skip_context_switch:
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cli
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/* Decrement the variable used to determine if a switch to a system
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stack is necessary. */
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sub $1, ulInterruptNesting
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/* Stack location is first item in the TCB. */
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movl pxCurrentTCB, %eax
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movl (%eax), %esp
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.if configSUPPORT_FPU == 1
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/* Restore address of task's FPU context buffer. */
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pop pucPortTaskFPUContextBuffer
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/* If the task has a buffer allocated in which its FPU context is saved,
|
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then restore it now. */
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movl pucPortTaskFPUContextBuffer, %eax
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test %eax, %eax
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je 1f
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frstor ( %eax )
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1:
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.endif
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popa
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/* EOI. */
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movl $0x00, (0xFEE000B0)
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iret
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.endfunc
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/*-----------------------------------------------------------*/
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.if configUSE_COMMON_INTERRUPT_ENTRY_POINT == 1
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.align 4
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.func vPortCentralInterruptWrapper
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vPortCentralInterruptWrapper:
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portFREERTOS_INTERRUPT_ENTRY
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movl $0xFEE00170, %eax /* Highest In Service Register (ISR) long word. */
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movl $8, %ecx /* Loop counter. */
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|
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next_isr_long_word:
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test %ecx, %ecx /* Loop counter reached 0? */
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je wrapper_epilogue /* Looked at all ISR registers without finding a bit set. */
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sub $1, %ecx /* Sub 1 from loop counter. */
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movl (%eax), %ebx /* Load next ISR long word. */
|
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sub $0x10, %eax /* Point to next ISR long word in case no bits are set in the current long word. */
|
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test %ebx, %ebx /* Are there any bits set? */
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je next_isr_long_word /* Look at next ISR long word if no bits were set. */
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sti
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bsr %ebx, %ebx /* A bit was set, which one? */
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movl $32, %eax /* Destination operand for following multiplication. */
|
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mul %ecx /* Calculate base vector for current register, 32 vectors per register. */
|
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add %ebx, %eax /* Add bit offset into register to get final vector number. */
|
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push %eax /* Vector number is function parameter. */
|
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call vPortCentralInterruptHandler
|
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pop %eax /* Remove parameter. */
|
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|
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wrapper_epilogue:
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portFREERTOS_INTERRUPT_EXIT
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|
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.endfunc
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|
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.endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */
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/*-----------------------------------------------------------*/
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|
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.align 4
|
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.func vPortAPISpuriousHandler
|
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vPortAPICSpuriousHandler:
|
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iret
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|
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.endfunc
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|
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.end
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||||
|
||||
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
.file "portASM.S"
|
||||
#include "FreeRTOSConfig.h"
|
||||
#include "ISR_Support.h"
|
||||
|
||||
.extern pxCurrentTCB
|
||||
.extern vTaskSwitchContext
|
||||
.extern vPortCentralInterruptHandler
|
||||
.extern xTaskIncrementTick
|
||||
.extern vPortAPICErrorHandler
|
||||
.extern pucPortTaskFPUContextBuffer
|
||||
.extern ulPortYieldPending
|
||||
|
||||
.global vPortStartFirstTask
|
||||
.global vPortCentralInterruptWrapper
|
||||
.global vPortAPICErrorHandlerWrapper
|
||||
.global vPortTimerHandler
|
||||
.global vPortYieldCall
|
||||
.global vPortAPICSpuriousHandler
|
||||
|
||||
.text
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
.func vPortYieldCall
|
||||
vPortYieldCall:
|
||||
/* Save general purpose registers. */
|
||||
pusha
|
||||
|
||||
.if configSUPPORT_FPU == 1
|
||||
|
||||
/* If the task has a buffer allocated to save the FPU context then save
|
||||
the FPU context now. */
|
||||
movl pucPortTaskFPUContextBuffer, %eax
|
||||
test %eax, %eax
|
||||
je 1f
|
||||
fnsave ( %eax )
|
||||
fwait
|
||||
|
||||
1:
|
||||
|
||||
/* Save the address of the FPU context, if any. */
|
||||
push pucPortTaskFPUContextBuffer
|
||||
|
||||
.endif /* configSUPPORT_FPU */
|
||||
|
||||
/* Find the TCB. */
|
||||
movl pxCurrentTCB, %eax
|
||||
|
||||
/* Stack location is first item in the TCB. */
|
||||
movl %esp, (%eax)
|
||||
|
||||
call vTaskSwitchContext
|
||||
|
||||
/* Find the location of pxCurrentTCB again - a callee saved register could
|
||||
be used in place of eax to prevent this second load, but that then relies
|
||||
on the compiler and other asm code. */
|
||||
movl pxCurrentTCB, %eax
|
||||
movl (%eax), %esp
|
||||
|
||||
.if configSUPPORT_FPU == 1
|
||||
|
||||
/* Restore address of task's FPU context buffer. */
|
||||
pop pucPortTaskFPUContextBuffer
|
||||
|
||||
/* If the task has a buffer allocated in which its FPU context is saved,
|
||||
then restore it now. */
|
||||
movl pucPortTaskFPUContextBuffer, %eax
|
||||
test %eax, %eax
|
||||
je 1f
|
||||
frstor ( %eax )
|
||||
1:
|
||||
.endif
|
||||
|
||||
popa
|
||||
iret
|
||||
|
||||
.endfunc
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
.func vPortStartFirstTask
|
||||
vPortStartFirstTask:
|
||||
|
||||
/* Find the TCB. */
|
||||
movl pxCurrentTCB, %eax
|
||||
|
||||
/* Stack location is first item in the TCB. */
|
||||
movl (%eax), %esp
|
||||
|
||||
/* Restore FPU context flag. */
|
||||
.if configSUPPORT_FPU == 1
|
||||
|
||||
pop pucPortTaskFPUContextBuffer
|
||||
|
||||
.endif /* configSUPPORT_FPU */
|
||||
|
||||
/* Restore general purpose registers. */
|
||||
popa
|
||||
iret
|
||||
.endfunc
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
.func vPortAPICErrorHandlerWrapper
|
||||
vPortAPICErrorHandlerWrapper:
|
||||
pusha
|
||||
call vPortAPICErrorHandler
|
||||
popa
|
||||
/* EOI. */
|
||||
movl $0x00, (0xFEE000B0)
|
||||
iret
|
||||
.endfunc
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
.func vPortTimerHandler
|
||||
vPortTimerHandler:
|
||||
|
||||
/* Save general purpose registers. */
|
||||
pusha
|
||||
|
||||
/* Interrupts are not nested, so save the rest of the task context. */
|
||||
.if configSUPPORT_FPU == 1
|
||||
|
||||
/* If the task has a buffer allocated to save the FPU context then save the
|
||||
FPU context now. */
|
||||
movl pucPortTaskFPUContextBuffer, %eax
|
||||
test %eax, %eax
|
||||
je 1f
|
||||
fnsave ( %eax ) /* Save FLOP context into ucTempFPUBuffer array. */
|
||||
fwait
|
||||
|
||||
1:
|
||||
/* Save the address of the FPU context, if any. */
|
||||
push pucPortTaskFPUContextBuffer
|
||||
|
||||
.endif /* configSUPPORT_FPU */
|
||||
|
||||
/* Find the TCB. */
|
||||
movl pxCurrentTCB, %eax
|
||||
|
||||
/* Stack location is first item in the TCB. */
|
||||
movl %esp, (%eax)
|
||||
|
||||
/* Switch stacks. */
|
||||
movl ulTopOfSystemStack, %esp
|
||||
movl %esp, %ebp
|
||||
|
||||
/* Increment nesting count. */
|
||||
add $1, ulInterruptNesting
|
||||
|
||||
call xTaskIncrementTick
|
||||
|
||||
sti
|
||||
|
||||
/* Is a switch to another task required? */
|
||||
test %eax, %eax
|
||||
je _skip_context_switch
|
||||
cli
|
||||
call vTaskSwitchContext
|
||||
|
||||
_skip_context_switch:
|
||||
cli
|
||||
|
||||
/* Decrement the variable used to determine if a switch to a system
|
||||
stack is necessary. */
|
||||
sub $1, ulInterruptNesting
|
||||
|
||||
/* Stack location is first item in the TCB. */
|
||||
movl pxCurrentTCB, %eax
|
||||
movl (%eax), %esp
|
||||
|
||||
.if configSUPPORT_FPU == 1
|
||||
|
||||
/* Restore address of task's FPU context buffer. */
|
||||
pop pucPortTaskFPUContextBuffer
|
||||
|
||||
/* If the task has a buffer allocated in which its FPU context is saved,
|
||||
then restore it now. */
|
||||
movl pucPortTaskFPUContextBuffer, %eax
|
||||
test %eax, %eax
|
||||
je 1f
|
||||
frstor ( %eax )
|
||||
1:
|
||||
.endif
|
||||
|
||||
popa
|
||||
|
||||
/* EOI. */
|
||||
movl $0x00, (0xFEE000B0)
|
||||
iret
|
||||
|
||||
.endfunc
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.if configUSE_COMMON_INTERRUPT_ENTRY_POINT == 1
|
||||
|
||||
.align 4
|
||||
.func vPortCentralInterruptWrapper
|
||||
vPortCentralInterruptWrapper:
|
||||
|
||||
portFREERTOS_INTERRUPT_ENTRY
|
||||
|
||||
movl $0xFEE00170, %eax /* Highest In Service Register (ISR) long word. */
|
||||
movl $8, %ecx /* Loop counter. */
|
||||
|
||||
next_isr_long_word:
|
||||
test %ecx, %ecx /* Loop counter reached 0? */
|
||||
je wrapper_epilogue /* Looked at all ISR registers without finding a bit set. */
|
||||
sub $1, %ecx /* Sub 1 from loop counter. */
|
||||
movl (%eax), %ebx /* Load next ISR long word. */
|
||||
sub $0x10, %eax /* Point to next ISR long word in case no bits are set in the current long word. */
|
||||
test %ebx, %ebx /* Are there any bits set? */
|
||||
je next_isr_long_word /* Look at next ISR long word if no bits were set. */
|
||||
sti
|
||||
bsr %ebx, %ebx /* A bit was set, which one? */
|
||||
movl $32, %eax /* Destination operand for following multiplication. */
|
||||
mul %ecx /* Calculate base vector for current register, 32 vectors per register. */
|
||||
add %ebx, %eax /* Add bit offset into register to get final vector number. */
|
||||
push %eax /* Vector number is function parameter. */
|
||||
call vPortCentralInterruptHandler
|
||||
pop %eax /* Remove parameter. */
|
||||
|
||||
wrapper_epilogue:
|
||||
portFREERTOS_INTERRUPT_EXIT
|
||||
|
||||
.endfunc
|
||||
|
||||
.endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
.func vPortAPISpuriousHandler
|
||||
vPortAPICSpuriousHandler:
|
||||
iret
|
||||
|
||||
.endfunc
|
||||
|
||||
.end
|
||||
|
|
|
|||
|
|
@ -1,292 +1,291 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( ( TickType_t ) 0xffffffffUL )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 32
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/* The interrupt priority (for vectors 16 to 255) is determined using vector/16.
|
||||
The quotient is rounded to the nearest integer with 1 being the lowest priority
|
||||
and 15 is the highest. Therefore the following two interrupts are at the lowest
|
||||
priority. *NOTE 1* If the yield vector is changed then it must also be changed
|
||||
in the portYIELD_INTERRUPT definition immediately below. */
|
||||
#define portAPIC_TIMER_INT_VECTOR ( 0x21 )
|
||||
#define portAPIC_YIELD_INT_VECTOR ( 0x20 )
|
||||
|
||||
/* Build yield interrupt instruction. */
|
||||
#define portYIELD_INTERRUPT "int $0x20"
|
||||
|
||||
/* APIC register addresses. */
|
||||
#define portAPIC_EOI ( *( ( volatile uint32_t * ) 0xFEE000B0UL ) )
|
||||
|
||||
/* APIC bit definitions. */
|
||||
#define portAPIC_ENABLE_BIT ( 1UL << 8UL )
|
||||
#define portAPIC_TIMER_PERIODIC ( 1UL << 17UL )
|
||||
#define portAPIC_DISABLE ( 1UL << 16UL )
|
||||
#define portAPIC_NMI ( 4 << 8)
|
||||
#define portAPIC_DIV_16 ( 0x03 )
|
||||
|
||||
/* Define local API register addresses. */
|
||||
#define portAPIC_ID_REGISTER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x20UL ) ) )
|
||||
#define portAPIC_SPURIOUS_INT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xF0UL ) ) )
|
||||
#define portAPIC_LVT_TIMER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x320UL ) ) )
|
||||
#define portAPIC_TIMER_INITIAL_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x380UL ) ) )
|
||||
#define portAPIC_TIMER_CURRENT_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x390UL ) ) )
|
||||
#define portAPIC_TASK_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x80UL ) ) )
|
||||
#define portAPIC_LVT_ERROR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x370UL ) ) )
|
||||
#define portAPIC_ERROR_STATUS ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x280UL ) ) )
|
||||
#define portAPIC_LDR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xD0UL ) ) )
|
||||
#define portAPIC_TMRDIV ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x3E0UL ) ) )
|
||||
#define portAPIC_LVT_PERF ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x340UL ) ) )
|
||||
#define portAPIC_LVT_LINT0 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x350UL ) ) )
|
||||
#define portAPIC_LVT_LINT1 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x360UL ) ) )
|
||||
|
||||
/* Don't yield if inside a critical section - instead hold the yield pending
|
||||
so it is performed when the critical section is exited. */
|
||||
#define portYIELD() \
|
||||
{ \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
extern volatile uint32_t ulPortYieldPending; \
|
||||
if( ulCriticalNesting != 0 ) \
|
||||
{ \
|
||||
ulPortYieldPending = pdTRUE; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
__asm volatile( portYIELD_INTERRUPT ); \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Called at the end of an ISR that can cause a context switch - pend a yield if
|
||||
xSwithcRequired is not false. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern volatile uint32_t ulPortYieldPending; \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
ulPortYieldPending = 1; \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Same as portEND_SWITCHING_ISR() - take your pick which name to use. */
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Critical section control
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Critical sections for use in interrupts. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
||||
|
||||
/* These macros do not globally disable/enable interrupts. They do mask off
|
||||
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile( "cli" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile( "sti" )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not required for this port but included in case common demo code that uses these
|
||||
macros is used. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) \
|
||||
__asm volatile( "bsr %1, %0\n\t" \
|
||||
:"=r"(uxTopPriority) : "rm"(uxReadyPriorities) : "cc" )
|
||||
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
#define portNOP() __asm volatile( "NOP" )
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Misc
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define portNUM_VECTORS 256
|
||||
#define portMAX_PRIORITY 15
|
||||
typedef void ( *ISR_Handler_t ) ( void );
|
||||
|
||||
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||
before any floating point instructions are executed. */
|
||||
#ifndef configSUPPORT_FPU
|
||||
#define configSUPPORT_FPU 0
|
||||
#endif
|
||||
|
||||
#if configSUPPORT_FPU == 1
|
||||
void vPortTaskUsesFPU( void );
|
||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||
#endif
|
||||
|
||||
/* See the comments under the configUSE_COMMON_INTERRUPT_ENTRY_POINT definition
|
||||
below. */
|
||||
BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
|
||||
BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
|
||||
|
||||
#ifndef configAPIC_BASE
|
||||
/* configAPIC_BASE_ADDRESS sets the base address of the local APIC. It can
|
||||
be overridden in FreeRTOSConfig.h should it not be constant. */
|
||||
#define configAPIC_BASE 0xFEE00000UL
|
||||
#endif
|
||||
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
/* The FreeRTOS scheduling algorithm selects the task that will enter the
|
||||
Running state. configUSE_PORT_OPTIMISED_TASK_SELECTION is used to set how
|
||||
that is done.
|
||||
|
||||
If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 0 then the task to
|
||||
enter the Running state is selected using a portable algorithm written in
|
||||
C. This is the slowest method, but the algorithm does not restrict the
|
||||
maximum number of unique RTOS task priorities that are available.
|
||||
|
||||
If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 then the task to
|
||||
enter the Running state is selected using a single assembly instruction.
|
||||
This is the fastest method, but restricts the maximum number of unique RTOS
|
||||
task priorities to 32 (the same task priority can be assigned to any number
|
||||
of RTOS tasks). */
|
||||
#warning configUSE_PORT_OPTIMISED_TASK_SELECTION was not defined in FreeRTOSConfig.h and has been defaulted to 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
#ifndef configUSE_COMMON_INTERRUPT_ENTRY_POINT
|
||||
/* There are two ways of implementing interrupt handlers:
|
||||
|
||||
1) As standard C functions -
|
||||
|
||||
This method can only be used if configUSE_COMMON_INTERRUPT_ENTRY_POINT
|
||||
is set to 1. The C function is installed using
|
||||
xPortRegisterCInterruptHandler().
|
||||
|
||||
This is the simplest of the two methods but incurs a slightly longer
|
||||
interrupt entry time.
|
||||
|
||||
2) By using an assembly stub that wraps the handler in the FreeRTOS
|
||||
portFREERTOS_INTERRUPT_ENTRY and portFREERTOS_INTERRUPT_EXIT macros.
|
||||
|
||||
This method can always be used. It is slightly more complex than
|
||||
method 1 but benefits from a faster interrupt entry time. */
|
||||
#warning configUSE_COMMON_INTERRUPT_ENTRY_POINT was not defined in FreeRTOSConfig.h and has been defaulted to 1.
|
||||
#define configUSE_COMMON_INTERRUPT_ENTRY_POINT 1
|
||||
#endif
|
||||
|
||||
#ifndef configISR_STACK_SIZE
|
||||
/* Interrupt entry code will switch the stack in use to a dedicated system
|
||||
stack.
|
||||
|
||||
configISR_STACK_SIZE defines the number of 32-bit values that can be stored
|
||||
on the system stack, and must be large enough to hold a potentially nested
|
||||
interrupt stack frame. */
|
||||
|
||||
#error configISR_STACK_SIZE was not defined in FreeRTOSConfig.h.
|
||||
#endif
|
||||
|
||||
#ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
|
||||
/* Interrupt safe FreeRTOS functions (those that end in "FromISR" must not
|
||||
be called from an interrupt that has a priority above that set by
|
||||
configMAX_API_CALL_INTERRUPT_PRIORITY. */
|
||||
#warning configMAX_API_CALL_INTERRUPT_PRIORITY was not defined in FreeRTOSConfig.h and has been defaulted to 10
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 10
|
||||
#endif
|
||||
|
||||
#ifndef configSUPPORT_FPU
|
||||
#warning configSUPPORT_FPU was not defined in FreeRTOSConfig.h and has been defaulted to 0
|
||||
#define configSUPPORT_FPU 0
|
||||
#endif
|
||||
|
||||
/* The value written to the task priority register to raise the interrupt mask
|
||||
to the maximum from which FreeRTOS API calls can be made. */
|
||||
#define portAPIC_PRIORITY_SHIFT ( 4UL )
|
||||
#define portAPIC_MAX_SUB_PRIORITY ( 0x0fUL )
|
||||
#define portMAX_API_CALL_PRIORITY ( ( configMAX_API_CALL_INTERRUPT_PRIORITY << portAPIC_PRIORITY_SHIFT ) | portAPIC_MAX_SUB_PRIORITY )
|
||||
|
||||
/* Asserts if interrupt safe FreeRTOS functions are called from a priority
|
||||
above the max system call interrupt priority. */
|
||||
#define portAPIC_PROCESSOR_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xA0UL ) ) )
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( portAPIC_PROCESSOR_PRIORITY ) <= ( portMAX_API_CALL_PRIORITY ) )
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern C */
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( ( TickType_t ) 0xffffffffUL )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 32
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/* The interrupt priority (for vectors 16 to 255) is determined using vector/16.
|
||||
The quotient is rounded to the nearest integer with 1 being the lowest priority
|
||||
and 15 is the highest. Therefore the following two interrupts are at the lowest
|
||||
priority. *NOTE 1* If the yield vector is changed then it must also be changed
|
||||
in the portYIELD_INTERRUPT definition immediately below. */
|
||||
#define portAPIC_TIMER_INT_VECTOR ( 0x21 )
|
||||
#define portAPIC_YIELD_INT_VECTOR ( 0x20 )
|
||||
|
||||
/* Build yield interrupt instruction. */
|
||||
#define portYIELD_INTERRUPT "int $0x20"
|
||||
|
||||
/* APIC register addresses. */
|
||||
#define portAPIC_EOI ( *( ( volatile uint32_t * ) 0xFEE000B0UL ) )
|
||||
|
||||
/* APIC bit definitions. */
|
||||
#define portAPIC_ENABLE_BIT ( 1UL << 8UL )
|
||||
#define portAPIC_TIMER_PERIODIC ( 1UL << 17UL )
|
||||
#define portAPIC_DISABLE ( 1UL << 16UL )
|
||||
#define portAPIC_NMI ( 4 << 8)
|
||||
#define portAPIC_DIV_16 ( 0x03 )
|
||||
|
||||
/* Define local API register addresses. */
|
||||
#define portAPIC_ID_REGISTER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x20UL ) ) )
|
||||
#define portAPIC_SPURIOUS_INT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xF0UL ) ) )
|
||||
#define portAPIC_LVT_TIMER ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x320UL ) ) )
|
||||
#define portAPIC_TIMER_INITIAL_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x380UL ) ) )
|
||||
#define portAPIC_TIMER_CURRENT_COUNT ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x390UL ) ) )
|
||||
#define portAPIC_TASK_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x80UL ) ) )
|
||||
#define portAPIC_LVT_ERROR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x370UL ) ) )
|
||||
#define portAPIC_ERROR_STATUS ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x280UL ) ) )
|
||||
#define portAPIC_LDR ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xD0UL ) ) )
|
||||
#define portAPIC_TMRDIV ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x3E0UL ) ) )
|
||||
#define portAPIC_LVT_PERF ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x340UL ) ) )
|
||||
#define portAPIC_LVT_LINT0 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x350UL ) ) )
|
||||
#define portAPIC_LVT_LINT1 ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0x360UL ) ) )
|
||||
|
||||
/* Don't yield if inside a critical section - instead hold the yield pending
|
||||
so it is performed when the critical section is exited. */
|
||||
#define portYIELD() \
|
||||
{ \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
extern volatile uint32_t ulPortYieldPending; \
|
||||
if( ulCriticalNesting != 0 ) \
|
||||
{ \
|
||||
ulPortYieldPending = pdTRUE; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
__asm volatile( portYIELD_INTERRUPT ); \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Called at the end of an ISR that can cause a context switch - pend a yield if
|
||||
xSwithcRequired is not false. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern volatile uint32_t ulPortYieldPending; \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
ulPortYieldPending = 1; \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Same as portEND_SWITCHING_ISR() - take your pick which name to use. */
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Critical section control
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Critical sections for use in interrupts. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
||||
|
||||
/* These macros do not globally disable/enable interrupts. They do mask off
|
||||
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile( "cli" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile( "sti" )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not required for this port but included in case common demo code that uses these
|
||||
macros is used. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) \
|
||||
__asm volatile( "bsr %1, %0\n\t" \
|
||||
:"=r"(uxTopPriority) : "rm"(uxReadyPriorities) : "cc" )
|
||||
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
#define portNOP() __asm volatile( "NOP" )
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Misc
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define portNUM_VECTORS 256
|
||||
#define portMAX_PRIORITY 15
|
||||
typedef void ( *ISR_Handler_t ) ( void );
|
||||
|
||||
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||
before any floating point instructions are executed. */
|
||||
#ifndef configSUPPORT_FPU
|
||||
#define configSUPPORT_FPU 0
|
||||
#endif
|
||||
|
||||
#if configSUPPORT_FPU == 1
|
||||
void vPortTaskUsesFPU( void );
|
||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||
#endif
|
||||
|
||||
/* See the comments under the configUSE_COMMON_INTERRUPT_ENTRY_POINT definition
|
||||
below. */
|
||||
BaseType_t xPortRegisterCInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
|
||||
BaseType_t xPortInstallInterruptHandler( ISR_Handler_t pxHandler, uint32_t ulVectorNumber );
|
||||
|
||||
#ifndef configAPIC_BASE
|
||||
/* configAPIC_BASE_ADDRESS sets the base address of the local APIC. It can
|
||||
be overridden in FreeRTOSConfig.h should it not be constant. */
|
||||
#define configAPIC_BASE 0xFEE00000UL
|
||||
#endif
|
||||
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
/* The FreeRTOS scheduling algorithm selects the task that will enter the
|
||||
Running state. configUSE_PORT_OPTIMISED_TASK_SELECTION is used to set how
|
||||
that is done.
|
||||
|
||||
If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 0 then the task to
|
||||
enter the Running state is selected using a portable algorithm written in
|
||||
C. This is the slowest method, but the algorithm does not restrict the
|
||||
maximum number of unique RTOS task priorities that are available.
|
||||
|
||||
If configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 then the task to
|
||||
enter the Running state is selected using a single assembly instruction.
|
||||
This is the fastest method, but restricts the maximum number of unique RTOS
|
||||
task priorities to 32 (the same task priority can be assigned to any number
|
||||
of RTOS tasks). */
|
||||
#warning configUSE_PORT_OPTIMISED_TASK_SELECTION was not defined in FreeRTOSConfig.h and has been defaulted to 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
#ifndef configUSE_COMMON_INTERRUPT_ENTRY_POINT
|
||||
/* There are two ways of implementing interrupt handlers:
|
||||
|
||||
1) As standard C functions -
|
||||
|
||||
This method can only be used if configUSE_COMMON_INTERRUPT_ENTRY_POINT
|
||||
is set to 1. The C function is installed using
|
||||
xPortRegisterCInterruptHandler().
|
||||
|
||||
This is the simplest of the two methods but incurs a slightly longer
|
||||
interrupt entry time.
|
||||
|
||||
2) By using an assembly stub that wraps the handler in the FreeRTOS
|
||||
portFREERTOS_INTERRUPT_ENTRY and portFREERTOS_INTERRUPT_EXIT macros.
|
||||
|
||||
This method can always be used. It is slightly more complex than
|
||||
method 1 but benefits from a faster interrupt entry time. */
|
||||
#warning configUSE_COMMON_INTERRUPT_ENTRY_POINT was not defined in FreeRTOSConfig.h and has been defaulted to 1.
|
||||
#define configUSE_COMMON_INTERRUPT_ENTRY_POINT 1
|
||||
#endif
|
||||
|
||||
#ifndef configISR_STACK_SIZE
|
||||
/* Interrupt entry code will switch the stack in use to a dedicated system
|
||||
stack.
|
||||
|
||||
configISR_STACK_SIZE defines the number of 32-bit values that can be stored
|
||||
on the system stack, and must be large enough to hold a potentially nested
|
||||
interrupt stack frame. */
|
||||
|
||||
#error configISR_STACK_SIZE was not defined in FreeRTOSConfig.h.
|
||||
#endif
|
||||
|
||||
#ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
|
||||
/* Interrupt safe FreeRTOS functions (those that end in "FromISR" must not
|
||||
be called from an interrupt that has a priority above that set by
|
||||
configMAX_API_CALL_INTERRUPT_PRIORITY. */
|
||||
#warning configMAX_API_CALL_INTERRUPT_PRIORITY was not defined in FreeRTOSConfig.h and has been defaulted to 10
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 10
|
||||
#endif
|
||||
|
||||
#ifndef configSUPPORT_FPU
|
||||
#warning configSUPPORT_FPU was not defined in FreeRTOSConfig.h and has been defaulted to 0
|
||||
#define configSUPPORT_FPU 0
|
||||
#endif
|
||||
|
||||
/* The value written to the task priority register to raise the interrupt mask
|
||||
to the maximum from which FreeRTOS API calls can be made. */
|
||||
#define portAPIC_PRIORITY_SHIFT ( 4UL )
|
||||
#define portAPIC_MAX_SUB_PRIORITY ( 0x0fUL )
|
||||
#define portMAX_API_CALL_PRIORITY ( ( configMAX_API_CALL_INTERRUPT_PRIORITY << portAPIC_PRIORITY_SHIFT ) | portAPIC_MAX_SUB_PRIORITY )
|
||||
|
||||
/* Asserts if interrupt safe FreeRTOS functions are called from a priority
|
||||
above the max system call interrupt priority. */
|
||||
#define portAPIC_PROCESSOR_PRIORITY ( *( ( volatile uint32_t * ) ( configAPIC_BASE + 0xA0UL ) ) )
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( portAPIC_PROCESSOR_PRIORITY ) <= ( portMAX_API_CALL_PRIORITY ) )
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern C */
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue