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Normalize line endings and whitespace in source files
This commit is contained in:
Paul Bartell
Paul Bartell
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
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@ -1,464 +1,464 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT AND BSD-3-Clause
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief FreeRTOS port source for AVR32 UC3.
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*
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* - Compiler: GNU GCC for AVR32
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* - Supported devices: All AVR32 devices can be used.
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* - AppNote:
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*
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* \author Atmel Corporation (Now Microchip):
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* https://www.microchip.com \n
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* Support and FAQ: https://www.microchip.com/support/
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*
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*****************************************************************************/
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/*
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* Copyright (c) 2007, Atmel Corporation All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of ATMEL may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Standard includes. */
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#include <sys/cpu.h>
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#include <sys/usart.h>
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#include <malloc.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* AVR32 UC3 includes. */
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#include <avr32/io.h>
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#include "gpio.h"
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#if( configTICK_USE_TC==1 )
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#include "tc.h"
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#endif
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/* Constants required to setup the task context. */
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#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
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/* Each task maintains its own critical nesting variable. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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volatile uint32_t ulCriticalNesting = 9999UL;
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick( void );
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#else
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static void prvClearTcInt( void );
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#endif
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Low-level initialization routine called during startup, before the main
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* function.
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* This version comes in replacement to the default one provided by Newlib.
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* Newlib's _init_startup only calls init_exceptions, but Newlib's exception
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* vectors are not compatible with the SCALL management in the current FreeRTOS
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* port. More low-level initializations are besides added here.
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*/
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void _init_startup(void)
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{
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/* Import the Exception Vector Base Address. */
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extern void _evba;
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#if configHEAP_INIT
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extern void __heap_start__;
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extern void __heap_end__;
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BaseType_t *pxMem;
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#endif
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/* Load the Exception Vector Base Address in the corresponding system register. */
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Set_system_register( AVR32_EVBA, ( int ) &_evba );
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/* Enable exceptions. */
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ENABLE_ALL_EXCEPTIONS();
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/* Initialize interrupt handling. */
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INTC_init_interrupts();
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#if configHEAP_INIT
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/* Initialize the heap used by malloc. */
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for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
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{
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*pxMem++ = 0xA5A5A5A5;
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}
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#endif
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/* Give the used CPU clock frequency to Newlib, so it can work properly. */
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set_cpu_hz( configCPU_CLOCK_HZ );
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/* Code section present if and only if the debug trace is activated. */
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#if configDBG
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{
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static const gpio_map_t DBG_USART_GPIO_MAP =
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{
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{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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};
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/* Initialize the USART used for the debug trace with the configured parameters. */
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set_usart_base( ( void * ) configDBG_USART );
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gpio_enable_module( DBG_USART_GPIO_MAP,
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sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
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usart_init( configDBG_USART_BAUDRATE );
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}
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#endif
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}
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/*-----------------------------------------------------------*/
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/*
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* malloc, realloc and free are meant to be called through respectively
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* pvPortMalloc, pvPortRealloc and vPortFree.
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* The latter functions call the former ones from within sections where tasks
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* are suspended, so the latter functions are task-safe. __malloc_lock and
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* __malloc_unlock use the same mechanism to also keep the former functions
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* task-safe as they may be called directly from Newlib's functions.
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* However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
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* CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
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* not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
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* interrupts during memory allocation management as this may be a very time-
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* consuming process.
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*/
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/*
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* Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
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* safe section as memory allocation management uses global data.
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* See the aforementioned details.
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*/
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void __malloc_lock(struct _reent *ptr)
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{
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vTaskSuspendAll();
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}
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/*
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* Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
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* a safe section as memory allocation management uses global data.
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* See the aforementioned details.
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*/
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void __malloc_unlock(struct _reent *ptr)
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{
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xTaskResumeAll();
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}
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/*-----------------------------------------------------------*/
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/* Added as there is no such function in FreeRTOS. */
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void *pvPortRealloc( void *pv, size_t xWantedSize )
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{
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void *pvReturn;
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vTaskSuspendAll();
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{
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pvReturn = realloc( pv, xWantedSize );
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}
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xTaskResumeAll();
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return pvReturn;
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}
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/*-----------------------------------------------------------*/
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/* The cooperative scheduler requires a normal IRQ service routine to
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simply increment the system tick. */
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/* The preemptive scheduler is defined as "naked" as the full context is saved
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on entry as part of the context switch. */
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__attribute__((__naked__)) static void vTick( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_OS_INT();
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#if( configTICK_USE_TC==1 )
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/* Clear the interrupt flag. */
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prvClearTcInt();
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#else
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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prvScheduleNextTick();
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#endif
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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calls in a critical section . */
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portENTER_CRITICAL();
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xTaskIncrementTick();
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portEXIT_CRITICAL();
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/* Restore the context of the "elected task". */
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portRESTORE_CONTEXT_OS_INT();
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}
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/*-----------------------------------------------------------*/
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__attribute__((__naked__)) void SCALLYield( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_SCALL();
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vTaskSwitchContext();
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portRESTORE_CONTEXT_SCALL();
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}
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/*-----------------------------------------------------------*/
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/* The code generated by the GCC compiler uses the stack in different ways at
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different optimisation levels. The interrupt flags can therefore not always
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be saved to the stack. Instead the critical section nesting level is stored
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in a variable, which is then saved as part of the stack context. */
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__attribute__((__noinline__)) void vPortEnterCritical( void )
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{
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/* Disable interrupts */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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__attribute__((__noinline__)) void vPortExitCritical( void )
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{
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if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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{
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ulCriticalNesting--;
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Enable all interrupt/exception. */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* When the task starts, it will expect to find the function parameter in R12. */
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pxTopOfStack--;
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*pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
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*pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
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*pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
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*pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
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*pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
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*pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
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*pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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*pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
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*pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
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*pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
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*pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
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*pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
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*pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
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*pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
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*pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
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*pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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portRESTORE_CONTEXT();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the AVR32 port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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#if( configTICK_USE_TC==0 )
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static void prvScheduleFirstTick(void)
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{
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uint32_t lCycles;
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lCycles = Get_system_register(AVR32_COUNT);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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__attribute__((__noinline__)) static void prvScheduleNextTick(void)
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{
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uint32_t lCycles, lCount;
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lCycles = Get_system_register(AVR32_COMPARE);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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lCount = Get_system_register(AVR32_COUNT);
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if( lCycles < lCount )
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{ // We missed a tick, recover for the next.
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#else
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__attribute__((__noinline__)) static void prvClearTcInt(void)
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{
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AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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}
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#endif
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/*-----------------------------------------------------------*/
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt(void)
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{
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#if( configTICK_USE_TC==1 )
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volatile avr32_tc_t *tc = &AVR32_TC;
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// Options for waveform genration.
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tc_waveform_opt_t waveform_opt =
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{
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.channel = configTICK_TC_CHANNEL, /* Channel selection. */
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.bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
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.beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
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.bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
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.bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
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.aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
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.aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
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.acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
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.acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
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.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
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.enetrg = FALSE, /* External event trigger enable. */
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.eevt = 0, /* External event selection. */
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.eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
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.cpcdis = FALSE, /* Counter disable when RC compare. */
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.cpcstop = FALSE, /* Counter clock stopped with RC compare. */
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|
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.burst = FALSE, /* Burst signal selection. */
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.clki = FALSE, /* Clock inversion. */
|
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.tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
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};
|
||||
|
||||
tc_interrupt_t tc_interrupt =
|
||||
{
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.etrgs=0,
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.ldrbs=0,
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.ldras=0,
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.cpcs =1,
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.cpbs =0,
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.cpas =0,
|
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.lovrs=0,
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.covfs=0,
|
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};
|
||||
|
||||
#endif
|
||||
|
||||
/* Disable all interrupt/exception. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Register the compare interrupt handler to the interrupt controller and
|
||||
enable the compare interrupt. */
|
||||
|
||||
#if( configTICK_USE_TC==1 )
|
||||
{
|
||||
INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
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||||
|
||||
/* Initialize the timer/counter. */
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||||
tc_init_waveform(tc, &waveform_opt);
|
||||
|
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/* Set the compare triggers.
|
||||
Remember TC counter is 16-bits, so counting second is not possible!
|
||||
That's why we configure it to count ms. */
|
||||
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
|
||||
|
||||
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
|
||||
|
||||
/* Start the timer/counter. */
|
||||
tc_start(tc, configTICK_TC_CHANNEL);
|
||||
}
|
||||
#else
|
||||
{
|
||||
INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
|
||||
prvScheduleFirstTick();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT AND BSD-3-Clause
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief FreeRTOS port source for AVR32 UC3.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation (Now Microchip):
|
||||
* https://www.microchip.com \n
|
||||
* Support and FAQ: https://www.microchip.com/support/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2007, Atmel Corporation All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of ATMEL may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
|
||||
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <sys/cpu.h>
|
||||
#include <sys/usart.h>
|
||||
#include <malloc.h>
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* AVR32 UC3 includes. */
|
||||
#include <avr32/io.h>
|
||||
#include "gpio.h"
|
||||
#if( configTICK_USE_TC==1 )
|
||||
#include "tc.h"
|
||||
#endif
|
||||
|
||||
|
||||
/* Constants required to setup the task context. */
|
||||
#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
|
||||
|
||||
/* Each task maintains its own critical nesting variable. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||
|
||||
#if( configTICK_USE_TC==0 )
|
||||
static void prvScheduleNextTick( void );
|
||||
#else
|
||||
static void prvClearTcInt( void );
|
||||
#endif
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Low-level initialization routine called during startup, before the main
|
||||
* function.
|
||||
* This version comes in replacement to the default one provided by Newlib.
|
||||
* Newlib's _init_startup only calls init_exceptions, but Newlib's exception
|
||||
* vectors are not compatible with the SCALL management in the current FreeRTOS
|
||||
* port. More low-level initializations are besides added here.
|
||||
*/
|
||||
void _init_startup(void)
|
||||
{
|
||||
/* Import the Exception Vector Base Address. */
|
||||
extern void _evba;
|
||||
|
||||
#if configHEAP_INIT
|
||||
extern void __heap_start__;
|
||||
extern void __heap_end__;
|
||||
BaseType_t *pxMem;
|
||||
#endif
|
||||
|
||||
/* Load the Exception Vector Base Address in the corresponding system register. */
|
||||
Set_system_register( AVR32_EVBA, ( int ) &_evba );
|
||||
|
||||
/* Enable exceptions. */
|
||||
ENABLE_ALL_EXCEPTIONS();
|
||||
|
||||
/* Initialize interrupt handling. */
|
||||
INTC_init_interrupts();
|
||||
|
||||
#if configHEAP_INIT
|
||||
|
||||
/* Initialize the heap used by malloc. */
|
||||
for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
|
||||
{
|
||||
*pxMem++ = 0xA5A5A5A5;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* Give the used CPU clock frequency to Newlib, so it can work properly. */
|
||||
set_cpu_hz( configCPU_CLOCK_HZ );
|
||||
|
||||
/* Code section present if and only if the debug trace is activated. */
|
||||
#if configDBG
|
||||
{
|
||||
static const gpio_map_t DBG_USART_GPIO_MAP =
|
||||
{
|
||||
{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
|
||||
{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
|
||||
};
|
||||
|
||||
/* Initialize the USART used for the debug trace with the configured parameters. */
|
||||
set_usart_base( ( void * ) configDBG_USART );
|
||||
gpio_enable_module( DBG_USART_GPIO_MAP,
|
||||
sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
|
||||
usart_init( configDBG_USART_BAUDRATE );
|
||||
}
|
||||
#endif
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* malloc, realloc and free are meant to be called through respectively
|
||||
* pvPortMalloc, pvPortRealloc and vPortFree.
|
||||
* The latter functions call the former ones from within sections where tasks
|
||||
* are suspended, so the latter functions are task-safe. __malloc_lock and
|
||||
* __malloc_unlock use the same mechanism to also keep the former functions
|
||||
* task-safe as they may be called directly from Newlib's functions.
|
||||
* However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
|
||||
* CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
|
||||
* not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
|
||||
* interrupts during memory allocation management as this may be a very time-
|
||||
* consuming process.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
|
||||
* safe section as memory allocation management uses global data.
|
||||
* See the aforementioned details.
|
||||
*/
|
||||
void __malloc_lock(struct _reent *ptr)
|
||||
{
|
||||
vTaskSuspendAll();
|
||||
}
|
||||
|
||||
/*
|
||||
* Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
|
||||
* a safe section as memory allocation management uses global data.
|
||||
* See the aforementioned details.
|
||||
*/
|
||||
void __malloc_unlock(struct _reent *ptr)
|
||||
{
|
||||
xTaskResumeAll();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Added as there is no such function in FreeRTOS. */
|
||||
void *pvPortRealloc( void *pv, size_t xWantedSize )
|
||||
{
|
||||
void *pvReturn;
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
pvReturn = realloc( pv, xWantedSize );
|
||||
}
|
||||
xTaskResumeAll();
|
||||
|
||||
return pvReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
simply increment the system tick. */
|
||||
/* The preemptive scheduler is defined as "naked" as the full context is saved
|
||||
on entry as part of the context switch. */
|
||||
__attribute__((__naked__)) static void vTick( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT_OS_INT();
|
||||
|
||||
#if( configTICK_USE_TC==1 )
|
||||
/* Clear the interrupt flag. */
|
||||
prvClearTcInt();
|
||||
#else
|
||||
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
|
||||
clock cycles from now. */
|
||||
prvScheduleNextTick();
|
||||
#endif
|
||||
|
||||
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||
calls in a critical section . */
|
||||
portENTER_CRITICAL();
|
||||
xTaskIncrementTick();
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
/* Restore the context of the "elected task". */
|
||||
portRESTORE_CONTEXT_OS_INT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__attribute__((__naked__)) void SCALLYield( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT_SCALL();
|
||||
vTaskSwitchContext();
|
||||
portRESTORE_CONTEXT_SCALL();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The code generated by the GCC compiler uses the stack in different ways at
|
||||
different optimisation levels. The interrupt flags can therefore not always
|
||||
be saved to the stack. Instead the critical section nesting level is stored
|
||||
in a variable, which is then saved as part of the stack context. */
|
||||
__attribute__((__noinline__)) void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__attribute__((__noinline__)) void vPortExitCritical( void )
|
||||
{
|
||||
if(ulCriticalNesting > portNO_CRITICAL_NESTING)
|
||||
{
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable all interrupt/exception. */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
* portSAVE_CONTEXT had been called.
|
||||
*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* When the task starts, it will expect to find the function parameter in R12. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
|
||||
*pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
|
||||
*pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
|
||||
*pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
|
||||
*pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
|
||||
*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
|
||||
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task. */
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the AVR32 port will require this function as there
|
||||
is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
|
||||
clock cycles from now. */
|
||||
#if( configTICK_USE_TC==0 )
|
||||
static void prvScheduleFirstTick(void)
|
||||
{
|
||||
uint32_t lCycles;
|
||||
|
||||
lCycles = Get_system_register(AVR32_COUNT);
|
||||
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
|
||||
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
|
||||
// generation feature does not get disabled.
|
||||
if(0 == lCycles)
|
||||
{
|
||||
lCycles++;
|
||||
}
|
||||
Set_system_register(AVR32_COMPARE, lCycles);
|
||||
}
|
||||
|
||||
__attribute__((__noinline__)) static void prvScheduleNextTick(void)
|
||||
{
|
||||
uint32_t lCycles, lCount;
|
||||
|
||||
lCycles = Get_system_register(AVR32_COMPARE);
|
||||
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
|
||||
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
|
||||
// generation feature does not get disabled.
|
||||
if(0 == lCycles)
|
||||
{
|
||||
lCycles++;
|
||||
}
|
||||
lCount = Get_system_register(AVR32_COUNT);
|
||||
if( lCycles < lCount )
|
||||
{ // We missed a tick, recover for the next.
|
||||
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
|
||||
}
|
||||
Set_system_register(AVR32_COMPARE, lCycles);
|
||||
}
|
||||
#else
|
||||
__attribute__((__noinline__)) static void prvClearTcInt(void)
|
||||
{
|
||||
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
|
||||
}
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt(void)
|
||||
{
|
||||
#if( configTICK_USE_TC==1 )
|
||||
|
||||
volatile avr32_tc_t *tc = &AVR32_TC;
|
||||
|
||||
// Options for waveform genration.
|
||||
tc_waveform_opt_t waveform_opt =
|
||||
{
|
||||
.channel = configTICK_TC_CHANNEL, /* Channel selection. */
|
||||
|
||||
.bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
|
||||
.beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
|
||||
.bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
|
||||
.bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
|
||||
|
||||
.aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
|
||||
.aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
|
||||
.acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
|
||||
.acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
|
||||
|
||||
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
|
||||
.enetrg = FALSE, /* External event trigger enable. */
|
||||
.eevt = 0, /* External event selection. */
|
||||
.eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
|
||||
.cpcdis = FALSE, /* Counter disable when RC compare. */
|
||||
.cpcstop = FALSE, /* Counter clock stopped with RC compare. */
|
||||
|
||||
.burst = FALSE, /* Burst signal selection. */
|
||||
.clki = FALSE, /* Clock inversion. */
|
||||
.tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
|
||||
};
|
||||
|
||||
tc_interrupt_t tc_interrupt =
|
||||
{
|
||||
.etrgs=0,
|
||||
.ldrbs=0,
|
||||
.ldras=0,
|
||||
.cpcs =1,
|
||||
.cpbs =0,
|
||||
.cpas =0,
|
||||
.lovrs=0,
|
||||
.covfs=0,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/* Disable all interrupt/exception. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Register the compare interrupt handler to the interrupt controller and
|
||||
enable the compare interrupt. */
|
||||
|
||||
#if( configTICK_USE_TC==1 )
|
||||
{
|
||||
INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
|
||||
|
||||
/* Initialize the timer/counter. */
|
||||
tc_init_waveform(tc, &waveform_opt);
|
||||
|
||||
/* Set the compare triggers.
|
||||
Remember TC counter is 16-bits, so counting second is not possible!
|
||||
That's why we configure it to count ms. */
|
||||
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
|
||||
|
||||
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
|
||||
|
||||
/* Start the timer/counter. */
|
||||
tc_start(tc, configTICK_TC_CHANNEL);
|
||||
}
|
||||
#else
|
||||
{
|
||||
INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
|
||||
prvScheduleFirstTick();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue