mirror of
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Normalize line endings and whitespace in source files
This commit is contained in:
parent
151fb04ad1
commit
01820d3ed9
574 changed files with 162626 additions and 172362 deletions
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@ -1,238 +1,236 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the HCS12 port.
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*----------------------------------------------------------*/
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/*
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* Configure a timer to generate the RTOS tick at the frequency specified
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* within FreeRTOSConfig.h.
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*/
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static void prvSetupTimerInterrupt( void );
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/* Interrupt service routines have to be in non-banked memory - as does the
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scheduler startup function. */
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#pragma CODE_SEG __NEAR_SEG NON_BANKED
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/* Manual context switch function. This is the SWI ISR. */
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void interrupt vPortYield( void );
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/* Tick context switch function. This is the timer ISR. */
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void interrupt vPortTickInterrupt( void );
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/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
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start the scheduler directly because the header file containing the
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xPortStartScheduler() prototype is part of the common kernel code, and
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therefore cannot use the CODE_SEG pragma. */
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static BaseType_t xBankedStartScheduler( void );
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#pragma CODE_SEG DEFAULT
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/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
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critical section should not be left (i.e. interrupts should not be re-enabled)
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until the nesting depth reaches 0. This variable simply tracks the nesting
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depth. Each task maintains it's own critical nesting depth variable so
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uxCriticalNesting is saved and restored from the task stack during a context
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switch. */
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volatile UBaseType_t uxCriticalNesting = 0xff;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/*
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Place a few bytes of known values on the bottom of the stack.
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This can be uncommented to provide useful stack markers when debugging.
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*pxTopOfStack = ( StackType_t ) 0x11;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x22;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x33;
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pxTopOfStack--;
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*/
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. In this case the stack as
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expected by the HCS12 RTI instruction. */
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/* The address of the task function is placed in the stack byte at a time. */
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );
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pxTopOfStack--;
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/* Next are all the registers that form part of the task context. */
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/* Y register */
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*pxTopOfStack = ( StackType_t ) 0xff;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xee;
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pxTopOfStack--;
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/* X register */
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*pxTopOfStack = ( StackType_t ) 0xdd;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xcc;
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pxTopOfStack--;
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/* A register contains parameter high byte. */
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );
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pxTopOfStack--;
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/* B register contains parameter low byte. */
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
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pxTopOfStack--;
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/* CCR: Note that when the task starts interrupts will be enabled since
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"I" bit of CCR is cleared */
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*pxTopOfStack = ( StackType_t ) 0x00;
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pxTopOfStack--;
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#ifdef BANKED_MODEL
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/* The page of the task. */
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*pxTopOfStack = ( StackType_t ) ( ( int ) pxCode );
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pxTopOfStack--;
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#endif
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/* Finally the critical nesting depth is initialised with 0 (not within
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a critical section). */
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*pxTopOfStack = ( StackType_t ) 0x00;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the HCS12 port will get stopped. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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TickTimer_SetFreqHz( configTICK_RATE_HZ );
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TickTimer_Enable();
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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/* xPortStartScheduler() does not start the scheduler directly because
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the header file containing the xPortStartScheduler() prototype is part
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of the common kernel code, and therefore cannot use the CODE_SEG pragma.
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Instead it simply calls the locally defined xBankedStartScheduler() -
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which does use the CODE_SEG pragma. */
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return xBankedStartScheduler();
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}
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/*-----------------------------------------------------------*/
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#pragma CODE_SEG __NEAR_SEG NON_BANKED
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static BaseType_t xBankedStartScheduler( void )
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{
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/* Configure the timer that will generate the RTOS tick. Interrupts are
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disabled when this function is called. */
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prvSetupTimerInterrupt();
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/* Restore the context of the first task. */
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portRESTORE_CONTEXT();
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/* Simulate the end of an interrupt to start the scheduler off. */
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__asm( "rti" );
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/* Should not get here! */
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return pdFALSE;
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}
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/*-----------------------------------------------------------*/
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/*
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* Context switch functions. These are both interrupt service routines.
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*/
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/*
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* Manual context switch forced by calling portYIELD(). This is the SWI
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* handler.
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*/
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void interrupt vPortYield( void )
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{
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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}
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/*-----------------------------------------------------------*/
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/*
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* RTOS tick interrupt service routine. If the cooperative scheduler is
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* being used then this simply increments the tick count. If the
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* preemptive scheduler is being used a context switch can occur.
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*/
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void interrupt vPortTickInterrupt( void )
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{
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#if configUSE_PREEMPTION == 1
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{
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/* A context switch might happen so save the context. */
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portSAVE_CONTEXT();
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/* Increment the tick ... */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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TFLG1 = 1;
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/* Restore the context of a task - which may be a different task
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to that interrupted. */
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portRESTORE_CONTEXT();
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}
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#else
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{
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xTaskIncrementTick();
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TFLG1 = 1;
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}
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#endif
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}
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#pragma CODE_SEG DEFAULT
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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||||
*
|
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
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||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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||||
*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the HCS12 port.
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*----------------------------------------------------------*/
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/*
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* Configure a timer to generate the RTOS tick at the frequency specified
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* within FreeRTOSConfig.h.
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*/
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static void prvSetupTimerInterrupt( void );
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|
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/* Interrupt service routines have to be in non-banked memory - as does the
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scheduler startup function. */
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#pragma CODE_SEG __NEAR_SEG NON_BANKED
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||||
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/* Manual context switch function. This is the SWI ISR. */
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void interrupt vPortYield( void );
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/* Tick context switch function. This is the timer ISR. */
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void interrupt vPortTickInterrupt( void );
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/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
|
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start the scheduler directly because the header file containing the
|
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xPortStartScheduler() prototype is part of the common kernel code, and
|
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therefore cannot use the CODE_SEG pragma. */
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static BaseType_t xBankedStartScheduler( void );
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#pragma CODE_SEG DEFAULT
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/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
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critical section should not be left (i.e. interrupts should not be re-enabled)
|
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until the nesting depth reaches 0. This variable simply tracks the nesting
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depth. Each task maintains it's own critical nesting depth variable so
|
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uxCriticalNesting is saved and restored from the task stack during a context
|
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switch. */
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volatile UBaseType_t uxCriticalNesting = 0xff;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/*
|
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Place a few bytes of known values on the bottom of the stack.
|
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This can be uncommented to provide useful stack markers when debugging.
|
||||
|
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*pxTopOfStack = ( StackType_t ) 0x11;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x22;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x33;
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pxTopOfStack--;
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*/
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. In this case the stack as
|
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expected by the HCS12 RTI instruction. */
|
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|
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/* The address of the task function is placed in the stack byte at a time. */
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );
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pxTopOfStack--;
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/* Next are all the registers that form part of the task context. */
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/* Y register */
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*pxTopOfStack = ( StackType_t ) 0xff;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xee;
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pxTopOfStack--;
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/* X register */
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*pxTopOfStack = ( StackType_t ) 0xdd;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xcc;
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pxTopOfStack--;
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|
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/* A register contains parameter high byte. */
|
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );
|
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pxTopOfStack--;
|
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|
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/* B register contains parameter low byte. */
|
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
|
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pxTopOfStack--;
|
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|
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/* CCR: Note that when the task starts interrupts will be enabled since
|
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"I" bit of CCR is cleared */
|
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*pxTopOfStack = ( StackType_t ) 0x00;
|
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pxTopOfStack--;
|
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|
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#ifdef BANKED_MODEL
|
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/* The page of the task. */
|
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*pxTopOfStack = ( StackType_t ) ( ( int ) pxCode );
|
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pxTopOfStack--;
|
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#endif
|
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|
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/* Finally the critical nesting depth is initialised with 0 (not within
|
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a critical section). */
|
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*pxTopOfStack = ( StackType_t ) 0x00;
|
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|
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return pxTopOfStack;
|
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}
|
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/*-----------------------------------------------------------*/
|
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|
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void vPortEndScheduler( void )
|
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{
|
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/* It is unlikely that the HCS12 port will get stopped. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
TickTimer_SetFreqHz( configTICK_RATE_HZ );
|
||||
TickTimer_Enable();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* xPortStartScheduler() does not start the scheduler directly because
|
||||
the header file containing the xPortStartScheduler() prototype is part
|
||||
of the common kernel code, and therefore cannot use the CODE_SEG pragma.
|
||||
Instead it simply calls the locally defined xBankedStartScheduler() -
|
||||
which does use the CODE_SEG pragma. */
|
||||
|
||||
return xBankedStartScheduler();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#pragma CODE_SEG __NEAR_SEG NON_BANKED
|
||||
|
||||
static BaseType_t xBankedStartScheduler( void )
|
||||
{
|
||||
/* Configure the timer that will generate the RTOS tick. Interrupts are
|
||||
disabled when this function is called. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Restore the context of the first task. */
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
/* Simulate the end of an interrupt to start the scheduler off. */
|
||||
__asm( "rti" );
|
||||
|
||||
/* Should not get here! */
|
||||
return pdFALSE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Context switch functions. These are both interrupt service routines.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Manual context switch forced by calling portYIELD(). This is the SWI
|
||||
* handler.
|
||||
*/
|
||||
void interrupt vPortYield( void )
|
||||
{
|
||||
portSAVE_CONTEXT();
|
||||
vTaskSwitchContext();
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* RTOS tick interrupt service routine. If the cooperative scheduler is
|
||||
* being used then this simply increments the tick count. If the
|
||||
* preemptive scheduler is being used a context switch can occur.
|
||||
*/
|
||||
void interrupt vPortTickInterrupt( void )
|
||||
{
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
/* A context switch might happen so save the context. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Increment the tick ... */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
TFLG1 = 1;
|
||||
|
||||
/* Restore the context of a task - which may be a different task
|
||||
to that interrupted. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
#else
|
||||
{
|
||||
xTaskIncrementTick();
|
||||
TFLG1 = 1;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#pragma CODE_SEG DEFAULT
|
||||
|
|
|
@ -1,203 +1,202 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portYIELD() __asm( "swi" );
|
||||
#define portNOP() __asm( "nop" );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
#define portENABLE_INTERRUPTS() __asm( "cli" )
|
||||
#define portDISABLE_INTERRUPTS() __asm( "sei" )
|
||||
|
||||
/*
|
||||
* Disable interrupts before incrementing the count of critical section nesting.
|
||||
* The nesting count is maintained so we know when interrupts should be
|
||||
* re-enabled. Once interrupts are disabled the nesting count can be accessed
|
||||
* directly. Each task maintains its own nesting count.
|
||||
*/
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
uxCriticalNesting++; \
|
||||
}
|
||||
|
||||
/*
|
||||
* Interrupts are disabled so we can access the nesting count directly. If the
|
||||
* nesting is found to be 0 (no nesting) then we are leaving the critical
|
||||
* section and interrupts can be re-enabled.
|
||||
*/
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
uxCriticalNesting--; \
|
||||
if( uxCriticalNesting == 0 ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/*
|
||||
* These macros are very simple as the processor automatically saves and
|
||||
* restores its registers as interrupts are entered and exited. In
|
||||
* addition to the (automatically stacked) registers we also stack the
|
||||
* critical nesting count. Each task maintains its own critical nesting
|
||||
* count as it is legitimate for a task to yield from within a critical
|
||||
* section. If the banked memory model is being used then the PPAGE
|
||||
* register is also stored as part of the tasks context.
|
||||
*/
|
||||
|
||||
#ifdef BANKED_MODEL
|
||||
/*
|
||||
* Load the stack pointer for the task, then pull the critical nesting
|
||||
* count and PPAGE register from the stack. The remains of the
|
||||
* context are restored by the RTI instruction.
|
||||
*/
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
}
|
||||
|
||||
/*
|
||||
* By the time this macro is called the processor has already stacked the
|
||||
* registers. Simply stack the nesting count and PPAGE value, then save
|
||||
* the task stack pointer.
|
||||
*/
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#else
|
||||
|
||||
/*
|
||||
* These macros are as per the BANKED versions above, but without saving
|
||||
* and restoring the PPAGE register.
|
||||
*/
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
}
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Utility macro to call macros above in correct order in order to perform a
|
||||
* task switch from within a standard ISR. This macro can only be used if
|
||||
* the ISR does not use any local (stack) variables. If the ISR uses stack
|
||||
* variables portYIELD() should be used in it's place.
|
||||
*/
|
||||
#define portTASK_SWITCH_FROM_ISR() \
|
||||
portSAVE_CONTEXT(); \
|
||||
vTaskSwitchContext(); \
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portYIELD() __asm( "swi" );
|
||||
#define portNOP() __asm( "nop" );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
#define portENABLE_INTERRUPTS() __asm( "cli" )
|
||||
#define portDISABLE_INTERRUPTS() __asm( "sei" )
|
||||
|
||||
/*
|
||||
* Disable interrupts before incrementing the count of critical section nesting.
|
||||
* The nesting count is maintained so we know when interrupts should be
|
||||
* re-enabled. Once interrupts are disabled the nesting count can be accessed
|
||||
* directly. Each task maintains its own nesting count.
|
||||
*/
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
uxCriticalNesting++; \
|
||||
}
|
||||
|
||||
/*
|
||||
* Interrupts are disabled so we can access the nesting count directly. If the
|
||||
* nesting is found to be 0 (no nesting) then we are leaving the critical
|
||||
* section and interrupts can be re-enabled.
|
||||
*/
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
uxCriticalNesting--; \
|
||||
if( uxCriticalNesting == 0 ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/*
|
||||
* These macros are very simple as the processor automatically saves and
|
||||
* restores its registers as interrupts are entered and exited. In
|
||||
* addition to the (automatically stacked) registers we also stack the
|
||||
* critical nesting count. Each task maintains its own critical nesting
|
||||
* count as it is legitimate for a task to yield from within a critical
|
||||
* section. If the banked memory model is being used then the PPAGE
|
||||
* register is also stored as part of the tasks context.
|
||||
*/
|
||||
|
||||
#ifdef BANKED_MODEL
|
||||
/*
|
||||
* Load the stack pointer for the task, then pull the critical nesting
|
||||
* count and PPAGE register from the stack. The remains of the
|
||||
* context are restored by the RTI instruction.
|
||||
*/
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
}
|
||||
|
||||
/*
|
||||
* By the time this macro is called the processor has already stacked the
|
||||
* registers. Simply stack the nesting count and PPAGE value, then save
|
||||
* the task stack pointer.
|
||||
*/
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#else
|
||||
|
||||
/*
|
||||
* These macros are as per the BANKED versions above, but without saving
|
||||
* and restoring the PPAGE register.
|
||||
*/
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
}
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Utility macro to call macros above in correct order in order to perform a
|
||||
* task switch from within a standard ISR. This macro can only be used if
|
||||
* the ISR does not use any local (stack) variables. If the ISR uses stack
|
||||
* variables portYIELD() should be used in it's place.
|
||||
*/
|
||||
#define portTASK_SWITCH_FROM_ISR() \
|
||||
portSAVE_CONTEXT(); \
|
||||
vTaskSwitchContext(); \
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue