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Normalize line endings and whitespace in source files
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574 changed files with 162626 additions and 172362 deletions
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@ -1,313 +1,312 @@
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
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* this software and associated documentation files (the "Software"), to deal in
|
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* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/* FreeRTOS includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/*-----------------------------------------------------------*/
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/* Count of the critical section nesting depth. */
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uint32_t ulCriticalNesting = 9999;
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/*-----------------------------------------------------------*/
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/* Registers required to configure the RTI. */
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#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )
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#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )
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#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )
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#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )
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#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )
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#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )
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#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )
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#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )
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#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )
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#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )
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#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )
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/* Constants required to set up the initial stack of each task. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
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#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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/* The number of words on the stack frame between the saved Top Of Stack and
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R0 (in which the parameters are passed. */
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#define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
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/*-----------------------------------------------------------*/
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/* vPortStartFirstSTask() is defined in portASM.asm */
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extern void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/* Saved as part of the task context. Set to pdFALSE if the task does not
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require an FPU context. */
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uint32_t ulTaskHasFPUContext = 0;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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StackType_t *pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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#if __TI_VFP_SUPPORT__
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{
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/* Ensure the stack is correctly aligned on exit. */
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pxTopOfStack--;
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}
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#endif
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which is the start of the as
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the task has not executed yet. The offset is added to make the return
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address appear as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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#ifdef portPRELOAD_TASK_REGISTERS
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{
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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}
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#else
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{
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pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
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}
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#endif
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/* Function parameters are passed in R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* Set the status register for system mode, with interrupts enabled. */
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*pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
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if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
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{
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/* The task will start in thumb mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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#ifdef __TI_VFP_SUPPORT__
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{
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pxTopOfStack--;
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/* The last thing on the stack is the tasks ulUsingFPU value, which by
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default is set to indicate that the stack frame does not include FPU
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registers. */
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*pxTopOfStack = pdFALSE;
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}
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#endif
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt(void)
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{
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/* Disable timer 0. */
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portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
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/* Use the internal counter. */
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portRTI_TBCTRL_REG = 0x00000000U;
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/* COMPSEL0 will use the RTIFRC0 counter. */
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portRTI_COMPCTRL_REG = 0x00000000U;
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/* Initialise the counter and the prescale counter registers. */
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portRTI_CNT0_UC0_REG = 0x00000000U;
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portRTI_CNT0_FRC0_REG = 0x00000000U;
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/* Set Prescalar for RTI clock. */
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portRTI_CNT0_CPUC0_REG = 0x00000001U;
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portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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/* Clear interrupts. */
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portRTI_INTFLAG_REG = 0x0007000FU;
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portRTI_CLEARINTENA_REG = 0x00070F0FU;
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/* Enable the compare 0 interrupt. */
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portRTI_SETINTENA_REG = 0x00000001U;
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portRTI_GCTRL_REG |= 0x00000001U;
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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BaseType_t xPortStartScheduler(void)
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{
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/* Start the timer that generates the tick ISR. */
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prvSetupTimerInterrupt();
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/* Reset the critical section nesting count read to execute the first task. */
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ulCriticalNesting = 0;
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/* Start the first task. This is done from portASM.asm as ARM mode must be
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used. */
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vPortStartFirstTask();
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/* Should not get here! */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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void vPortEndScheduler(void)
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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#if configUSE_PREEMPTION == 0
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/* The cooperative scheduler requires a normal IRQ service routine to
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* simply increment the system tick. */
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__interrupt void vPortNonPreemptiveTick( void )
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{
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/* clear clock interrupt flag */
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portRTI_INTFLAG_REG = 0x00000001;
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/* Increment the tick count - this may make a delaying task ready
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to run - but a context switch is not performed. */
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xTaskIncrementTick();
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}
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#else
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/*
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**************************************************************************
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* The preemptive scheduler ISR is written in assembler and can be found
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* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
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* is set to 1 in portmacro.h
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**************************************************************************
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*/
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void vPortPreemptiveTick( void );
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#endif
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/*-----------------------------------------------------------*/
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/*
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* Disable interrupts, and keep a count of the nesting depth.
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*/
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void vPortEnterCritical( void )
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{
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/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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/*
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* Decrement the critical nesting count, and if it has reached zero, re-enable
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* interrupts.
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*/
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void vPortExitCritical( void )
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{
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if( ulCriticalNesting > 0 )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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if( ulCriticalNesting == 0 )
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{
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/* Enable interrupts as per portENABLE_INTERRUPTS(). */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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#if __TI_VFP_SUPPORT__
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void vPortTaskUsesFPU( void )
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{
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extern void vPortInitialiseFPSCR( void );
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/* A task is registering the fact that it needs an FPU context. Set the
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FPU flag (saved as part of the task context. */
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ulTaskHasFPUContext = pdTRUE;
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/* Initialise the floating point status register. */
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vPortInitialiseFPSCR();
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}
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#endif /* __TI_VFP_SUPPORT__ */
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/*-----------------------------------------------------------*/
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
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* this software and associated documentation files (the "Software"), to deal in
|
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* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
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*
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* https://www.FreeRTOS.org
|
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* https://github.com/FreeRTOS
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*
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*/
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/* FreeRTOS includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/*-----------------------------------------------------------*/
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/* Count of the critical section nesting depth. */
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uint32_t ulCriticalNesting = 9999;
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/*-----------------------------------------------------------*/
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/* Registers required to configure the RTI. */
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#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )
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#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )
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#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )
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#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )
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#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )
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#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )
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#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )
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#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )
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#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )
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#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )
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#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )
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/* Constants required to set up the initial stack of each task. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
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#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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/* The number of words on the stack frame between the saved Top Of Stack and
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R0 (in which the parameters are passed. */
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#define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
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/*-----------------------------------------------------------*/
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/* vPortStartFirstSTask() is defined in portASM.asm */
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extern void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
|
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|
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/* Saved as part of the task context. Set to pdFALSE if the task does not
|
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require an FPU context. */
|
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uint32_t ulTaskHasFPUContext = 0;
|
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|
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/*-----------------------------------------------------------*/
|
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|
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|
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/*
|
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* See header file for description.
|
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*/
|
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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StackType_t *pxOriginalTOS;
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|
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pxOriginalTOS = pxTopOfStack;
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|
||||
#if __TI_VFP_SUPPORT__
|
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{
|
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/* Ensure the stack is correctly aligned on exit. */
|
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pxTopOfStack--;
|
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}
|
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#endif
|
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|
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/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
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|
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/* First on the stack is the return address - which is the start of the as
|
||||
the task has not executed yet. The offset is added to make the return
|
||||
address appear as it would within an IRQ ISR. */
|
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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||||
|
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#ifdef portPRELOAD_TASK_REGISTERS
|
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{
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
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pxTopOfStack--;
|
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
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pxTopOfStack--;
|
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
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pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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||||
pxTopOfStack--;
|
||||
}
|
||||
#else
|
||||
{
|
||||
pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Function parameters are passed in R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Set the status register for system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
|
||||
|
||||
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
|
||||
{
|
||||
/* The task will start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
|
||||
#ifdef __TI_VFP_SUPPORT__
|
||||
{
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The last thing on the stack is the tasks ulUsingFPU value, which by
|
||||
default is set to indicate that the stack frame does not include FPU
|
||||
registers. */
|
||||
*pxTopOfStack = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt(void)
|
||||
{
|
||||
/* Disable timer 0. */
|
||||
portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
|
||||
|
||||
/* Use the internal counter. */
|
||||
portRTI_TBCTRL_REG = 0x00000000U;
|
||||
|
||||
/* COMPSEL0 will use the RTIFRC0 counter. */
|
||||
portRTI_COMPCTRL_REG = 0x00000000U;
|
||||
|
||||
/* Initialise the counter and the prescale counter registers. */
|
||||
portRTI_CNT0_UC0_REG = 0x00000000U;
|
||||
portRTI_CNT0_FRC0_REG = 0x00000000U;
|
||||
|
||||
/* Set Prescalar for RTI clock. */
|
||||
portRTI_CNT0_CPUC0_REG = 0x00000001U;
|
||||
portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
|
||||
/* Clear interrupts. */
|
||||
portRTI_INTFLAG_REG = 0x0007000FU;
|
||||
portRTI_CLEARINTENA_REG = 0x00070F0FU;
|
||||
|
||||
/* Enable the compare 0 interrupt. */
|
||||
portRTI_SETINTENA_REG = 0x00000001U;
|
||||
portRTI_GCTRL_REG |= 0x00000001U;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
BaseType_t xPortStartScheduler(void)
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Reset the critical section nesting count read to execute the first task. */
|
||||
ulCriticalNesting = 0;
|
||||
|
||||
/* Start the first task. This is done from portASM.asm as ARM mode must be
|
||||
used. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return pdFAIL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
void vPortEndScheduler(void)
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
Artificially force an assert. */
|
||||
configASSERT( ulCriticalNesting == 1000UL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
||||
__interrupt void vPortNonPreemptiveTick( void )
|
||||
{
|
||||
/* clear clock interrupt flag */
|
||||
portRTI_INTFLAG_REG = 0x00000001;
|
||||
|
||||
/* Increment the tick count - this may make a delaying task ready
|
||||
to run - but a context switch is not performed. */
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
**************************************************************************
|
||||
* The preemptive scheduler ISR is written in assembler and can be found
|
||||
* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
|
||||
* is set to 1 in portmacro.h
|
||||
**************************************************************************
|
||||
*/
|
||||
void vPortPreemptiveTick( void );
|
||||
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* Disable interrupts, and keep a count of the nesting depth.
|
||||
*/
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Decrement the critical nesting count, and if it has reached zero, re-enable
|
||||
* interrupts.
|
||||
*/
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > 0 )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
/* Enable interrupts as per portENABLE_INTERRUPTS(). */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if __TI_VFP_SUPPORT__
|
||||
|
||||
void vPortTaskUsesFPU( void )
|
||||
{
|
||||
extern void vPortInitialiseFPSCR( void );
|
||||
|
||||
/* A task is registering the fact that it needs an FPU context. Set the
|
||||
FPU flag (saved as part of the task context. */
|
||||
ulTaskHasFPUContext = pdTRUE;
|
||||
|
||||
/* Initialise the floating point status register. */
|
||||
vPortInitialiseFPSCR();
|
||||
}
|
||||
|
||||
#endif /* __TI_VFP_SUPPORT__ */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
@ -1,230 +1,229 @@
|
|||
;/*
|
||||
; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * SPDX-License-Identifier: MIT
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; */
|
||||
|
||||
.text
|
||||
.arm
|
||||
.ref vTaskSwitchContext
|
||||
.ref xTaskIncrementTick
|
||||
.ref ulTaskHasFPUContext
|
||||
.ref pxCurrentTCB
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
;
|
||||
; Save Task Context
|
||||
;
|
||||
portSAVE_CONTEXT .macro
|
||||
DSB
|
||||
|
||||
; Push R0 as we are going to use it
|
||||
STMDB SP!, {R0}
|
||||
|
||||
; Set R0 to point to the task stack pointer.
|
||||
STMDB SP,{SP}^
|
||||
SUB SP, SP, #4
|
||||
LDMIA SP!,{R0}
|
||||
|
||||
; Push the return address onto the stack.
|
||||
STMDB R0!, {LR}
|
||||
|
||||
; Now LR has been saved, it can be used instead of R0.
|
||||
MOV LR, R0
|
||||
|
||||
; Pop R0 so it can be saved onto the task stack.
|
||||
LDMIA SP!, {R0}
|
||||
|
||||
; Push all the system mode registers onto the task stack.
|
||||
STMDB LR,{R0-LR}^
|
||||
SUB LR, LR, #60
|
||||
|
||||
; Push the SPSR onto the task stack.
|
||||
MRS R0, SPSR
|
||||
STMDB LR!, {R0}
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
;Determine if the task maintains an FPU context.
|
||||
LDR R0, ulFPUContextConst
|
||||
LDR R0, [R0]
|
||||
|
||||
; Test the flag
|
||||
CMP R0, #0
|
||||
|
||||
; If the task is not using a floating point context then skip the
|
||||
; saving of the FPU registers.
|
||||
BEQ $+16
|
||||
FSTMDBD LR!, {D0-D15}
|
||||
FMRX R1, FPSCR
|
||||
STMFD LR!, {R1}
|
||||
|
||||
; Save the flag
|
||||
STMDB LR!, {R0}
|
||||
.endif
|
||||
|
||||
; Store the new top of stack for the task.
|
||||
LDR R0, pxCurrentTCBConst
|
||||
LDR R0, [R0]
|
||||
STR LR, [R0]
|
||||
|
||||
.endm
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
;
|
||||
; Restore Task Context
|
||||
;
|
||||
portRESTORE_CONTEXT .macro
|
||||
LDR R0, pxCurrentTCBConst
|
||||
LDR R0, [R0]
|
||||
LDR LR, [R0]
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
; The floating point context flag is the first thing on the stack.
|
||||
LDR R0, ulFPUContextConst
|
||||
LDMFD LR!, {R1}
|
||||
STR R1, [R0]
|
||||
|
||||
; Test the flag
|
||||
CMP R1, #0
|
||||
|
||||
; If the task is not using a floating point context then skip the
|
||||
; VFP register loads.
|
||||
BEQ $+16
|
||||
|
||||
; Restore the floating point context.
|
||||
LDMFD LR!, {R0}
|
||||
FLDMIAD LR!, {D0-D15}
|
||||
FMXR FPSCR, R0
|
||||
.endif
|
||||
|
||||
; Get the SPSR from the stack.
|
||||
LDMFD LR!, {R0}
|
||||
MSR SPSR_CSXF, R0
|
||||
|
||||
; Restore all system mode registers for the task.
|
||||
LDMFD LR, {R0-R14}^
|
||||
|
||||
; Restore the return address.
|
||||
LDR LR, [LR, #+60]
|
||||
|
||||
; And return - correcting the offset in the LR to obtain the
|
||||
; correct address.
|
||||
SUBS PC, LR, #4
|
||||
.endm
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Start the first task by restoring its context.
|
||||
|
||||
.def vPortStartFirstTask
|
||||
|
||||
vPortStartFirstTask:
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Yield to another task.
|
||||
|
||||
.def vPortYieldProcessor
|
||||
|
||||
vPortYieldProcessor:
|
||||
; Within an IRQ ISR the link register has an offset from the true return
|
||||
; address. SWI doesn't do this. Add the offset manually so the ISR
|
||||
; return code can be used.
|
||||
ADD LR, LR, #4
|
||||
|
||||
; First save the context of the current task.
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Select the next task to execute. */
|
||||
BL vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Yield to another task from within the FreeRTOS API
|
||||
|
||||
.def vPortYeildWithinAPI
|
||||
|
||||
vPortYeildWithinAPI:
|
||||
; Save the context of the current task.
|
||||
|
||||
portSAVE_CONTEXT
|
||||
; Clear SSI flag.
|
||||
MOVW R0, #0xFFF4
|
||||
MOVT R0, #0xFFFF
|
||||
LDR R0, [R0]
|
||||
|
||||
; Select the next task to execute. */
|
||||
BL vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Preemptive Tick
|
||||
|
||||
.def vPortPreemptiveTick
|
||||
|
||||
vPortPreemptiveTick:
|
||||
|
||||
; Save the context of the current task.
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Clear interrupt flag
|
||||
MOVW R0, #0xFC88
|
||||
MOVT R0, #0xFFFF
|
||||
MOV R1, #1
|
||||
STR R1, [R0]
|
||||
|
||||
; Increment the tick count, making any adjustments to the blocked lists
|
||||
; that may be necessary.
|
||||
BL xTaskIncrementTick
|
||||
|
||||
; Select the next task to execute.
|
||||
CMP R0, #0
|
||||
BLNE vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
|
||||
.def vPortInitialiseFPSCR
|
||||
|
||||
vPortInitialiseFPSCR:
|
||||
|
||||
MOV R0, #0
|
||||
FMXR FPSCR, R0
|
||||
BX LR
|
||||
|
||||
.endif ;__TI_VFP_SUPPORT__
|
||||
|
||||
|
||||
pxCurrentTCBConst .word pxCurrentTCB
|
||||
ulFPUContextConst .word ulTaskHasFPUContext
|
||||
;-------------------------------------------------------------------------------
|
||||
|
||||
;/*
|
||||
; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * SPDX-License-Identifier: MIT
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; */
|
||||
|
||||
.text
|
||||
.arm
|
||||
.ref vTaskSwitchContext
|
||||
.ref xTaskIncrementTick
|
||||
.ref ulTaskHasFPUContext
|
||||
.ref pxCurrentTCB
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
;
|
||||
; Save Task Context
|
||||
;
|
||||
portSAVE_CONTEXT .macro
|
||||
DSB
|
||||
|
||||
; Push R0 as we are going to use it
|
||||
STMDB SP!, {R0}
|
||||
|
||||
; Set R0 to point to the task stack pointer.
|
||||
STMDB SP,{SP}^
|
||||
SUB SP, SP, #4
|
||||
LDMIA SP!,{R0}
|
||||
|
||||
; Push the return address onto the stack.
|
||||
STMDB R0!, {LR}
|
||||
|
||||
; Now LR has been saved, it can be used instead of R0.
|
||||
MOV LR, R0
|
||||
|
||||
; Pop R0 so it can be saved onto the task stack.
|
||||
LDMIA SP!, {R0}
|
||||
|
||||
; Push all the system mode registers onto the task stack.
|
||||
STMDB LR,{R0-LR}^
|
||||
SUB LR, LR, #60
|
||||
|
||||
; Push the SPSR onto the task stack.
|
||||
MRS R0, SPSR
|
||||
STMDB LR!, {R0}
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
;Determine if the task maintains an FPU context.
|
||||
LDR R0, ulFPUContextConst
|
||||
LDR R0, [R0]
|
||||
|
||||
; Test the flag
|
||||
CMP R0, #0
|
||||
|
||||
; If the task is not using a floating point context then skip the
|
||||
; saving of the FPU registers.
|
||||
BEQ $+16
|
||||
FSTMDBD LR!, {D0-D15}
|
||||
FMRX R1, FPSCR
|
||||
STMFD LR!, {R1}
|
||||
|
||||
; Save the flag
|
||||
STMDB LR!, {R0}
|
||||
.endif
|
||||
|
||||
; Store the new top of stack for the task.
|
||||
LDR R0, pxCurrentTCBConst
|
||||
LDR R0, [R0]
|
||||
STR LR, [R0]
|
||||
|
||||
.endm
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
;
|
||||
; Restore Task Context
|
||||
;
|
||||
portRESTORE_CONTEXT .macro
|
||||
LDR R0, pxCurrentTCBConst
|
||||
LDR R0, [R0]
|
||||
LDR LR, [R0]
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
; The floating point context flag is the first thing on the stack.
|
||||
LDR R0, ulFPUContextConst
|
||||
LDMFD LR!, {R1}
|
||||
STR R1, [R0]
|
||||
|
||||
; Test the flag
|
||||
CMP R1, #0
|
||||
|
||||
; If the task is not using a floating point context then skip the
|
||||
; VFP register loads.
|
||||
BEQ $+16
|
||||
|
||||
; Restore the floating point context.
|
||||
LDMFD LR!, {R0}
|
||||
FLDMIAD LR!, {D0-D15}
|
||||
FMXR FPSCR, R0
|
||||
.endif
|
||||
|
||||
; Get the SPSR from the stack.
|
||||
LDMFD LR!, {R0}
|
||||
MSR SPSR_CSXF, R0
|
||||
|
||||
; Restore all system mode registers for the task.
|
||||
LDMFD LR, {R0-R14}^
|
||||
|
||||
; Restore the return address.
|
||||
LDR LR, [LR, #+60]
|
||||
|
||||
; And return - correcting the offset in the LR to obtain the
|
||||
; correct address.
|
||||
SUBS PC, LR, #4
|
||||
.endm
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Start the first task by restoring its context.
|
||||
|
||||
.def vPortStartFirstTask
|
||||
|
||||
vPortStartFirstTask:
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Yield to another task.
|
||||
|
||||
.def vPortYieldProcessor
|
||||
|
||||
vPortYieldProcessor:
|
||||
; Within an IRQ ISR the link register has an offset from the true return
|
||||
; address. SWI doesn't do this. Add the offset manually so the ISR
|
||||
; return code can be used.
|
||||
ADD LR, LR, #4
|
||||
|
||||
; First save the context of the current task.
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Select the next task to execute. */
|
||||
BL vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Yield to another task from within the FreeRTOS API
|
||||
|
||||
.def vPortYeildWithinAPI
|
||||
|
||||
vPortYeildWithinAPI:
|
||||
; Save the context of the current task.
|
||||
|
||||
portSAVE_CONTEXT
|
||||
; Clear SSI flag.
|
||||
MOVW R0, #0xFFF4
|
||||
MOVT R0, #0xFFFF
|
||||
LDR R0, [R0]
|
||||
|
||||
; Select the next task to execute. */
|
||||
BL vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
; Preemptive Tick
|
||||
|
||||
.def vPortPreemptiveTick
|
||||
|
||||
vPortPreemptiveTick:
|
||||
|
||||
; Save the context of the current task.
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Clear interrupt flag
|
||||
MOVW R0, #0xFC88
|
||||
MOVT R0, #0xFFFF
|
||||
MOV R1, #1
|
||||
STR R1, [R0]
|
||||
|
||||
; Increment the tick count, making any adjustments to the blocked lists
|
||||
; that may be necessary.
|
||||
BL xTaskIncrementTick
|
||||
|
||||
; Select the next task to execute.
|
||||
CMP R0, #0
|
||||
BLNE vTaskSwitchContext
|
||||
|
||||
; Restore the context of the task selected to execute.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
|
||||
.if (__TI_VFP_SUPPORT__)
|
||||
|
||||
.def vPortInitialiseFPSCR
|
||||
|
||||
vPortInitialiseFPSCR:
|
||||
|
||||
MOV R0, #0
|
||||
FMXR FPSCR, R0
|
||||
BX LR
|
||||
|
||||
.endif ;__TI_VFP_SUPPORT__
|
||||
|
||||
|
||||
pxCurrentTCBConst .word pxCurrentTCB
|
||||
ulFPUContextConst .word ulTaskHasFPUContext
|
||||
;-------------------------------------------------------------------------------
|
||||
|
|
|
@ -1,118 +1,117 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __PORTMACRO_H__
|
||||
#define __PORTMACRO_H__
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if (configUSE_16_BIT_TICKS == 1)
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFF
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFFFFFFF
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH (-1)
|
||||
#define portTICK_PERIOD_MS ((TickType_t) 1000 / configTICK_RATE_HZ)
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/* Critical section handling. */
|
||||
extern void vPortEnterCritical(void);
|
||||
extern void vPortExitCritical(void);
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() asm( " CPSID I" )
|
||||
#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#pragma SWI_ALIAS( vPortYield, 0 )
|
||||
extern void vPortYield( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portSYS_SSIR1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
|
||||
#define portSYS_SSIR1_SSKEY ( 0x7500UL )
|
||||
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm( " DSB " ); asm( " ISB " ); }
|
||||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; } } while( 0 )
|
||||
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
|
||||
#endif /* __PORTMACRO_H__ */
|
||||
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __PORTMACRO_H__
|
||||
#define __PORTMACRO_H__
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if (configUSE_16_BIT_TICKS == 1)
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFF
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFFFFFFF
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH (-1)
|
||||
#define portTICK_PERIOD_MS ((TickType_t) 1000 / configTICK_RATE_HZ)
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/* Critical section handling. */
|
||||
extern void vPortEnterCritical(void);
|
||||
extern void vPortExitCritical(void);
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() asm( " CPSID I" )
|
||||
#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#pragma SWI_ALIAS( vPortYield, 0 )
|
||||
extern void vPortYield( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portSYS_SSIR1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
|
||||
#define portSYS_SSIR1_SSKEY ( 0x7500UL )
|
||||
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm( " DSB " ); asm( " ISB " ); }
|
||||
#define portYIELD_FROM_ISR( x ) do { if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; } } while( 0 )
|
||||
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
|
||||
#endif /* __PORTMACRO_H__ */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue