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Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt

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Richard Barry 2007-06-05 09:53:14 +00:00
parent 67d0d1ec3b
commit 017740b75a
352 changed files with 71690 additions and 71398 deletions
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84
Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h
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@ -1,42 +1,42 @@
/*
* These files are taken from the MCF523X source code example package
* which is available on the Freescale website. Freescale explicitly
* grants the redistribution and modification of these source files.
* The complete licensing information is available in the file
* LICENSE_FREESCALE.TXT.
*
* File: mcf523x_sram.h
* Purpose: Register and bit definitions for the MCF523X
*
* Notes:
*
*/
#ifndef __MCF523X_SRAM_H__
#define __MCF523X_SRAM_H__
/*********************************************************************
*
* 64KByte System SRAM (SRAM)
*
*********************************************************************/
/* Register read/write macros */
#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000]))
/* Bit definitions and macros for MCF_SRAM_RAMBAR */
#define MCF_SRAM_RAMBAR_V (0x00000001)
#define MCF_SRAM_RAMBAR_UD (0x00000002)
#define MCF_SRAM_RAMBAR_UC (0x00000004)
#define MCF_SRAM_RAMBAR_SD (0x00000008)
#define MCF_SRAM_RAMBAR_SC (0x00000010)
#define MCF_SRAM_RAMBAR_CI (0x00000020)
#define MCF_SRAM_RAMBAR_WP (0x00000100)
#define MCF_SRAM_RAMBAR_SPV (0x00000200)
#define MCF_SRAM_RAMBAR_PRI2 (0x00000400)
#define MCF_SRAM_RAMBAR_PRI1 (0x00000800)
#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16)
/********************************************************************/
#endif /* __MCF523X_SRAM_H__ */
/*
* These files are taken from the MCF523X source code example package
* which is available on the Freescale website. Freescale explicitly
* grants the redistribution and modification of these source files.
* The complete licensing information is available in the file
* LICENSE_FREESCALE.TXT.
*
* File: mcf523x_sram.h
* Purpose: Register and bit definitions for the MCF523X
*
* Notes:
*
*/
#ifndef __MCF523X_SRAM_H__
#define __MCF523X_SRAM_H__
/*********************************************************************
*
* 64KByte System SRAM (SRAM)
*
*********************************************************************/
/* Register read/write macros */
#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000]))
/* Bit definitions and macros for MCF_SRAM_RAMBAR */
#define MCF_SRAM_RAMBAR_V (0x00000001)
#define MCF_SRAM_RAMBAR_UD (0x00000002)
#define MCF_SRAM_RAMBAR_UC (0x00000004)
#define MCF_SRAM_RAMBAR_SD (0x00000008)
#define MCF_SRAM_RAMBAR_SC (0x00000010)
#define MCF_SRAM_RAMBAR_CI (0x00000020)
#define MCF_SRAM_RAMBAR_WP (0x00000100)
#define MCF_SRAM_RAMBAR_SPV (0x00000200)
#define MCF_SRAM_RAMBAR_PRI2 (0x00000400)
#define MCF_SRAM_RAMBAR_PRI1 (0x00000800)
#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16)
/********************************************************************/
#endif /* __MCF523X_SRAM_H__ */