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Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt
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Richard Barry
parent
67d0d1ec3b
commit
017740b75a
352 changed files with 71690 additions and 71398 deletions
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/*
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* These files are taken from the MCF523X source code example package
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* which is available on the Freescale website. Freescale explicitly
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* grants the redistribution and modification of these source files.
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* The complete licensing information is available in the file
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* LICENSE_FREESCALE.TXT.
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*
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* File: mcf523x_pit.h
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* Purpose: Register and bit definitions for the MCF523X
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*
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* Notes:
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*
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*/
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#ifndef __MCF523X_PIT_H__
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#define __MCF523X_PIT_H__
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/*********************************************************************
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*
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* Programmable Interrupt Timer Modules (PIT)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000]))
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#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002]))
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#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004]))
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#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000]))
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#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002]))
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#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004]))
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#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000]))
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#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002]))
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#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004]))
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#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000]))
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#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002]))
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#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004]))
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#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)]))
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#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)]))
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#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)]))
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/* Bit definitions and macros for MCF_PIT_PCSR */
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#define MCF_PIT_PCSR_EN (0x0001)
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#define MCF_PIT_PCSR_RLD (0x0002)
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#define MCF_PIT_PCSR_PIF (0x0004)
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#define MCF_PIT_PCSR_PIE (0x0008)
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#define MCF_PIT_PCSR_OVW (0x0010)
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#define MCF_PIT_PCSR_HALTED (0x0020)
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#define MCF_PIT_PCSR_DOZE (0x0040)
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#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8)
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/* Bit definitions and macros for MCF_PIT_PMR */
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#define MCF_PIT_PMR_PM0 (0x0001)
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#define MCF_PIT_PMR_PM1 (0x0002)
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#define MCF_PIT_PMR_PM2 (0x0004)
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#define MCF_PIT_PMR_PM3 (0x0008)
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#define MCF_PIT_PMR_PM4 (0x0010)
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#define MCF_PIT_PMR_PM5 (0x0020)
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#define MCF_PIT_PMR_PM6 (0x0040)
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#define MCF_PIT_PMR_PM7 (0x0080)
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#define MCF_PIT_PMR_PM8 (0x0100)
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#define MCF_PIT_PMR_PM9 (0x0200)
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#define MCF_PIT_PMR_PM10 (0x0400)
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#define MCF_PIT_PMR_PM11 (0x0800)
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#define MCF_PIT_PMR_PM12 (0x1000)
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#define MCF_PIT_PMR_PM13 (0x2000)
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#define MCF_PIT_PMR_PM14 (0x4000)
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#define MCF_PIT_PMR_PM15 (0x8000)
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/* Bit definitions and macros for MCF_PIT_PCNTR */
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#define MCF_PIT_PCNTR_PC0 (0x0001)
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#define MCF_PIT_PCNTR_PC1 (0x0002)
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#define MCF_PIT_PCNTR_PC2 (0x0004)
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#define MCF_PIT_PCNTR_PC3 (0x0008)
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#define MCF_PIT_PCNTR_PC4 (0x0010)
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#define MCF_PIT_PCNTR_PC5 (0x0020)
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#define MCF_PIT_PCNTR_PC6 (0x0040)
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#define MCF_PIT_PCNTR_PC7 (0x0080)
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#define MCF_PIT_PCNTR_PC8 (0x0100)
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#define MCF_PIT_PCNTR_PC9 (0x0200)
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#define MCF_PIT_PCNTR_PC10 (0x0400)
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#define MCF_PIT_PCNTR_PC11 (0x0800)
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#define MCF_PIT_PCNTR_PC12 (0x1000)
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#define MCF_PIT_PCNTR_PC13 (0x2000)
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#define MCF_PIT_PCNTR_PC14 (0x4000)
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#define MCF_PIT_PCNTR_PC15 (0x8000)
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/********************************************************************/
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#endif /* __MCF523X_PIT_H__ */
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/*
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* These files are taken from the MCF523X source code example package
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* which is available on the Freescale website. Freescale explicitly
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* grants the redistribution and modification of these source files.
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* The complete licensing information is available in the file
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* LICENSE_FREESCALE.TXT.
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*
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* File: mcf523x_pit.h
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* Purpose: Register and bit definitions for the MCF523X
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*
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* Notes:
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*
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*/
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#ifndef __MCF523X_PIT_H__
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#define __MCF523X_PIT_H__
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/*********************************************************************
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*
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* Programmable Interrupt Timer Modules (PIT)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000]))
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#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002]))
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#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004]))
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#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000]))
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#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002]))
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#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004]))
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#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000]))
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#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002]))
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#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004]))
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#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000]))
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#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002]))
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#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004]))
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#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)]))
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#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)]))
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#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)]))
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/* Bit definitions and macros for MCF_PIT_PCSR */
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#define MCF_PIT_PCSR_EN (0x0001)
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#define MCF_PIT_PCSR_RLD (0x0002)
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#define MCF_PIT_PCSR_PIF (0x0004)
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#define MCF_PIT_PCSR_PIE (0x0008)
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#define MCF_PIT_PCSR_OVW (0x0010)
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#define MCF_PIT_PCSR_HALTED (0x0020)
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#define MCF_PIT_PCSR_DOZE (0x0040)
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#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8)
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/* Bit definitions and macros for MCF_PIT_PMR */
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#define MCF_PIT_PMR_PM0 (0x0001)
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#define MCF_PIT_PMR_PM1 (0x0002)
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#define MCF_PIT_PMR_PM2 (0x0004)
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#define MCF_PIT_PMR_PM3 (0x0008)
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#define MCF_PIT_PMR_PM4 (0x0010)
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#define MCF_PIT_PMR_PM5 (0x0020)
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#define MCF_PIT_PMR_PM6 (0x0040)
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#define MCF_PIT_PMR_PM7 (0x0080)
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#define MCF_PIT_PMR_PM8 (0x0100)
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#define MCF_PIT_PMR_PM9 (0x0200)
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#define MCF_PIT_PMR_PM10 (0x0400)
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#define MCF_PIT_PMR_PM11 (0x0800)
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#define MCF_PIT_PMR_PM12 (0x1000)
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#define MCF_PIT_PMR_PM13 (0x2000)
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#define MCF_PIT_PMR_PM14 (0x4000)
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#define MCF_PIT_PMR_PM15 (0x8000)
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/* Bit definitions and macros for MCF_PIT_PCNTR */
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#define MCF_PIT_PCNTR_PC0 (0x0001)
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#define MCF_PIT_PCNTR_PC1 (0x0002)
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#define MCF_PIT_PCNTR_PC2 (0x0004)
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#define MCF_PIT_PCNTR_PC3 (0x0008)
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#define MCF_PIT_PCNTR_PC4 (0x0010)
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#define MCF_PIT_PCNTR_PC5 (0x0020)
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#define MCF_PIT_PCNTR_PC6 (0x0040)
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#define MCF_PIT_PCNTR_PC7 (0x0080)
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#define MCF_PIT_PCNTR_PC8 (0x0100)
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#define MCF_PIT_PCNTR_PC9 (0x0200)
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#define MCF_PIT_PCNTR_PC10 (0x0400)
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#define MCF_PIT_PCNTR_PC11 (0x0800)
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#define MCF_PIT_PCNTR_PC12 (0x1000)
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#define MCF_PIT_PCNTR_PC13 (0x2000)
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#define MCF_PIT_PCNTR_PC14 (0x4000)
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#define MCF_PIT_PCNTR_PC15 (0x8000)
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/********************************************************************/
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#endif /* __MCF523X_PIT_H__ */
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