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Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review.
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Richard Barry
parent
2e42d7690a
commit
00ad1a0200
107 changed files with 518 additions and 430 deletions
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -80,8 +80,8 @@
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#include <xil_exception.h>
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#include <microblaze_exceptions_g.h>
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/* Tasks are started with a critical section nesting of 0 - however, prior to
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the scheduler being commenced interrupts should not be enabled, so the critical
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/* Tasks are started with a critical section nesting of 0 - however, prior to
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the scheduler being commenced interrupts should not be enabled, so the critical
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nesting variable is initialised to a non-zero value. */
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#define portINITIAL_NESTING_VALUE ( 0xff )
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@ -100,14 +100,14 @@ created. */
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*/
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static long prvInitialiseInterruptController( void );
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/* Ensure the interrupt controller instance variable is initialised before it is
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* used, and that the initialisation only happens once.
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/* Ensure the interrupt controller instance variable is initialised before it is
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* used, and that the initialisation only happens once.
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*/
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static long prvEnsureInterruptControllerIsInitialised( void );
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/*-----------------------------------------------------------*/
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/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
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/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
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maintains its own count, so this variable is saved as part of the task
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context. */
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volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;
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@ -121,8 +121,8 @@ unsigned long *pulISRStack;
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get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
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handler exits. If, at that time, ulTaskSwitchRequested is set to 1, the kernel
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will call vTaskSwitchContext() to ensure the task that runs immediately after
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the interrupt exists is the highest priority task that is able to run. This is
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an unusual mechanism, but is used for this port because a single interrupt can
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the interrupt exists is the highest priority task that is able to run. This is
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an unusual mechanism, but is used for this port because a single interrupt can
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cause the servicing of multiple peripherals - and it is inefficient to call
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vTaskSwitchContext() multiple times as each peripheral is serviced. */
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volatile unsigned long ulTaskSwitchRequested = 0UL;
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@ -133,10 +133,10 @@ static XIntc xInterruptControllerInstance;
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been made.
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*
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*
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* See the portable.h header file.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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@ -145,7 +145,7 @@ extern void *_SDA2_BASE_, *_SDA_BASE_;
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const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;
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const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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/* Place a few bytes of known values on the bottom of the stack.
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/* Place a few bytes of known values on the bottom of the stack.
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This is essential for the Microblaze port and these lines must
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not be omitted. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;
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@ -170,7 +170,7 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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/* First stack an initial value for the critical section nesting. This
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is initialised to zero. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
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/* R0 is always zero. */
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/* R1 is the SP. */
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@ -203,13 +203,13 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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#else
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pxTopOfStack-= 8;
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */
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@ -221,10 +221,10 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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#else
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pxTopOfStack -= 4;
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
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pxTopOfStack--;
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@ -254,7 +254,7 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
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pxTopOfStack -= 13;
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#endif
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/* Return a pointer to the top of the stack that has been generated so this
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/* Return a pointer to the top of the stack that has been generated so this
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can be stored in the task control block for the task. */
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return pxTopOfStack;
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}
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@ -266,11 +266,11 @@ extern void ( vPortStartFirstTask )( void );
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extern unsigned long _stack[];
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/* Setup the hardware to generate the tick. Interrupts are disabled when
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this function is called.
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this function is called.
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This port uses an application defined callback function to install the tick
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interrupt handler because the kernel will run on lots of different
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MicroBlaze and FPGA configurations - not all of which will have the same
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interrupt handler because the kernel will run on lots of different
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MicroBlaze and FPGA configurations - not all of which will have the same
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timer peripherals defined or available. An example definition of
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vApplicationSetupTimerInterrupt() is provided in the official demo
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application that accompanies this port. */
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@ -294,12 +294,14 @@ extern unsigned long _stack[];
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void vPortEndScheduler( void )
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{
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/* Not implemented. */
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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/*
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* Manual context switch called by portYIELD or taskYIELD.
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* Manual context switch called by portYIELD or taskYIELD.
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*/
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void vPortYield( void )
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{
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@ -331,7 +333,7 @@ long lReturn;
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{
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XIntc_Enable( &xInterruptControllerInstance, ucInterruptID );
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}
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configASSERT( lReturn );
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}
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/*-----------------------------------------------------------*/
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@ -344,12 +346,12 @@ long lReturn;
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controller because the interrupt controller instance variable is private
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to this file. */
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lReturn = prvEnsureInterruptControllerIsInitialised();
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if( lReturn == pdPASS )
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{
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XIntc_Disable( &xInterruptControllerInstance, ucInterruptID );
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}
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configASSERT( lReturn );
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}
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/*-----------------------------------------------------------*/
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@ -358,11 +360,11 @@ portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterr
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{
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long lReturn;
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/* An API function is provided to install an interrupt handler because the
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/* An API function is provided to install an interrupt handler because the
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interrupt controller instance variable is private to this file. */
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lReturn = prvEnsureInterruptControllerIsInitialised();
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if( lReturn == pdPASS )
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{
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lReturn = XIntc_Connect( &xInterruptControllerInstance, ucInterruptID, pxHandler, pvCallBackRef );
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@ -372,7 +374,7 @@ long lReturn;
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{
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lReturn = pdPASS;
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}
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configASSERT( lReturn == pdPASS );
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return lReturn;
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@ -389,7 +391,7 @@ long lReturn;
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if( lInterruptControllerInitialised != pdTRUE )
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{
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lReturn = prvInitialiseInterruptController();
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if( lReturn == pdPASS )
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{
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lInterruptControllerInitialised = pdTRUE;
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@ -404,7 +406,7 @@ long lReturn;
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}
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/*-----------------------------------------------------------*/
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/*
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/*
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* Handler for the timer interrupt. This is the handler that the application
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* defined callback function vApplicationSetupTimerInterrupt() should install.
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*/
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@ -416,11 +418,11 @@ extern void vApplicationClearTimerInterrupt( void );
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( void ) pvUnused;
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/* This port uses an application defined callback function to clear the tick
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interrupt because the kernel will run on lots of different MicroBlaze and
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FPGA configurations - not all of which will have the same timer peripherals
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interrupt because the kernel will run on lots of different MicroBlaze and
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FPGA configurations - not all of which will have the same timer peripherals
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defined or available. An example definition of
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vApplicationClearTimerInterrupt() is provided in the official demo
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application that accompanies this port. */
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application that accompanies this port. */
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vApplicationClearTimerInterrupt();
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/* Increment the RTOS tick - this might cause a task to unblock. */
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