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Prepare for V9.0.0 release.

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+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
This commit is contained in:
Richard Barry 2016-05-19 13:28:12 +00:00
parent e10647f9c0
commit 0063b29cdf
34 changed files with 2764 additions and 2463 deletions
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9
FreeRTOS/Source/include/FreeRTOS.h
View file

@ -103,6 +103,11 @@ extern "C" {
/* Definitions specific to the port being used. */
#include "portable.h"
/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */
#ifndef configUSE_NEWLIB_REENTRANT
#define configUSE_NEWLIB_REENTRANT 0
#endif
/* Required if struct _reent is used. */
#if ( configUSE_NEWLIB_REENTRANT == 1 )
#include <reent.h>
@ -727,10 +732,6 @@ extern "C" {
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
#endif
#ifndef configUSE_NEWLIB_REENTRANT
#define configUSE_NEWLIB_REENTRANT 0
#endif
#ifndef configUSE_STATS_FORMATTING_FUNCTIONS
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
#endif

4
FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
View file

@ -186,8 +186,10 @@ void vPortStartFirstTask( void )
" isb \n"
" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
" mov lr, r5 \n" /* lr is now in r5. */
" pop {r3} \n" /* Return address is now in r3. */
" pop {r2} \n" /* Pop and discard XPSR. */
" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
" pop {pc} \n" /* Finally, pop the PC to jump to the user defined task code. */
" bx r3 \n" /* Finally, jump to the user defined task code. */
" \n"
" .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB "

16
FreeRTOS/Source/portable/GCC/IA32_flat/port.c
View file

@ -504,16 +504,16 @@ void vPortExitCritical( void )
#else
{
portAPIC_TASK_PRIORITY = 0;
/* If a yield was pended from within the critical section then
perform the yield now. */
if( ulPortYieldPending != pdFALSE )
{
ulPortYieldPending = pdFALSE;
__asm volatile( portYIELD_INTERRUPT );
}
}
#endif
/* If a yield was pended from within the critical section then
perform the yield now. */
if( ulPortYieldPending != pdFALSE )
{
ulPortYieldPending = pdFALSE;
__asm volatile( portYIELD_INTERRUPT );
}
}
}
}

4
FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
View file

@ -152,8 +152,10 @@ vPortStartFirstTask
isb
pop {r0-r5} /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */
pop {r3} /* The return address is now in r3. */
pop {r2} /* Pop and discard the XPSR. */
cpsie i /* The first task has its context and interrupts can be enabled. */
pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
bx r3 /* Jump to the user defined task code. */
/*-----------------------------------------------------------*/

4
FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
View file

@ -184,8 +184,10 @@ __asm void prvPortStartFirstTask( void )
isb
pop {r0-r5} /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */
pop {r3} /* The return address is now in r3. */
pop {r2} /* Pop and discard the XPSR. */
cpsie i /* The first task has its context and interrupts can be enabled. */
pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
bx r3 /* Finally, jump to the user defined task code. */
ALIGN
}