forked from len0rd/rockbox
580b307fd7
Sync opus codec to upstream commit
02fed471a4568852d6618e041c4f2af0d7730ee2 (August 30 2013)
This brings in a lot of optimizations but also makes the diff
between our codec and the upstream much smaller as most of our
optimizations have been upstreamed or supeceded.
Speedups across the board for CELT mode files:
64kbps 128kbps
H300 9.82MHz 15.48MHz
c200 4.86MHz 9.63MHz
fuze v1 10.32MHz 15.92MHz
For the silk mode test file (16kbps) arm targets get a speedup
of about 2MHz while the H300 is 7.8MHz slower, likely because it's
now using the pseudostack more rather than the real stack which
is in iram. Patches to get around that are upcomming.
Change-Id: Ifecf963e461c51ac42e09dac1e91bc4bc3b12fa3
121 lines
4.4 KiB
C
121 lines
4.4 KiB
C
/*Copyright (c) 2013, Xiph.Org Foundation and contributors.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.*/
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#ifndef KISS_FFT_ARMv4_H
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#define KISS_FFT_ARMv4_H
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#if !defined(KISS_FFT_GUTS_H)
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#error "This file should only be included from _kiss_fft_guts.h"
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#endif
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#ifdef FIXED_POINT
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#undef C_MUL
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#define C_MUL(m,a,b) \
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do{ \
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int br__; \
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int bi__; \
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int tt__; \
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__asm__ __volatile__( \
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"#C_MUL\n\t" \
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"ldrsh %[br], [%[bp], #0]\n\t" \
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"ldm %[ap], {r0,r1}\n\t" \
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"ldrsh %[bi], [%[bp], #2]\n\t" \
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"smull %[tt], %[mi], r1, %[br]\n\t" \
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"smlal %[tt], %[mi], r0, %[bi]\n\t" \
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"rsb %[bi], %[bi], #0\n\t" \
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"smull %[br], %[mr], r0, %[br]\n\t" \
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"mov %[tt], %[tt], lsr #15\n\t" \
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"smlal %[br], %[mr], r1, %[bi]\n\t" \
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"orr %[mi], %[tt], %[mi], lsl #17\n\t" \
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"mov %[br], %[br], lsr #15\n\t" \
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"orr %[mr], %[br], %[mr], lsl #17\n\t" \
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: [mr]"=r"((m).r), [mi]"=r"((m).i), \
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[br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
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: [ap]"r"(&(a)), [bp]"r"(&(b)) \
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: "r0", "r1" \
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); \
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} \
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while(0)
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#undef C_MUL4
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#define C_MUL4(m,a,b) \
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do{ \
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int br__; \
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int bi__; \
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int tt__; \
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__asm__ __volatile__( \
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"#C_MUL4\n\t" \
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"ldrsh %[br], [%[bp], #0]\n\t" \
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"ldm %[ap], {r0,r1}\n\t" \
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"ldrsh %[bi], [%[bp], #2]\n\t" \
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"smull %[tt], %[mi], r1, %[br]\n\t" \
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"smlal %[tt], %[mi], r0, %[bi]\n\t" \
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"rsb %[bi], %[bi], #0\n\t" \
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"smull %[br], %[mr], r0, %[br]\n\t" \
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"mov %[tt], %[tt], lsr #17\n\t" \
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"smlal %[br], %[mr], r1, %[bi]\n\t" \
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"orr %[mi], %[tt], %[mi], lsl #15\n\t" \
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"mov %[br], %[br], lsr #17\n\t" \
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"orr %[mr], %[br], %[mr], lsl #15\n\t" \
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: [mr]"=r"((m).r), [mi]"=r"((m).i), \
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[br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
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: [ap]"r"(&(a)), [bp]"r"(&(b)) \
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: "r0", "r1" \
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); \
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} \
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while(0)
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#undef C_MULC
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#define C_MULC(m,a,b) \
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do{ \
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int br__; \
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int bi__; \
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int tt__; \
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__asm__ __volatile__( \
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"#C_MULC\n\t" \
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"ldrsh %[br], [%[bp], #0]\n\t" \
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"ldm %[ap], {r0,r1}\n\t" \
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"ldrsh %[bi], [%[bp], #2]\n\t" \
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"smull %[tt], %[mr], r0, %[br]\n\t" \
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"smlal %[tt], %[mr], r1, %[bi]\n\t" \
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"rsb %[bi], %[bi], #0\n\t" \
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"smull %[br], %[mi], r1, %[br]\n\t" \
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"mov %[tt], %[tt], lsr #15\n\t" \
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"smlal %[br], %[mi], r0, %[bi]\n\t" \
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"orr %[mr], %[tt], %[mr], lsl #17\n\t" \
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"mov %[br], %[br], lsr #15\n\t" \
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"orr %[mi], %[br], %[mi], lsl #17\n\t" \
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: [mr]"=r"((m).r), [mi]"=r"((m).i), \
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[br]"=&r"(br__), [bi]"=r"(bi__), [tt]"=r"(tt__) \
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: [ap]"r"(&(a)), [bp]"r"(&(b)) \
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: "r0", "r1" \
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); \
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} \
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while(0)
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#endif /* FIXED_POINT */
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#endif /* KISS_FFT_ARMv4_H */
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