Aidan MacDonald 857267e9df x1000: Support GD5F1GQ5xExx NAND chips ... This is basically identical to the GD5F1GQ4xExx series, except for the addition of double-data-rate transfer modes (which are useless for us). These devices may be found in some Surfans F20s. Change-Id: I2c04c86bd88f2e27d813de7fe01712ce365ba077		2023-11-30 21:46:56 +00:00
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ingenic_jz47xx	fix red from #641e91aa2f	2023-01-13 17:02:23 -05:00
ingenic_x1000	x1000: Support GD5F1GQ5xExx NAND chips	2023-11-30 21:46:56 +00:00
exception-mips.S	mips: consolidate exception handling, add exception backtraces	2022-10-17 09:04:18 -04:00
mipsr2-endian.h	MIPS: add another mipsr2 endian function	2021-05-29 15:35:50 +00:00
mmu-mips.c	New port: FiiO M3K on bare metal	2021-03-28 00:01:37 +00:00
mmu-mips.h	mips: Work around an issue with GCC 8.	2022-10-10 08:24:33 -04:00
system-mips.c	mips: consolidate exception handling, add exception backtraces	2022-10-17 09:04:18 -04:00
system-mips.h	mips: consolidate exception handling, add exception backtraces	2022-10-17 09:04:18 -04:00