forked from len0rd/rockbox
83950bf233
The Echo R1 is a new open-hardware music player design, based on the STM32H743 microcontroller. Schematics and hardware documentation for it can be found here: - https://github.com/amachronic/echoplayer This is an incomplete port. The bootloader can be loaded using OpenOCD and it can draw to the LCD using SPI. SDRAM is working but hasn't been extensively tested. Change-Id: Ifd2bee15c49868fbc989683d3ca14dce48bf3e18
124 lines
3.5 KiB
ArmAsm
124 lines
3.5 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2025 by Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "bootdata.h"
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#include "stm32h7/pwr.h"
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.syntax unified
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.text
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#if defined(HAVE_BOOTDATA) && !defined(BOOTLOADER)
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.section .bootdata
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put_boot_data_here
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#endif
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.section .init.text,"ax",%progbits
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.global reset_handler
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.type reset_handler, function
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reset_handler:
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/*
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* After power-up the CPU will be in limited Run* mode and many things
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* won't work; we need to program the power supply configuration first
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* before doing anything else. Below the internal LDO is configured as
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* the power supply.
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*/
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ldr r0, =STA_PWR_CR3
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ldr r1, [r0] @ Read PWR_CR3
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orr r1, #BM_PWR_CR3_LDOEN @ Set LDOEN=1
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bic r1, #BM_PWR_CR3_BYPASS @ Set BYPASS=0
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str r1, [r0] @ Write updated value to PWR_CR3
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/* Wait for PSR_CSR1.ACTVOSRDY, which indicates we exited Run* mode */
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ldr r0, =STA_PWR_CSR1
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1:
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ldr r1, [r0] @ Read PWR_CSR1
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ands r1, #BM_PWR_CSR1_ACTVOSRDY
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beq 1b @ Loop back if ACTVOSRDY==0
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/* Now jump to the common startup code */
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b crt0_start
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.global start
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.type start, function
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crt0_start:
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/* Zero out BSS */
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ldr a1, =_bssbegin
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ldr a2, =_bssend
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mov a3, #0
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bl crt0_area_clear
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/* Copy data section */
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ldr a1, =_databegin
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ldr a2, =_dataend
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ldr a3, =_datacopy
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bl crt0_area_copy
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/* Clear the main thread stack */
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ldr a1, =stackbegin
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ldr a2, =stackend
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ldr a3, =0xdeadbeef
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bl crt0_area_clear
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/* Clear the IRQ stack */
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ldr a1, =irqstackbegin
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ldr a2, =irqstackend
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ldr a3, =0xdeadbeef
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bl crt0_area_clear
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/* Use MSP for IRQ handlers */
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ldr r0, =irqstackend
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msr msp, r0
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/* Use PSP for application code */
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ldr r0, =stackend
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msr psp, r0
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/* Enter thread mode; now sp points to PSP */
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mrs r2, control
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orr r2, #2
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msr control, r2
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/* Jump to main */
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b main
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.local crt0_area_copy
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.type crt0_area_copy, function
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/* crt0_area_copy(uint32_t *dst, uint32_t *dst_end, const void *src) */
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crt0_area_copy:
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cmp a2, a1
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ldrhi v1, [a3], #4
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strhi v1, [a1], #4
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bhi crt0_area_copy
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bx lr
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.local crt0_area_clear
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.type crt0_area_clear, function
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/* crt0_area_clear(const uint32_t *dst, const uint32_t *end, uint32_t value) */
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crt0_area_clear:
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cmp a2, a1
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strhi a3, [a1], #4
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bhi crt0_area_clear
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bx lr
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