forked from len0rd/rockbox
		
	git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18528 a1c6a512-1295-4272-9138-f99709370657
		
			
				
	
	
		
			68 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			68 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /***************************************************************************
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|  *             __________               __   ___.
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|  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
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|  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
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|  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
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|  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
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|  *                     \/            \/     \/    \/            \/
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|  * $Id$
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|  *
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|  * Copyright (C) 2004 by Linus Nielsen Feltzing
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version 2
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|  * of the License, or (at your option) any later version.
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|  *
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|  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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|  * KIND, either express or implied.
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|  *
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|  ****************************************************************************/
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| 
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| #ifndef _HD66789R_H_
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| #define _HD66789R_H_
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| 
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| /* HD66789R registers */
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| #define R_START_OSC             0x00
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| #define R_DRV_OUTPUT_CONTROL    0x01
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| #define R_DRV_WAVEFORM_CONTROL  0x02
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| #define R_ENTRY_MODE            0x03
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| #define R_COMPARE_REG1          0x04
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| #define R_COMPARE_REG2          0x05
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| 
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| #define R_DISP_CONTROL1     0x07
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| #define R_DISP_CONTROL2     0x08
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| #define R_DISP_CONTROL3     0x09
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| 
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| #define R_FRAME_CYCLE_CONTROL 0x0b
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| #define R_EXT_DISP_IF_CONTROL 0x0c
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| 
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| #define R_POWER_CONTROL1    0x10
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| #define R_POWER_CONTROL2    0x11
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| #define R_POWER_CONTROL3    0x12
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| #define R_POWER_CONTROL4    0x13
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| 
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| #define R_RAM_ADDR_SET  0x21
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| #define R_WRITE_DATA_2_GRAM 0x22
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| 
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| #define R_GAMMA_FINE_ADJ_POS1   0x30
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| #define R_GAMMA_FINE_ADJ_POS2   0x31
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| #define R_GAMMA_FINE_ADJ_POS3   0x32
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| #define R_GAMMA_GRAD_ADJ_POS    0x33
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| 
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| #define R_GAMMA_FINE_ADJ_NEG1   0x34
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| #define R_GAMMA_FINE_ADJ_NEG2   0x35
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| #define R_GAMMA_FINE_ADJ_NEG3   0x36
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| #define R_GAMMA_GRAD_ADJ_NEG    0x37
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| 
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| #define R_GAMMA_AMP_ADJ_RES_POS     0x38
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| #define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
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| 
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| #define R_GATE_SCAN_POS         0x40
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| #define R_VERT_SCROLL_CONTROL   0x41
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| #define R_1ST_SCR_DRV_POS       0x42
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| #define R_2ND_SCR_DRV_POS       0x43
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| #define R_HORIZ_RAM_ADDR_POS    0x44
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| #define R_VERT_RAM_ADDR_POS     0x45
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| 
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| #endif /* _HD66789R_H_ */
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